(12) United States Patent
`Zatz et al.
`
`(10) Patent N0.:
`(45) Date of Patent:
`
`US 6,809,732 B2
`Oct. 26, 2004
`
`US006809732B2
`
`(54) METHOD AND APPARATUS FOR
`GENERATION OF PROGRAMMABLE
`SHADER CONFIGURATION INFORMATION
`FROM STATE-BASED CONTROL
`INFORMATION AND PROGRAM
`INSTRUCTIONS
`
`(75) IIlVeIltOfSI Harold Robert Feldmall ZatZ, P2110
`A110, CA (Us); David C- Tallllellballm,
`Austin, TX (Us)
`
`(73) AssigneeZ NVIDIA Corporatiom Santa C1ara> CA
`(US)
`_
`_
`_
`_
`SubJeCt_tO any dlsclalmeri the term of thls
`Patent 15 extended or adlusted under 35
`U'S'C' 154(k)) by 136 days‘
`
`*
`
`_
`) Nonce:
`
`(
`
`(21) Appl. No.: 10/318,560
`
`(22) Flled'
`(65)
`
`Dec‘ 13’ 2002
`Prior Publication Data
`US 2004/0012597 A1 Jan. 22,2004
`
`Related US. Application Data
`(60) Provisional application No. 60/397,087, ?led on Jul. 18,
`2002.
`(51) Int. c1.7 .............................................. .. G06F 15/16
`(52) US. Cl. ..................... .. 345/503; 345/426; 345/506;
`345/520; 345/522; 717/136; 719/320; 719/321
`_
`Fleld Of Search ............................... ..
`345/503’ 506’ 520’ 522; 712/32’ 34’ 37;
`717/114’ 136’ 140; 719/321’ 322’ 323’
`328’ 320
`
`(56)
`
`,
`References Clted
`U_S_ PATENT DOCUMENTS
`
`6,198,488 B1 * 3/2001 Lindholm et al. ........ .. 345/426
`6’578’197 B1 * 6/2003 Peemy et a1‘ ' ' ' ' ' ' '
`' ' ' " 717/143
`6,693,639 B2 * 2/2004 Duluk et al.
`345/506
`2002/0003541 A1 * 1/2002 Boyd et a1‘ _ _ _ _ _
`_ _ _ " 345/501
`2OO3/0020741 A1 * 1/2003 Boland et aL __
`345/700
`2003/0030643 A1 * 2/2003 Taylor et al.
`345/531
`2003/0067473 A1 * 4/2003 Taylor et al.
`345/561
`2003/0217112 A1 * 11/2003 Emmot ..................... .. 709/208
`
`2004/0003370 A1 * 1/2004 Schnek et al. ............ .. 717/100
`
`OTHER PUBLICATIONS
`
`N. Carr, J. Hall, and J. Hart. The Ray Engine. In Graphics
`Hardware (2002), The Eurographics Association 2002, pp.
`1—10.*
`W. Mark and K. Proudfoot. Compiling to a VLIW Fragment
`Pipeline. In Proceedings of 2001 SIGGRAPH/Eurographics
`Workshop on Graphics Hardware, p. 47—55.*
`E. Lindholm, M. Kilgard, and H. Moreton. A User—Pro
`grammable Vertex Engine. In Proceedings of the 28th annual
`conference on Computer graphics and interactive tech
`niques, Aug. 2001, p. 149—159.*
`K. Proudfoot, W. Mark, S. TZvetkov, and P. Hanrahan. A
`Real—Time Procedural Shading System for Programmable
`Graphics HardWare. In Proceedings of the 28th annual
`conference on Computer graphics and interactive tech
`niques, Aug. 2001, p. 159—170.*
`*
`_
`_
`cited by eXammer
`Primary Examiner—Ulka J. Chauhan
`(74) Attorney, Agent, or Firm—Moser, Patterson &
`Shendon LLP
`(57)
`
`ABSTRACT
`
`A graphics Subsystem having a Programmable shader Con‘
`trollable by both state-based control information, such as
`Dirflctx 390322019 ingogma?om and .Pfgratm inSt¥t11C?°nS>
`Sue “blue; d ts ale; I’??? “:15 ructloil.s'f e It’FO'
`gramma es a er rans a ess a'e- ase ‘con ro 1n orma 1on
`received from a host computer mto native control mforma
`tion' The programmable shader translates into native Control
`information program instructions fetched from memory
`locations identi?ed by a received memory reference and
`program instructions received from the graphics subsystem.
`Native control information con?gures computation units of
`the programmable shader. The programmable shader opti
`miZes the generated native control information by combin
`ing certain operations. The graphics subsystem detects
`memory references Sent from the host Computer and pre_
`fetches program instructions for transmission to the pro
`.
`.
`.
`.
`grammable shader.Nat1ve control information from multiple
`control sources is concurrently used in the programmable
`shader
`
`37 Claims, 7 Drawing Sheets
`
`Fragmenl Pruglssing Pipeline
`
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`
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`
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`
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`
`Memory Interface
`@
`
`MEDIATEK, Ex. 1008, Page 1
`
`

`

`U.S. Patent
`
`0a. 26, 2004
`
`Sheet 1 0f 7
`
`US 6,809,732 B2
`
`Host Computer 1Q
`
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`m ‘ '
`11_4
`4
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`
`MEDIATEK, Ex. 1008, Page 2
`
`

`

`US. Patent
`
`Oct. 26, 2004
`
`Sheet 2 of 7
`
`US 6,809,732 B2
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`MEDIATEK, EX. 1008, Page 3
`
`MEDIATEK, Ex. 1008, Page 3
`
`

`

`U.S. Patent
`
`Oct. 26, 2004
`
`Sheet 3 0f 7
`
`US 6,809,732 B2
`
`Program Instruction
`Translator
`E
`
`Programmaole
`hader Plpelme
`Data Path
`24_7
`
`Program Instruction
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`319
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`
`'
`
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`
`MEDIATEK, Ex. 1008, Page 4
`
`

`

`U.S. Patent
`
`0a. 26, 2004
`
`Sheet 4 0f 7
`
`US 6,809,732 B2
`
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`
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`
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`
`MEDIATEK, Ex. 1008, Page 5
`
`

`

`U.S. Patent
`
`Oct. 26, 2004
`
`Sheet 5 0f 7
`
`US 6,809,732 B2
`
`7
`
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`state bundle
`292
`
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`
`7
`
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`
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`to data path
`_51_0
`
`FIG. 5
`
`MEDIATEK, Ex. 1008, Page 6
`
`

`

`U.S. Patent
`
`0a. 26, 2004
`
`Sheet 6 0f 7
`
`US 6,809,732 B2
`
`‘
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`Qt
`
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`@QQ
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`626
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`
`MEDIATEK, Ex. 1008, Page 7
`
`

`

`U.S. Pate
`[It
`
`Oct. 26, 2004
`
`Sheet 7 0f 7
`
`US 6,809,732 B2
`
`From Geometry Processor
`
`Rasterizer
`m
`
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`
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`
`FIG. 7
`
`MEDIATEK, Ex. 1008, Page 8
`
`

`

`US 6,809,732 B2
`
`1
`METHOD AND APPARATUS FOR
`GENERATION OF PROGRAMMABLE
`SHADER CONFIGURATION INFORMATION
`FROM STATE-BASED CONTROL
`INFORMATION AND PROGRAM
`INSTRUCTIONS
`
`CROSS REFERENCE TO RELATED
`APPLICATIONS
`
`This application claims the bene?t of Provisional Patent
`Application Ser. No. 60/397,087, ?led on Jul. 18, 2002,
`entitled “Shader System and Method,” and incorporated by
`reference herein.
`
`BACKGROUND
`
`1. Field of the Invention
`The invention is in the ?eld of computer graphics pro
`cessor architecture and processing.
`2. Description of Related Art
`As is knoWn by those skilled in the art of computer
`graphics, a computer typically comprises a general purpose
`processor that executes application program instructions and
`generates output data that is to be visually displayed on a
`monitor coupled to the computer. When performing com
`puter graphics functions, the output data generated by the
`general purpose processor typically consists of a high level
`description of a scene for display, and other high level
`information such as from Where the scene is to be vieWed,
`What textures should be applied to different primitives in the
`scene, and Where lights are located in the scene. HoWever,
`the typical monitor is a simple device for accepting and
`outputting color information on a pixel-by-pixel basis; the
`typical monitor cannot interpret the output data from the
`application. Therefore, the output data must be processed by
`a graphics processor and translated into pixel color infor
`mation for transmission to and display by the monitor.
`A modern graphics processor frequently includes a frag
`ment processor, also referred to as a pixel shader or pixel
`color processor. The fragment processor is primarily respon
`sible for determining a ?nal color for each fragment or pixel
`for Which it receives information. For instance, such frag
`ment information can include specular and diffuse lighting
`parameters, and texture information. HoWever, in addition to
`fragment information, the fragment processor requires con
`trol information that speci?es hoW the fragment processor is
`to process the fragment information to arrive at a ?nal pixel
`color. The content of the control information depends on the
`type of fragment processor in use; one fragment processor
`can have a different number of computation units or com
`putation units of a different type than another fragment
`processor, and Would therefore require different control
`information or a different format of control information.
`Graphics oriented Application Programming Interfaces
`(APIs), such as DirectX 8TM and OpenGLTM, abstract these
`differences from application developers by providing a
`common set of commands that can be used to con?gure a
`variety of graphics processors. For instance, a version of
`DirectX 8 has 127 different commands available to appli
`cation developers for control of a fragment processor in a
`graphics processor. An application developer can then
`arrange a sequence of commands chosen from these 127
`commands, and present the sequence of commands to a
`driver Written for the graphics processor in use. The driver
`converts the sequence of commands into a number of bits of
`control information that can directly con?gure the compu
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`tation units of the graphics processor in use. Thus, the
`control information generated by the driver is speci?c to the
`architecture of the fragment processor in use and, therefore,
`the control information cannot be used to directly con?gure
`another type of fragment processor. This process of an
`application or a driver controlling a fragment processor by
`directly con?guring its computation units With control infor
`mation is knoWn as state-based control of a fragment
`processor, and the information generated by the driver is
`knoWn as state-based control information because the state
`(con?guration) of computation units in the fragment pro
`cessor is directly controlled by hardWare or softWare exter
`nal to the graphics processor. The set of control information
`active at a given time in a graphics processor is knoWn in the
`art as “pipeline state”. Although the above-described method
`for controlling a fragment processor advanced the art of
`real-time creation of more realistic computer graphics, sev
`eral limitations of state-based control methods are noW
`evident.
`One limitation is that the range of commands available for
`use by an application developer is inadequate for creating
`cutting edge computer graphics. Therefore, some application
`developers directly Write state-based control information
`(created by the driver in the above example) because desired
`effects cannot be achieved using the commands available.
`Writing state-based control information is tedious, and the
`resulting state-based control information is likely to have
`errors. The resulting state-based control information is not
`portable to other fragment processors because the state
`based control information comprehends characteristics of
`the fragment processor, such as the type, number, and
`arrangement of the fragment processor’s resources.
`An alternative approach is to provide application devel
`opers With a programmable fragment processor, Which is
`programmed (controlled) by a shader program having a
`number of program instructions. Typically, for generating
`sophisticated graphics, controlling a fragment processor
`With program instructions is easier for an application devel
`oper than controlling a fragment processor With state-based
`control information because program instructions can be
`represented in a higher level programming language, and
`program instructions alloW a greater range of operations
`than state-based control logic. Thus, a programmable frag
`ment processor remedies some of the de?ciencies of a
`state-based control fragment processor.
`HoWever, controlling a fragment processor With either
`program instructions or state-based control information still
`results in limitations. One limitation is that features of a
`neWer fragment processor may go unused by an application
`Written to use control information of a format compatible
`With an older fragment processor. Also, a programmer
`frequently develops a familiarity With a certain format of
`control information, and therefore has a preference to use
`that format of control information, rather than another
`format, When Writing applications. Therefore, there is a need
`for a fragment processor that can use a variety of control
`information formats for controlling its computation units to
`process data.
`
`SUMMARY
`
`Embodiments of the invention receive control informa
`tion in a plurality of formats and convert the control infor
`mation into a native control format for controlling a pro
`grammable shader. In one embodiment, the invention
`comprises a state-based control translator for translating
`state-based control information into one or more codeWords
`
`MEDIATEK, Ex. 1008, Page 9
`
`

`

`US 6,809,732 B2
`
`3
`that natively control a programmable shader, and a program
`instruction translator for translating a program instruction
`into one or more codewords that natively control the pro
`grammable shader. Another embodiment comprises a pro
`grammable shader and a controller for detecting a start of a
`shader program and fetching one or more program instruc
`tions of the shader program, Which are transmitted to the
`programmable shader. The programmable shader can begin
`to execute the program instructions fetched by the controller
`While the programmable shader fetches and translates other
`program instructions. Embodiments can use a memory reg
`ister to store either state-based control information, if the
`programmable shader is to be controlled by state-based
`control information, or a program memory location refer
`ence identifying a memory location Where one or more
`program instructions are stored, if the programmable shader
`is to be controlled by program instructions.
`In one embodiment of the invention, a programmable
`shader for a graphics subsystem comprises a state-based
`control translator coupled to a data path, and con?gured to
`translate state-based control information into native control
`information and output the native control information to the
`data path. The programmer shader further comprises a
`program instruction translator coupled to the data path and
`con?gured to translate a program instruction into native
`control information and output the native control informa
`tion to the data path, and a computation unit coupled to the
`data path to receive the native control information for
`con?guration of the computation unit.
`In another embodiment of the invention, a computing
`system, for processing and displaying graphical information,
`comprises a host computer, Which comprises a host memory
`for storing a ?rst program executable by the host computer
`to create state-based control information, and a second
`program executable by the host computer to create a pro
`gram memory location reference. The computing system
`further comprises a system interface and a graphics sub
`system for processing the graphical information. The graph
`ics subsystem comprises a graphics interface coupled to the
`system interface for receiving the state-based control infor
`mation and the program memory location reference, a local
`memory, and a programmable shader coupled to the inter
`face. The programmable shader comprises a state-based
`control translator coupled to a data path, and con?gured to
`translate state-based control information into native control
`information and output the native control information to the
`data path. The programmer shader also comprises a program
`instruction translator coupled to the data path and con?gured
`to retrieve a program instruction from a memory using the
`program memory location reference, translate the program
`instruction into native control information, and output the
`native control information to the data path, and a computa
`tion unit coupled to the data path to receive the native
`control information. The computer system further comprises
`a display coupled to the graphics subsystem for displaying
`the processed graphical information.
`In yet another embodiment of the invention, a graphics
`subsystem for processing graphical information comprises
`an interface coupled to receive, from a host computer,
`statebased control information and a program memory loca
`tion reference, and further comprises a controller coupled to
`the interface and con?gured to detect the program memory
`location reference received by the interface and to fetch a
`program instruction referenced by the detected program
`memory location reference. The graphics subsystem also
`comprises a programmable shader for processing the graphi
`cal information, the programmable shader is coupled to the
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`interface, and comprises a state-based control translator
`coupled to a data path and con?gured to translate the
`state-based control information into native control informa
`tion and to output the native control information to the data
`path, a program instruction translator coupled to the data
`path and con?gured to translate the fetched program instruc
`tion into native control information and to output the native
`control information to the data path. The programmable
`shader also comprises a computation unit coupled to the data
`path to receive the native control information.
`In still another embodiment of the invention, a program
`mable shader for a graphics subsystem comprises a state
`based control translator coupled to a data path and con?g
`ured to translate state-based control information into ?rst
`native control information, and output the ?rst native control
`information to the data path. The programmable shader also
`comprises a program instruction translator coupled to the
`data path, and con?gured to translate a program instruction
`into second native control information and output the second
`native control information to the data path. The program
`mable shader also comprises a ?rst computation unit
`coupled to the data path to receive the ?rst native control
`information and a second computation unit coupled to the
`data path to receive the second native control information.
`In one embodiment of the invention, a method for gen
`erating native control information for controlling a program
`mable shader comprises the steps of determining Whether
`the programmable shader is to be controlled by state-based
`control information or program instructions, receiving in a
`graphics subsystem state-based control information, and
`translating the state-based control information into native
`control information, if the programmable shader is to be
`controlled by state-based control information. If the pro
`grammable shader is to be controlled by program
`instructions, the method comprises receiving in a graphics
`subsystem a program memory location reference, fetching
`one or more program instructions from a memory location
`referenced by the program memory location reference and
`translating the one or more program instructions into native
`control information.
`In another embodiment of the invention, a method for
`transferring control information to a programmable shader
`comprises receiving a control source indication specifying
`that the programmable shader is to be controlled by program
`instructions, Wherein the control source indication can
`specify either that the programmable shader is to be con
`trolled by state-based control information or program
`instructions. The method determines a memory address
`Where a program instruction of the shader program is stored,
`retrieves contents of the memory address, identi?es one or
`more program instructions in the retrieved contents, and
`outputs for receipt by the programmable shader the one or
`more program instructions.
`In yet another embodiment of the invention, a method for
`generating native control information for controlling com
`putation units of a programmable shader comprises
`receiving, in a graphics subsystem, state-based control infor
`mation for control of a ?rst computation unit and translating
`the state-based control information into native control infor
`mation. The method also receives in the graphics subsystem
`a program memory location reference for identifying a
`memory location storing a program instruction for control of
`a second computation unit, fetches the program instruction,
`and translates the program instruction into native control
`information.
`In yet still another embodiment of the invention, a control
`translator, for use in a programmable shader having a
`
`MEDIATEK, Ex. 1008, Page 10
`
`

`

`US 6,809,732 B2
`
`5
`plurality of computation units for processing graphical
`information, comprises a codeword generator con?gured to
`input control information, Wherein the control information is
`either state-based control information or a program
`instruction, and to translate the control information into
`native control information consisting of one or more
`codeWords, each codeWord specifying an operational con
`?guration for one of the plurality of computation units. The
`control translator further comprises a sequencer con?gured
`to input the native control information and arrange the native
`control information in a pre-determined format compatible
`With at least one of the plurality of computation units.
`The invention can also be embodied by a machine read
`able medium having embodied thereon a program, the
`program being executable by a machine to perform a method
`for generating native control information for a program
`mable shader. The method comprises the steps of determin
`ing Whether an application uses state-based control infor
`mation or program instructions for describing operations
`that the programmable shader is to perform on data, receiv
`ing state-based control information and translating the state
`based control information into native control information, if
`the application uses state-based control information, and
`receiving one or more program instructions and translating
`the one or more program instructions into native control
`information, if the application uses program instructions.
`The invention can also be embodied by a graphics sub
`system comprising a means for determining a ?nal pixel
`color, the means controllable by native control information,
`a means for translating state-based control information into
`the native control information, and a means for translating
`program instructions into the native control information.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a block diagram illustrating a computing system
`Wherein embodiments of the invention can be used;
`FIG. 2 is a block diagram of the Programmable Shader of
`FIG. 1;
`FIG. 3 illustrates a block diagram of a program instruction
`translator and a state-based control translator coupled to a
`programmable shader pipeline data path;
`FIG. 4 illustrates an exemplary method for translating
`program instructions and state-based control information
`into native control information for control of a program
`mable shader;
`FIG. 5 illustrates exemplary steps taken by a controller to
`pre-fetch program instructions for execution by a program
`mable shader;
`FIG. 6 illustrates exemplary steps for translating pre
`fetched program instructions and generating requests for
`fetching further program instructions; and
`FIG. 7 illustrates Pipeline Data Path Registers in a graph
`ics pipeline data path.
`
`DESCRIPTION OF THE INVENTION
`
`The invention involves systems and methods for trans
`lating graphics processor control information from a plural
`ity of sources into a native control format for con?guring a
`particular graphics processor or a portion thereof. An
`embodiment translates state-based control and program
`instructions into one or more codeWords that can be used to
`directly con?gure computation units of a programmable
`shader. In order to illustrate embodiments of the invention,
`an exemplary graphics processor having an exemplary pro
`grammable shader is illustrated and described. Embodi
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`ments of the invention are shoWn and described using the
`exemplary graphics processor and programmable shader.
`FIG. 1 is an illustration of a Computing System generally
`designated 108 and including a Host Computer 111 and a
`Graphics Subsystem 126. Computing System 108 can be a
`personal computer, server, laptop computer, game console,
`cellular telephone, computer-based simulator, or the like.
`Host Computer 111 includes Host Processor 114, Which may
`include a system memory controller to interface directly to
`Host Memory 112, or may communicate With Host Memory
`112 through a System Interface 115. System Interface 115
`may be an I/O (input/output) interface or a bridge device
`including the system memory controller to interface directly
`to Host Memory 112. Examples of System Interface 115
`knoWn in the art include Intel (R) Northbridge and Intel (R)
`Southbridge. In many instances Host Computer 111 loads a
`plurality of applications into Host Memory 112 and executes
`instructions from the plurality of applications in a multi
`threading and/or multi-tasking environment. Each of the
`plurality of applications typically generates data used to
`generate an image for display to a user of Computer System
`108. Host Computer 111 communicates the data used to
`generate an image for display to Graphics Subsystem 126
`via a Graphics Interface 123, Which has a Controller 131.
`Data received at Graphics Interface 123 can be processed by
`Controller 131, passed to a Geometry Processor 135 and
`Written to a Local Memory 138 through Memory Controller
`156. In addition to the data used to generate an image for
`display, Host Computer 111 communicates control informa
`tion (e.g., state-based control information) that de?nes What
`operations Graphics Subsystem 126 is to perform on the data
`used to generate an image for display. More generally, both
`control information and data can be read from and Written to
`any combination of Local Memory 138 and Host Memory
`112. When a portion of Host Memory 112 stores program
`instructions and/or data for use by Graphics Subsystem 126,
`that portion of Host Memory 112 can be uncached (and/or
`marked as being uncachable) to enhance Graphics Sub
`system’s 126 access to those program instructions and/or
`data.
`The control information transmitted by Host Computer
`111 to Graphics Subsystem 126 varies depending on the type
`of control information generated by an application (or a
`driver) executing on Host Computer 111. In an embodiment,
`the control information is either state-based control infor
`mation or a Program Memory Location Reference (PMLR).
`A PMLR identi?es a location in a memory Where one or
`more program instructions are stored. Typically, the one or
`more program instructions are part of a shader program
`Written to accomplish a certain shading effect, and the
`PMLR identi?es a location in the memory storing a ?rst
`program instruction of the shader program. In an
`embodiment, the one or more program instructions are
`DirectX 9 shader program instructions. Although the term
`control information refers to both state-based control infor
`mation and a PMLR, there is a distinction betWeen these tWo
`types of control information. The state-based control infor
`mation de?nes operations that Graphics Subsystem 126 is to
`perform on the data used to generate an image for display;
`in contrast, the PMLR is a reference to one or more memory
`locations storing one or more program instructions that
`de?ne operations that Graphics Subsystem 126 is to perform
`on the data used to generate an image for display. In some
`embodiments, Host Computer 111 can transmit one or more
`program instructions in addition to a PMLR identifying
`memory locations storing program instructions.
`In some embodiments, multiple units of Graphics Sub
`system 126 (e.g., Geometry Processor 135 and Program
`
`MEDIATEK, Ex. 1008, Page 11
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`US 6,809,732 B2
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`7
`mable Shader 153) can be controlled by control information
`from the application (or driver) executing on Host Computer
`111. In an embodiment, an application generates either
`state-based control information or a PMLR, and Graphics
`Interface 123 determines for Which unit of Graphics Sub
`system 126 the control information is intended. Graphics
`Interface 123 transmits the control information to the des
`tination (e.g., Programmable Shader 153) through a Graph
`ics Processing Pipeline 132, Which couples Programmable
`Shader 153 and Graphics Interface 123 through intermediate
`units, such as Geometry Processor 135.
`The Graphics Processing Pipeline 132 transmits control
`information through the Graphics Processing Pipeline Data
`Path 133 using one or more data structures, Where each data
`structure has an identi?cation header that indicates for Which
`unit the information in the data structure is intended (e.g.,
`Programmable Shader 153). These data structures, herein
`referred to as state bundles, can be used to transmit other
`information through the Graphics Processing Pipeline 132 as
`Well. Units of Graphics Processing Pipeline 132 (e.g., Pro
`grammable Shader 153), and computation units Within those
`units (i.e., the computation units in Programmable Shader
`153 as illustrated in FIG. 2) check the identi?cation headers
`of the state bundles to determine Whether a state bundle is
`intended for receipt by a particular unit or computation unit
`Within a unit.
`In addition to receiving and forWarding the control infor
`mation received from System Interface 115, Graphics Inter
`face 123, using Controller 131, generates a control source
`indication for specifying Which type of control information
`Will be used to control units of Graphics Subsystem 126. In
`some embodiments, the same type of control information
`controls the entire Graphics Subsystem 126, so that the
`control source indication need only differentiate betWeen
`each type of control information supported by Graphics
`Subsystem 126. For example, the control source indication,
`in some embodiments, differentiates betWeen control by
`state-based control information and program instructions. In
`an exemplary embodiment, Controller 131 broadcasts the
`control source indication to units of Graphics Subsystem
`126 by changing the signal level of a control line connecting
`the units to Controller 131. Alternatively, the control source
`indication can be transmitted to units of Graphics Processing
`Pipeline 132 using state bundles, as previously described in
`regards to control information transmission. Units of Graph
`ics Subsystem 126 (and optionally computation units in
`those units) use the control source indication for determining
`Whether each Will be controlled by state-based control
`information or program instructions.
`In embodiments Where more than one type of