United States Patent [191
`Shimizu et al.
`
`[11] Patent Number:
`[45] Date of Patent:
`
`4,807,639
`Feb. 28, 1989
`
`[54] PULSE DETECI‘ ION APPARATUS
`[75] Inventors: Atsuko Shimizu; Hiroshi Fujii;
`Shinichi Ohki, all of Tokyo, Japan
`[73] Assignee: Casio Computer Co., Ltd., Tokyo,
`Japan
`[21] Appl. No.: 901,783
`[22] Filed:
`Aug. 28, 1986
`[30]
`Foreign Application Priority Data
`Aug. 31, 1985 [JP]
`Japan
`.. 60-192632
`Aug. 31, 1985 [JP]
`Japan .............................. .. 60-192633
`
`[51] Int. Cl.‘ .............................................. .. A61B 5/02
`
`[52] US. Cl. . . . . . . . . . . . . . . .
`
`. . . .. 128/690; 128/706
`
`[58] Field of Search ...................... .. 128/690, 707, 706
`[56]
`References Cited
`U.S. PATENT DOCUMENTS
`
`3,937,004 2/1976 Natori et al. ...................... .. 128/690
`
`3,978,849 9/1976 Geneen . . . . . . .
`
`. . . .. 128/690
`
`4,009,708 3/1977 Fay, Jr. . . . . . . . . . .
`. . . .. 128/ 690
`4,086,916 5/ 1978 Freeman et al. .................. .. 128/690
`
`4,101,071 7/1978 Brejnik et al. .................... .. 128/690
`4,202,350 5/1980 Walton .......... ..
`128/690
`4,278,095 7/1981 Lapeyre
`128/707
`4,281,663 8/1981 Pringle ...................... ..
`.. 128/707
`128/690
`4,305,401 12/ 1981 Reissmueller et al. .
`..
`4,425,921 1/ 1984 Fujisaki et al. ....... ..
`..
`.. 128/690
`.............. .. 128/690
`4,450,843 5/ 1984 Barney et al.
`4,489,731 12/ 1984 Baumberg
`.............. .. 128/690
`4,566,461 l/l986 Lubell et a1. ...................... .. 128/689
`Primary Examiner—-Francis J aworski
`Assistant Examiner-George Manuel
`Attorney, Agent, or Firm-Frishauf, Holtz, Goodman &
`Woodward
`ABSTRACT
`[57]
`A pulse detection apparatus includes a memory for
`storing the normal pulse count of a user. After taking
`some exercise such as jogging, the percentage of the
`pulse count, detected by a pulse sensor, with respect to
`the normal pulse count, is calculated, and the results are
`displayed, to allow the user to determine the recovery
`rate of his physical strength.
`
`21 Claims, 19 Drawing Sheets
`
`1
`
`S2
`
`S3
`
`SA
`
`SB
`
`FITBIT, Ex. 1018
`Page 1
`
`

`

`‘US. Patent Feb. 28, 1989
`
`Sheet 1 0f 19
`
`4,807,639
`
`F|G.9B
`
`-
`
`FITBIT, Ex. 1018
`Page 2
`
`

`

`US. Patent
`
`Feb. 28, 1989
`PI
`
`Sheet 2 of 19
`
`4,807,639
`
`6.3
`
`53 JOGGING
`PACE
`SETTING
`
`NORMAL
`E‘é‘oi?
`SETTING
`
`~
`A .
`S
`
`JOGGING PACE/
`AVERAGE PULSE
`COUNT SETTING
`
`START / STOP
`
`BASIC
`TIMEPIECE
`MODE
`
`83K
`
`JOGGING
`MODE
`
`TIMER
`MODE
`
`S3~
`
`ALARM
`MODE
`
`FITBIT, Ex. 1018
`Page 3
`
`

`

`.m.
`
`wv
`
`7”mmw.
`
`8,
`
`mmIw“W_._OZ<til-”Wmmooomm
`
`3.EDomGamOmZm—w1.05.200WmmISn.
`ZOrSmEMQS.-MN
`00:0
`
`US. Patent
`
`F
`
`,v.0_n_
`
`
`
`-_figILmm..mowON
`
`9
`
`I
`
`4Q?
`
`.EDUEU
`
`mmx<2m0<a“—
`
`N,
`
`089
`
`9
`
`fi«BOSE—/9IEOEQIZCmO>Uzm30mmm
`
`OZ:2P
`
`KOFGEMZMO
`
`.,_<zm:m
`
`m.
`
`FITBIT, Ex. 1018
`
`Page 4
`
`FITBIT, Ex. 1018
`Page 4
`
`
`
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 4 0f 19
`
`4,807,639
`
`F I G. 5
`
`‘6A\
`
`TIME DATA REGISTER
`
`--------- --
`
`N3 N2 N1
`
`‘Q
`
`M10 M1
`
`a
`
`p
`
`X‘!
`
`-i
`
`:
`|
`
`x10
`
`21
`
`22
`
`|
`I
`
`i
`i
`I
`
`l
`
`'
`
`-
`
`a
`
`:
`
`|
`
`i
`l
`I
`
`230
`
`A
`
`Y
`
`Tr
`
`INT
`
`CT
`
`SR
`
`FITBIT, Ex. 1018
`Page 5
`
`

`

`US. Patent I
`
`Feb. 28, 1989
`
`Sheet 5 Of 19
`
`4,807,639
`
`TI
`
`WHICH
`PROCESSING
`REQUESTED
`'-’
`TIMEPIECE
`PROCESSING
`REQUEST
`
`KEY INPUT
`PROCESSING
`REQUEST
`
`T8
`S
`
`EE'iFQRM
`PROCESSING
`
`T2
`5
`
`PERFORM
`TIMEPIECE
`PROCESSING
`
`T3
`
`PERFORM
`JOGGING
`PROCESSING /
`3
`T4
`
`.
`
`PERFORM
`DISPLAY
`PROCESSING
`5
`T7
`
`YES
`
`PERFORM
`RECOVERY
`TIME
`MEASUREMENT
`PROCESSING \HTS
`
`FITBIT, Ex. 1018
`Page 6
`
`

`

`US. Patent I Feb. 28, 1989
`
`Sheet 6 Of 19
`
`4,807,639
`
`F l G. 7
`
`T41
`
`ONE SECOND
`ELAPSED
`?
`YES
`NI——NI+I V/T42
`
`NO
`
`IT43
`
`YES
`
`T?
`x0—— PULSE
`
`NI — O
`N2<—N2+I
`
`/T44
`
`I
`T52
`\- g__ 9+1
`
`NO
`
`T45
`
`T53
`
`‘
`
`NO
`
`YES
`
`.
`
`N2 -— O
`N3-— N3+ I
`
`_/T46
`
`T54\
`
`YES
`
`{I —— I
`
`Mi_____‘1
`
`_/T47
`
`T55\
`
`~
`
`1
`
`i0
`
`‘ PERFORM TIMEPIECE
`
`PROCESSING FOP
`UPPER "MINUTE"
`DIGIT POSITION
`AFTER LAPSE OF
`
`‘
`
`Zm“-'16
`T56
`
`N0
`
`m-—m + 1
`
`DISPLAY
`GRAPH
`
`END
`
`FITBIT, Ex. 1018
`Page 7
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 7 0f 19
`
`4,807,639
`
`F l G. 8
`
`I
`
`START
`
`)
`
`Tr-—- Tr+I
`
`
`
`I’ | DISPLAY ‘Tr
`
`
`
`|NT—— INT-I “J63
`
`NO
`
`INT = 0
`
`)T64
`
`T65
`YES
`INT—— 5 J
`
`Y _-
`PULSE
`
`I
`
`NO
`
`YES
`CT<-— cT+ I
`
`\
`T66
`
`T67
`
`\
`T68
`
`,
`
`NO
`
`T70
`
`S
`CT___ 0
`
`SR—-- I
`
`NT?’
`
`11-72
`
`GENERATE
`RECOVERY TIME
`MEASUREMENT
`END TONE‘ AMD
`DISPLAY ‘Tr’
`
`YES
`
`T69
`
`J __ 0
`SR~—— 0
`
`JT73
`
`END
`
`FITBIT, Ex. 1018
`Page 8
`
`

`

`US. Patent Feb. 28, 1989
`
`
`
`Sheet 8 of 19 i0
`
`5c
`5c
`5c\ JOG LPuLsEQQEcov
`
`11
`
`7 TIME DATA REGISTER‘
`
`C
`
`N30 N20 NiO
`
`M0 M5
`
`FITBIT, Ex. 1018
`Page 9
`
`

`

`U.S. Paten't
`
`Feb. 28, 1989
`
`Sheet 9 of 19
`
`4,807,639
`
`S
`' MO“— 1
`
`‘
`B —— PULSE
`
`MEASURMENT
`STAQTED
`
`YES ST605
`
`NIo——I\IIo + I
`
`_,
`DISPLAY B"
`
`NO
`
`5
`T604
`
`'
`
`YES
`
`N2o—— N20+ I
`
`NO
`
`T608
`
`YES
`N20 __._ O
`N30<—— N30+ I
`
`NTGOQ
`
`TeIo
`
`o
`N
`
`T6“ x
`
`YES
`
`M5 ‘— 1
`
`'
`
`T6i2\_
`
`‘
`c -— PULSE
`‘
`
`m3“ DISPLAY "c"
`L_______
`'
`
`T8614
`CALCULATE
`RECOVERY
`RATE
`
`T6I5
`
`3
`R__ RECOVERY
`RATE
`
`..
`..
`4
`DISPLAY R
`
`LTGIG
`
`END
`
`FITBIT, Ex. 1018
`Page 10
`
`

`

`US. Patent
`
`Feb. 28, 1989
`
`Sheet 10 of 19
`
`4,807,639
`
`
`
`F l G.
`
`15
`
`
`
`
`IUIUD
`
`
`
`1
`
`X Y
`
`Z
`
`FITBIT, Ex. 1018
`
`Page 11
`
`FITBIT, Ex. 1018
`Page 11
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 11 of 19
`
`4,807,639
`
`F l G. 16
`
`102
`
`106D
`
`FIG. 17
`
`FITBIT, Ex. 1018
`Page 12
`
`

`

`Patent 'Feb.28,1989
`
`Sheet 12 0f19
`
`4,807,639
`
`ON_
`
`.
`
`‘2
`
`1
`
`+
`
`NOT/
`
`mmzmc
`
`.3
`
`FITBIT, Ex. 1018
`Page 13
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 13 0f 19
`
`4,807,639
`
`FIG. 19A,Ln/l/l/l/L/LA“r
`F was“,
`
`F|G.19D| *
`
`FIG. 20
`
`Vref
`
`GND “
`
`FITBIT, Ex. 1018
`Page 14
`
`

`

`US. Patent
`
`Feb. 2841989
`
`Sheet 14 of 19
`
`4,807,639
`
`F l G. 21A
`
`tilZIIZIEDCICHZIEI
`
`F | G. 2iB
`
`t2--CICICIC]C3
`
`F | G. 21C
`
`t3------
`
`F I G. 210
`
`t4-----l:ll:l
`
`F I'G. 21E
`
`WES-“DEEDS
`
`F | G. 21F
`
`tGCJIZICICJCJCJIZI
`
`FIG.22
`
`VDD
`
`Vref
`
`GND
`
`
`
`FITBIT, EX. 1018
`
`Page 15
`
`FITBIT, Ex. 1018
`Page 15
`
`

`

`US. Patent
`
`Feb. 28, 1989
`
`Sheet 15 0f19
`
`4,807,639
`
`FIG.23A tiCIEZIEJEIEIIZIEZI
`
`FIG.23B tzmmmmemm:
`
`FIG.23C tSEIlEZHZIEIIZIEJEIJ
`
`F | G. 230
`
`t4-CIEIEJEIIEIE]
`
`FIG.23E tleIEICIIZIAEZHZIEI
`
`FIG. 23F
`
`TGCIEICICIEIEHCI
`
`FIG.24
`2028
`
`2028
`
`TIMEPIECE
`
`JOG PULSE
`
`
`
`FITBIT, Ex. 1018
`
`Page 16
`
`FITBIT, Ex. 1018
`Page 16
`
`

`

`US. Patent Feb. 28, 1989
`
`I
`
`Sheet 16 of 19
`
`4,807,639
`
`—-——> 83 RAcE
`I
`———-—-SA MAXIMUM
`PULSE
`COUNT
`SB MINIMUM
`PULSE .
`COUNT
`
`BASIC
`TIMEPIECE
`M0DE
`
`S3~
`
`S2
`PACE OR
`y MIAN?IIMUUMM RULSE
`JOGG'NG / COUNT SETTING
`MODE
`
`SA
`
`START/STOP
`
`S3~
`
`TIMER
`MODE
`
`S3~
`
`ALARM
`M0DE
`
`53x
`
`F | G 26 MI00
`
`‘ TIME DATA REGISTER
`
`M200
`
`---- —- §N300iN200iNI00
`
`M300 III
`
`‘J0 S0 SI
`
`P1
`
`M400
`
`A0
`
`B0
`
`x0
`
`RS
`
`FITBIT, Ex. 1018
`Page 17
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 17 01 19
`
`4,807,639
`
`JOG
`
`H; .
`
`F l G. 27D
`
`JOG
`
`FITBIT, Ex. 1018
`Page 18
`
`

`

`US. Patent Feb. 28, 1989
`
`E
`
`Sheet 18 0f 19
`
`4,807,639
`
`F|G.28
`
`ONE SECOND
`
`ELAQSED
`
`T404
`
`NiOO = 10
`
`YES
`
`T405
`>
`O
`N100
`N200———N2O +1
`-
`O
`l
`T406
`\ Si___1
`
`T407
`
`_
`
`T40? ‘YES
`N200 ~—- 0
`N300 <—- N300 + i
`
`&
`SO-'——1
`3
`T409
`
`,
`
`.
`
`T410
`
`3"
`PERFoRM TIMEPIECE
`PROCESSING FoR
`UPPER "MINUTE"
`DIGIT POSITION
`AFTER LAPSE OF
`ONE MINUTE
`
`PERFORM -
`PACE CONTROL
`PROCESSING
`
`END
`
`FITBIT, Ex. 1018
`Page 19
`
`

`

`US. Patent Feb. 28, 1989
`
`Sheet 19 of 19
`
`4,807,639
`
`F l G. 29
`
`(
`
`START
`
`)
`
`XO~—PULSE “T421
`
`T427
`\
`DISPLAY "1-1"
`
`R8 —-—— 1
`
`P1-—- P1 - 5
`5
`T429
`
`DISPLAY "L"
`
`T425
`L ‘Rs-— 1
`
`T426\ P1<-— P1 + 5
`
`T431
`/
`GENERATE
`PACEMAKER
`TONE
`
`T430
`
`1T432
`
`GENERATE
`ALARM TONE
`l
`RQS__ O JT433
`
`END
`
`FITBIT, Ex. 1018
`Page 20
`
`

`

`1
`
`4,807,639
`
`PULSE DETECTION APPARATUS
`
`BACKGROUND OF THE INVENTION
`
`The present invention relates to a pulse detection
`apparatus incorporated in a jogging watch, a stop-
`watch, or a wristwatch to detect an increase in physical
`strength as a result of jogging or any other exercise,
`through detecting the number of pluse (heartbeats).
`A conventional pulse counter
`for, electronically
`counting the number of pulses and displaying the count
`is well known. For example, US. Pat. No. 4,009,708
`describes a wristwatch type pulse counter capable of
`counting the number of pulses per minute.
`US. Pat. No. 4,101,071 describes an apparatus for
`calculating a calorie burn total according to the number
`of pulses and the length of exercise time.
`An assembly obtained by incorporating a pulse sensor
`in an electronic wristwatch is also known. For example,
`US. Pat. No. 3,937,004 describes a technique for incor-
`porating a pulse sensor in a wristwatch. US. Pat. No.
`4,086,916 describes a technique for incorporating a
`pulse sensor in a wristwatch band.
`In addition, US. Pat. No. 3,978,849 describes an ap-
`paratus for displaying an optimal exercise amount as
`well as the number of pulses, or signalling to the user
`that the number of pulses is too high.
`Although the conventional apparatuses can detect
`the number of pulses, the exercise amount, dangerous
`physical condition, and the like, they cannot detect the
`level of increase in physical strength. More specifically,
`people do exercise such as jogging to maintain and
`develop fitness. Before exercise, the physical strength of
`individual persons varies. In addition, physical strength
`after taking exercise varies according to the degree of
`difficulty and duration of the exercise, and the physical
`fitness of each person. Therefore, no conventional appa-
`ratus can provide a criterion for detecting an increase in
`physical strength, thereby resulting in inconvenience.
`SUMMARY OF THE INVENTION
`
`The present invention has been made in consideration
`of the above situation, and has as its object to provide a
`pulse detection apparatus for accurately and easily de-
`tecting the degree of increase in physical strength upon
`taking exercise, through detecting the number of pulses.
`In order to achieve the above object of the present
`invention, there is provided a pulse detection apparatus
`comprising key input means for input of a pulse count
`per unit time. storage means for storing the pulse count
`input at said key input means, a pulse sensor for detect-
`ing an actualpulse, pulse measuring means for measur-
`ing the pulse count per unit time, according to a detec-
`tion output signal from said pulse sensor, operating
`means for performing a predetermined arithmetic oper-
`ation using at least the pulse count measured by said
`pulse measuring means and the pulse count stored in
`said storage means, and for producing operation data on
`the basis of the pulse count stored in said storage means,
`and display means for displaying the operation data
`calculated by said operating means.
`With the above arrangement,
`the pulse detection
`apparatus of the present invention has an effect for
`detecting the degree of an increase in physical strength
`upon taking exercise. The increased number of pulses
`after a person takes a predetermined exercise can be
`generally reduced to the normal number of pulses
`within a shorter period of time as his physical strength
`
`5
`
`10
`
`15
`
`20
`
`25
`
`30
`
`35
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`increases. According to the present invention, the num-
`ber of pulses is measured to detect the recovery rate or
`the recovery time, and the recovery rate or time is
`displayed to allow the user to easily determine the de-
`gree of increase in his physical strength.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a schematic View showing the outer appear-
`ance of a jogging watch with a built-in .pulse detection
`apparatus according to the present invention;
`FIG. 2 is a plan View showing the detailed arrange-
`ment of a display unit in the jogging watch in FIG. 1;
`FIG. 3 is a flow chart for explaining changes in dis-
`play modes upon switching operations;
`FIG. 4 is a block diagram of the jogging watch in
`FIG. 1;
`FIG. Sis a memory map showing the detailed alloca-
`tion of the memory area in RAM 16 in FIG. 4;
`FIG. 6 is a flow chart showing the general operation
`of the jogging watch in FIG. 1;
`FIG. 7 is a flow chart showing the detailed operation
`in step T4 in FIG. 6;
`FIG. 8 is a flow chart showing the detailed operation
`in step T6 in FIG. 6;
`FIGS. 9A and 9B are plan views of the display unit in
`FIG. 2, showing different display states, respectively;
`FIG. 10 is a plan view of a display unit used in an-
`other embodiment of the present invention;
`FIG. 11 is a memory map showing the detailed allo-
`cation of the memory area of a RAM used for the em-
`bodiment of FIG. 10;
`FIG. 12 is a flow chart for explaining pulse recovery
`rate calculation in the embodiment of FIG. 10;
`FIGS. 13, 14, and 15 are views showing details of the
`display unit in FIG. 10;
`FIG. 16 is a schematic view showing part of the outer
`appearance of a watch case of a jogging watch accord-
`ing to still another embodiment of the present invention;
`FIG. 17 is a detailed view of the display unit used in
`FIG. 16;
`FIG. 18 is a diagram showing a jogging watch circuit
`in FIG. 16;
`FIGS. 19A to 19D are timing charts showing the
`waveforms of the outputs from the circuit in FIG. 18;
`FIGS. 20 and 22 are respectively graphs showing
`output voltages of the circuit in FIG. 18;
`FIGS. 21A to 21F and FIGS. 23A to 23F are views
`showing display states of the output voltages in FIG.
`19;
`FIG. 24 is a plan view showing a display unit accord-
`ing to still another embodiment of the present invention;
`FIG. 25 is a flow chart showing changes in display
`modes upon switching operations;
`FIG. 26 is a memory map of the memory area of a
`RAM used in the embodiment of FIG. 24;
`FIGS. 27A to 27D are respectively views showing
`the display states of the display unit in FIG. 24;
`FIG. 28 is a flow chart for explaining the operation in
`the jogging mode; and
`FIG. 29 is a detailed flow chart showing pace control
`processing in FIG. 28.
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`An embodiment of the present invention will now be
`described in detail with reference to the accompanying
`drawings.
`
`FITBIT, Ex. 1018
`
`Page 21
`
`FITBIT, Ex. 1018
`Page 21
`
`

`

`4,807,639
`
`3
`FIG. 1 is a plan view showing the outer appearance
`of a jogging watch with a built-in pulse detection appa-
`ratus according to the present invention. Display unit 1
`is arranged on the upper surface of the watch case. Unit
`1 comprises liquid crystal display elements. As shown in
`FIG. 2, unit 1 includes upper digital display section 1A
`for digitally displaying the date, and lower digital dis-
`play section 1B for displaying the time (hour, minute,
`second, and second/ 100). Unit 1 also includes mode
`indicators 1C showing jogging mode name “JOG”,
`pulse count mode name “PULSE”, and recovery time
`count mode name “RECOV” for indicating the time
`required for the user to recover to the preset normal
`number of pulses after he has stopped jogging. These
`names are printed in positions corresponding to indica-
`tors 1C. Display unit 1 further includes display section
`ID of a 20x30 dot matrix. As shown in FIG. 1, push-
`button switches SA, SB, S], 52, and SS are arranged on
`the upper surface and the sides of the watch case. These
`switches function as shown in FIG. 3. Switch S3 serves
`as a mode selection switch for cyclically setting a basic
`timepiece mode, a jogging mode, a timer mode, and an
`alarm mode. Switch 52 serves as a set mode selection
`switch for selecting jogging pace setting or normal
`pulse count setting. Upon operation of switch 52, the
`currently set mode is cancelled, and the previous jog-
`ging mode is restored. Although omitted in FIG. 3,
`upon operation of switch 52 in the basic timepiece
`mode, the time correction mode is set; upon operation
`of switch 52 in the alarm mode, the alarm setting mode
`is initiated. Upon operation of switch S3 in pace or
`normal pulse count setting, a desired pace count (num-
`ber of steps/minute) can be set according to the number
`of operations of switch SS. In addition, when switch SA
`is operated, a desired normal pulse count falling within
`the range of 30 pulses to 100 pulses can be set according
`to the number of operations of switch SA. The desired
`normal pulse count is then stored in the P register in
`RAM 16 (to be described later). Switch SA serves as a
`start/stop switch in the jogging mode. When jogging
`begins upon operation of switch SA, alarm tones are
`generated at the pace set with switch S3. Switch SB
`serves as a split/reset switch (not shown). US Pat. No.
`4,510,485 describes a technique for setting a pace count
`and generating pace tones upon operation of the start/-
`stop switch.
`Referring to FIG. 1, fingerstall 2 is detachably con-
`nected to one side of the watch case, through cord 3.
`Pulse sensor 4 is arranged inside fingerstall 2. Sensor 4
`consists of a light-emitting element such as an LED, and
`a light-receiving element such as a phototransistor.
`Light from the light-emitting element is emitted onto a
`finger, and light reflected by the finger is incident on the
`light-receiving element. A change in the amount of
`blood flowing, caused by pulses, is detected as a change
`in the amount of received light. The number of pulses is
`measured according to the resultant photoelectric pulse
`wave. Pulse detection will be described in more detail
`later.
`The arrangement of the jogging watch circuit will be
`described with reference to FIG. 4. The jogging watch
`is operated according to a microprogram control sys-
`tem capable of 8-bit parallel processing. A 32.768-kHz
`clock signal normally generated by oscillator 11 is fre-
`quency-divided by frequency divider 12. The frequen-
`cy-divided signal is supplied to timing signal generator
`13. Generator 13 supplies various timing signals to
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`ROM (Read Only Memory) 14 and other circuits to be
`described later.
`ROM 14 stores a microprogram for controlling all
`operations of the jogging watch and outputs parallel
`microinstructions OP, DO, and NA. Microinstruction
`OP is input to instruction decoder 15. Decoder 15 de-
`codes microinstruction GP and supplies it as a read/-
`write instruction to input terminal R/W of RAM (Ran-
`dom Access Memory) 16 and as an operation instruc-
`tion to input terminal S of operation unit 17. Decoded
`microinstruction OP is also supplied as an operation
`instruction to input terminal S of pacemaker circuit 18.
`Circuit 18 supplies a signal to address controller 19, to
`generate pacemaker tones. Microinstruction D0 is sup-
`plied as address data to input terminal Addr of RAM 16
`through a data bus and as numeric data to input terminal
`D12 of operation unit 17. Microinstruction D0 is also
`input to pacemaker circuit 18 and address controller 19.
`Microinstruction NA is next-address data input to con-
`troller 19. Address data output from controller 19 is
`input to input terminal Addr of ROM 14. Decoder 15
`outputs an alarm tone generation instruction and a stop
`instruction which are respectively supplied to input
`terminals S and R of SR flip-flop (SR-FF) 20, thereby
`setting and resetting SR-FF 20. A Q output from
`SR-FF 20 is supplied as a drive signal to alarm circuit
`21, to cause alarm tone generation section (i.e., a loud-
`speaker or a piezoelectric element) 22 to produce alarm
`tones.
`
`Although the arrangement of RAM 16 will be de-
`scribed in detail later, RAM 16 has an input data regis-
`ter, an operation register, and the like, and is used for
`timepiece processing, key input processing, arithmetic
`processing, and jogging processing. RAM 16 is read/-
`write accessed under the control of instruction decoder
`15. Data read out from output terminal D0 of RAM 16
`is supplied to input terminal D11 of operation unit 17
`and pacemaker circuit 18, and is displayed on display
`unit 1 through display controller (consisting of a de-
`coder and a driver) 25. Operation unit 17 performs
`various arithmetic operations in response to operation
`instructions from instruction decoder 15. Operation
`result data from output terminal D0 of operation unit
`17 is supplied to input terminal D1 of RAM 16 and
`stored therein. Operation unit 17 also outputs a signal
`representing the presence/absence of the operation
`result data, and a signal representing the presence/ab-
`sence of a carry signal in the judging sequence. These
`signals are supplied to address controller 19, to update
`the address of ROM 14, so that timepiece processing is
`executed by interruption for every 1/32 second. An
`output from pulse detection control circuit 23 for con-
`verting a photoelectic pulse wave detected by pulse
`sensor 4 to a signal representing the corresponding
`number of pulses, is input to input terminal DI3 of unit
`17. A key code output upon operation of a switch is
`supplied from input unit 24 to input terminal D12 of unit
`17.
`FIG. 5 shows the memory map of the memory area of
`RAM 16. Referring to FIG. 5, reference numeral 16A
`denotes a register for storing current time data. Refer-
`ence symbols N1, N2, and N3 denote registers for stor-
`ing time periods after the start ofjogging; and J, a regis-
`ter for storing the end of jogging. Reference symbols
`M1 and M10 denote registers for respectively storing
`one minute and 10 minutes after the start ofjogging; and
`X1 to X10, registers for storing pulse counts, respec-
`tively. The l register designates addresses of registers
`
`FITBIT, Ex. 1018
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`4,807,639
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`5
`X1 to X10. Reference symbols 21 to 230 denote regis-
`ters for storing average counts of 10 pulse detection
`cycles; and m, a register for designating the addresses of
`registers 21 to Z30.
`'
`Reference symbol P denotes a register for storing the
`jogging pace count; and A, a register for storing the
`normal pulse count.
`Reference symbol Tr denotes a register for counting
`a period after the end ofjogging; INT, a 5-second timer
`register; Y, a register for storing a pulse count for every
`'five seconds; CT, a binary register; and SR, a register
`for storing an alarm tone generation flag.
`The overall operation of the circuit described above
`will now be decribed with reference to FIG. 6. In step
`T1, the circuit is held in the waiting state (HALT) until
`a timepiece or key processing request is generated. If a
`timepiece timing is obtained, the flow advances to step
`T2. The timepiece processing program is accessed and
`timepiece processing is started. Basic timepiece data
`stored in timepiece storage register 16A in the first line
`of RAM 16 is added to predetermined unit data, to
`obtain current time. The current time data is transferred
`to register 16A in RAM 16, to update the time to the
`current time. In the next step T3, the content of the .I
`register in RAM 16 is checked. The J register stores the
`jogging mode flag. During jogging measurement, 1:]
`is set. In this case, jogging processing (to be described in
`detail later) is performed, in step T4. However, if the
`user does not jog, the flow advances to step T5 to deter-
`mine whether J =2 is set. If YES in step T5, recovery
`time measurement is performed, in step T6. When jog-
`ging processing (step T4) and recovery time measure-
`ment (step T6) are completed, display processing is
`performed in step T7, and the flow returns to step Tl.
`Upon operation of any switch, a corresponding key
`processing program is accessed, and key processing
`thereof is performed, in step T8. The processed results
`are displayed in step T7, and the flow returns to step T1.
`When a jogging pace or normal pulse count is set in the
`jogging mode, switch 82 is operated, to select the set—
`ting mode. If the pace count is set, switch S3 is oper—
`ated; and if the normal pulse count is set, switch SA is
`operated. As a result of key processing in step T8, a
`desired jogging pace count is set in the P register, ac-
`cording to the number of operations of switch S3. A
`desired normal pulse count of the user is set in the A
`register, according to the number of operations of
`switch SA. When various necessary data are registered
`prior to jogging, the user operates switch 81, to change
`to the jogging mode. Thereafter,
`the user operates
`switch SA when he starts jogging. Upon operation of
`switch SA, a jogging mode flag “1” is set in the J regis-
`ter in RAM 16. Upon second operation of switch SA,
`the jogging mode is interrupted and “2” is set in the J
`register.
`FIG. 7 is a flow chart for explaining detailed opera-
`tions of jogging processing (step T4) in FIG. 6. In step
`T41, a check is made as to whether a one-second signal
`after the start of jogging is present. If the one-second
`signal is determined to have been output, the content of
`the N1 register (i.e., the jogging measurement register
`for measuring jogging time in units of seconds) in RAM
`16 is incremented in incrementation processing, in step
`T42. As a result, if the value of the N1 register is “l0”,
`i.e., if the current timing is discriminated as each 10th
`second timing after the start of jogging, the flow ad-
`vances to step T44. In step T44, the content of the N1
`register is cleared, and at the same time the N2 register
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`(the jogging measurement register for measuring jog-
`ging time for every 10 seconds) in RAM 16 is incre-
`mented by one. Whether or not each one minute has
`elapsed after the start of jogging, is determined in step
`T45. In other words, it is determined whether the count
`of the N2 register is “6”. If YES in step T45, the content
`of the N2 register is cleared and the content of the N3
`register (the jogging measurement register for measur-
`ing each one minute of the jogging time) in RAM 16 is
`incremented by one, in step T46. In step T47, a one-
`minute lapse flag “1” is set in the M1 register in RAM
`16, so as to indicate the timing representing the lapse of
`each one minute after the start of jogging. This logic
`flag “I” in the M1 register is used to execute pulse
`measurement (to be described later). Upon start of jog-
`ging, the N1, N2, and N3 registers are updated to se-
`quentially measure time values for one-second, 10-
`second, and l-minute digit positions. In step T48, the
`time measurement for the upper “minute” digit position
`after the lapse of one minute, is detected in the same
`manner as described above.
`The pulse count operation, upon start of jogging, is
`performed in the following manner:
`In step T49, it is determined whether the value of the
`m register in RAM 16 is “30”. If NO in step T49, in step
`T50, whether a one-minute lapse timing is obtained is
`determined according to whether the content of the M1
`register includes the logic flag “ 1”. The pulse measuring
`operation is performed in step T51 at the timing repre-
`senting the lapse of each one minute after start of jog-
`ging. The measured pulse count is stored in the X1 regis-
`ter among the X1 to X10 registers in RAM 16, in re-
`sponse to the value of the 1 register. The X1 to X10
`registers are for storing pulse counts per minute. Incre-
`mentation processing is performed in step T52, to incre- ‘
`ment the value of the I register by one. In step T53, it is
`determined whether the value of the I register exceeds
`“10”. If ten one-minute pulse counts are detected, the
`value of the l register exceeds “10”. Initialization pro-
`cessing is then performed in step T54 to transfer “1” to
`the I register. The one-minute pulse counts are sequen-
`tially stored in the X1 to X10 registers. The ten one-
`minute pulse counts are subjected to an operation
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`in step T55, thereby obtaining an average pulse count
`for 10 minutes. The average pulse count is stored in the
`Zm register among the Z] to 230 registers, in response
`to the value of the m register. The Z1 to Z30 registers
`are 10-minute average pulse count storage registers. In
`step T56, the content of the M10 register in RAM 16 is
`checked. The M10 register stores a lO—minute lapse flag.
`Whenever 10 minutes have elapsed,
`incrementation
`processing is performed, in step T57, to increment the
`value of the register by one. The contents of the 21 to
`230 registers are displayed as a graph in dot matrix
`display section 1C, in step T58. This operation is re-
`peated until the count of the in register reaches “30". A
`maximum of thirty 10-minute average pulse counts (for
`a period of five hours) are sequentially stored in the 21
`to Z30 registers, and the contents thereof are displayed
`as a graph.
`FIG. 9A shows a displayed graph. Every time the
`pulse count is measured, the display state is set in the
`pulse measurement mode. The date data of jogging is
`
`FITBIT, Ex. 1018
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`4,807,639
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`7
`displayed in digital display section 1A. Time data of the
`pulse count measurement is displayed in digital display
`section 1B. A graph showing the 30 average lO-minute
`pulse counts is displayed in display section 1D. Since
`changes in pulse counts during jogging can be displayed
`as a graph, the user can check changes in the graph, to
`obtain subsequent pacemaking criteria, thereby effec-
`tively improving his physical strength.
`FIG. 8 is a flow chart of recovery time measurement
`(step T6) in FIG. 6. This flow is started by interrupting
`jogging. In step T61, the count of the Tr counter in
`RAM 16 is incremented by one. The Tr counter is a
`recovery time measuring counter for measuring the
`time required for recovering to normal pulse count after
`jogging. The recovery time is displayed in display sec-
`tion 1B, in step T62. The count of the INT counter in
`RAM 16 is decremented by one, in step T63. The INT
`counter is for counting a pulse count measuring interval
`for every five seconds after the end of jogging. In step
`T65, it is determined whether the count of the INT
`counter has reached zero. If YES in step T65, the initial
`count value “5 seconds” is set in the INT counter. After
`a lapse of 5 seconds, the pulse count is measured, in step
`T66, and the count value is transferred to the Y register
`in RAM 16. In step T67, the count value in the Y regis-
`ter is compared with the normal count value in the A
`register in RAM 16. If the measured value is smaller
`than the normal pulse count, the flow advances from
`step T67 to step T68, in which the count of the CT
`counter in RAM 16 is incremented by one. The CT
`counter counts the number of events that the measured
`value is smaller than the normal pulse count in order to
`find that such an event happens twice succesively. In
`step T69, it is determined whether the value of the CT
`counter is “2”. If the values measured for every five
`seconds after jogging are smaller, twice consecutively,
`than the normal pulse count, this is detected in step T69.
`The flow advances to step T70, and the count of the CT
`counter is cleared. The recovery time measurement end
`tone flag “1” is set in the SR register in RAM 16, in step
`T71. In step T72, the recovery time measurement end
`tones are generated at alarm tone generation section 22,
`to signal to the user, by use of a tone, the end of recov»
`ery time measurement. At the same time, the content of
`the Tr register is displayed. Thereafter, the SR and J
`registers are cleared, in step T73. The Tr counter mea—
`sures as the recovery time, a period after which the
`pulse count measured for every five seconds is smaller,
`twice consecutively, than the normal pulse count. As a
`result, the recovery time is digitally displayed, as shown
`in FIG. 9B. FIG. 9B thus shows the display state in the
`recovery time measurement mode. In this manner, since
`the recovery time required to restore normal pulse
`count after jogging is measured and displayed, the jog-
`ger who runs a predetermined course every day or for
`every predetermined interval can determine the degree
`of improvement of his physical strength by checking
`the recovery rate after running along the predetermined
`course.
`FIGS. 10 to 15 show another embodiment of the
`present invention. In the embodiment of FIGS. 1 to 9B,
`the improvement of physical strength is determined by
`measuring the time required for restoring the normal
`pulse count. However, the object of the present inven-
`tion is achieved in the embodiment of FIGS. 10 to 15,
`by displaying the recovery rate to the normal pulse
`count.
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`FIG. 10 shows the segment electrode structure of
`display unit 5 in a jogging watch with a built-in pulse
`detection apparatus according to the present invention.
`The segment electrodes in unit 5 are constituted by
`liquid crystal display elements. Unit 5 includes upper
`and lower digital display sections 5A and 5B. The mode
`names,
`i.e., jogging mode name “JOG”, pulse count
`mode name “PULSE”, and recovery rate operation
`mode name “RECOV” are printed, and mode indica-
`tors 5C are arranged in the same manner as in display
`unit 5 in FIG. 2.
`Switches SA, SB, 51, SZ, and SS are arranged on a
`watch case, as in FIG. 1. Fingerstall 2 with built-in
`pulse sensor 4 is connected to the case through cord 3.
`The operations