UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`HP INC.
`PETITIONER,
`
`v.
`
`JAMES B. GOODMAN
` PATENT OWNER
`____________
`
`Case IPR2017-01994
`Patent 6,243,315 B1
`____________
`
`Record of Oral Hearing
`Held: November 16, 2018
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`
`
`
`Before JUDGES BRIAN J. McNAMARA, PATRICK BOUCHER, and
`KIMBERLY McGRAW, Administrative Patent Judges.
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`HP INC.
`PETITIONER,
`
`v.
`
`JAMES B. GOODMAN
` PATENT OWNER
`____________
`
`Case IPR2017-01994
`Patent 6,243,315 B1
`____________
`
`Record of Oral Hearing
`Held: November 16, 2018
`____________
`
`
`
`Before JUDGES BRIAN J. McNAMARA, PATRICK BOUCHER, and
`KIMBERLY McGRAW, Administrative Patent Judges.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Case IPR2017-01994
`Patent 6,243,315 B1
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`APPEARANCES
`ON BEHALF OF THE PETITIONER:
` BARRY K. SHELTON, ESQUIRE
` SHELTON/COBURN, LLP
` 311 Ranch Road 620 S
` Suite 205
` AUSTIN, TEXAS 78734
` (512) 263-2165
`
` ANTHONY BACA, ESQUIRE
` INTELLECTUAL PROPERTY LITIGATION MANAGER
` HP INC.
` 11311 Chinden Boulevard
` Legal Department MS 314
` Boise, Idaho 83707
` (208) 333-6333
`
`ON BEHALF OF THE PATENT OWNER:
` DAVID FINK
` FINK & JOHNSON
` 7519 Apache Plume
` Houston, Texas 77071
` (713) 729-4991
`
`
`The above-entitled matter came on for hearing on Friday, November
`16, 2018, commencing at 10:00 a.m., at the U.S. Patent and Trademark
`Office, 600 Dulany Street, Alexandria, Virginia.
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`Patent 6,243,315 B1
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` P R O C E E D I N G S
` JUDGE McNAMARA: Please be seated.
` All right. Good morning, everybody. This is the
`trial hearing at HP Inc. vs. James B. Goodman, IPR2017-01994.
` I am Judge McNamara. Judges McGraw and Boucher are
`participating remotely. So, therefore, I'd like to remind
`the parties to use the microphone at the podium, and to
`identify any demonstrative or document that you might be
`referring to by page number, so that the Judges can find it
`in the record.
` Beginning with the Petitioner, would, Counsel,
`please introduce themselves.
` MR. SHELTON: Good morning, Your Honor. Barry
`Shelton of Shelton, Coburn LLP, Lead Counsel for HP Inc.
` MR. BACA: And, good morning. My name is Tony
`Baca. I'm HP Inc.'s In-house Counsel.
` JUDGE McNAMARA: Thank you. And you are?
` MR. FINK: Good morning, Your Honor. David Fink,
`for the Patent Owner and inventor.
` JUDGE McNAMARA: All right. Well, welcome to the
`Patent Trial and Appeal Board. Thank you all very much.
` The parties have agreed this morning to 30 minutes
`of argument per side, and we will begin with the Petitioner,
`and then we will hear any opposition from the patent
`owner. The Petitioner will then get an opportunity to
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`reserve some -- use whatever time is reserved for reply, and
`the Patent Owner may reserve time for a sur-reply.
` Okay. Is everybody ready to begin?
` MR. SHELTON: Yes, Your Honor.
` JUDGE McNAMARA: All right. So let's begin with
`the Petitioner.
` And do you want me to alert you to some amount of
`time remaining?
` MR. SHELTON: Yes, Your Honor. We reserve five
`minutes for rebuttal.
` JUDGE McNAMARA: All right.
` MR. SHELTON: And with the Board's approval, Mr.
`Baca will argue one of the points.
` JUDGE McNAMARA: That's perfectly fine.
` MR. SHELTON: Very good, your Honor.
` And so we'll argue for 25 minutes total.
` JUDGE McNAMARA: All right. I will let you know
`when the 25 minutes is up.
` MR. SHELTON: Thank you, Your Honor.
` There are two grounds for the challenged claims.
`There are four challenged claims here. Those would be
`1, 5, 10, and 16. I'll argue the issues with regard to ground
`1, and Mr. Baca will argue the sole issue with remain -- with
`regard to ground 2; and the combination of the Schaefer and
`Qureshi references, which are alleged to invalidate claims 1
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`and 5 of the '315 patent.
` So there are only three issues that are in dispute
`before this panel today; and the first is, whether the
`combination of Schaefer and Qureshi discloses the control
`device of claim 1, independent claim 1. And the issue within
`that larger phrase is whether the combination of those two
`patent -- prior references, meets the selectively
`electrically isolating element of claim 1.
` And then the second issue is, whether the
`combination of those same two references discloses the memory
`access enable control device of independent claim 1.
` Now, this case is probably unusual for this panel
`in that the Patent Owner has not proffered any evidence
`whatsoever. The only thing that the patent offer -- patent
`owner has done, is to provide attorney argument in response
`to the Petition, and then after the institution decision.
` The Patent Owner, therefore, under the rules of the
`Patent Trial and Appeal Board, of course, has waived any
`other basis for disputing the two grounds in the Petition.
` The Patent Owner did not dispute that the three
`prior references used in these two grounds, are actually
`prior to the '315 patent.
` The Patent Owner didn't adduce any evidence
`whatsoever in the two Responses. The only two exhibits that
`were proffered by the Patent Owner relate to claim
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`construction proceedings in the District Court action; and
`the Patent Owner did not rely on an expert declaration.
` The Patent Owner, likewise, didn't cross-examine
`our expert, Dr. Bagherzadeh, who has nearly 40 years of
`experience in memory devices.
`And, also, the Patent Owner didn't object to any of the
`evidence that was adduced by the Petitioner here.
` So turning to the first element; control device for
`selectively electrically isolating. This element is found in
`both independent claims 1 and 10. And the issue is, Your
`Honors have seen, is whether all control signals and all
`address signals must be selectively electrically isolated
`within the scope of the two independent claims or something
`less.
` And this is -- I'm showing the Board, Slide 6 from
`HP's Demonstrative Exhibit 1, and this is the entirety of the
`control device limitation from claim 1. This is at column
`13, lines 26 to 31; and it's really just the selectively
`electrically isolating part of this claim limitation that is
`an issue.
` Now, here I'm showing in slide 7 of Demonstrative
`Exhibit 1. On the right side, FIG. 1 from the '315 patent
`and two passages from the specification. And I suggest to
`the panel that in trying to answer this question about claim
`scope; about just what control signals and address signals
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`must be electrically isolated, that the specification,
`although, it doesn't say that it's all or some subset, all of
`the weight of the evidence within the specification is that
`it is a subset.
` And the patent itself defines errant control
`signals. Now, errant control signals is not a claim term in
`the challenged claims or any of the claims. But it seems
`that it does guide the inquiry into just what control signals
`actually have to be electrically isolated to be within the
`scope of the independent claims that are challenged.
` And the patent tells us that an errant control
`signal is one where signals that are received on that control
`line, at the memory device, might cause a result in the
`memory device that was not intended. And that suggests that
`this would've been a place to say all control signals, as
`well as other places in the specification doesn't say that.
` Now, the patent also tells us in column 6, lines 26
`to 28, that during the power down mode of the memory device,
`all input signals from the address bus 17 and control bus 22
`are isolated.
` Now, as you can see in FIG. 1, the address bus and
`control bus, those aren't all of the signals that are
`received on the -- this is a DIMM or a dual inline memory
`module connector. The address bus 17 and control bus 22,
`they're a subset of the signals.
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` And here's a -- I won't read this long passage, but
`in the specification column 5, lines 54 to 67, the patent
`tells us what it is that this address and control center 15,
`which is the control device of claims 1 and 10, what it does.
`And it, again, talks about isolating the address bus and
`control bus 22 from the memory devices, which are shown as
`number 5 on the right. And so the question really is, what
`control signals are within control bus 22, and what address
`lines are within address bus 17.
` Now, the only issue, though, before this panel, is
`-- has to do with the control signals. There's no dispute
`about address lines.
` And if we can have the next slide, please.
` Now, showing slide 9, here I have annotated FIG. 1
`from the '315 patent to show what are the respective address
`lines from claim 1, and claim 10, and the respect of control
`lines.
` Now, we see that there's other control lines; RAS
`which isrow address strobe, and WE which is write enable,
`and those are specifically called out as control lines. So
`those two control lines are inputs to the memory access
`enable control 30 in FIG. 1. And so those I submit are not
`part of the control bus 22. They are control lines, but they
`are control lines that are used to determine when memory is
`being accessed by that memory access enable control, which
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`then sends a signal called "power up and enable window", two
`signals, to the control device.
` So because the specification, in its written
`description, doesn't have a statement that all control lines
`are to be electrically isolated, this is, I think, compelling
`evidence that it's some portion of them. We know whatever is
`within the control bus 17 -- I'm sorry, 22, needs to be
`electrically isolated. But the patent actually doesn't
`really plainly delineate exactly what those are. But this
`figure, in conjunction with the text, does actually suggest
`that it's some subset of the control signals.
` JUDGE BOUCHER: Can I just ask, though, in the
`Patent Owner's Response, they clarify that the term "all" is
`referring to the specific address and control lines that
`communicate with memory devices, not address and control
`lines, in general.
` Is that, in any way, inconsistent with what you've
`just said?
` MR. SHELTON: It's not inconsistent, Your Honor,
`but it doesn't -- I don't think it answers the question,
`because it's not clear that -- because RAS, R-A-S and W-E,
`are control lines that go to the memory. The fact that
`they're broken out separately in FIG. 1 and in the
`description, it suggests that the right inquiry is not all of
`the signals -- all the control signals, that go to the memory
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`device. It's some subset of them, and that's what the patent
`teaches, and that's what this panel --
` JUDGE BOUCHER: So sub --
` MR. SHELTON: Sorry.
` JUDGE BOUCHER: So subset even of the subset that
`the Patent Owner identifies?
` MR. SHELTON: Yes, Your Honor. That's right.
` JUDGE BOUCHER: Okay.
` MR. SHELTON: I'd like to, next, turn this to slide
`10 of the demonstrative exhibit, and this is the entirety of
`the control device limitation for independent claim 10. And,
`again, although, this is written slightly differently. The
`issue is, again, selectively electrically isolating, and so
`this tracks exactly with the issue in independent claim 1.
` And so, we look at FIG. 4, which is the embodiment
`that's claimed in independent claim 10, and we see as with
`FIG. 1, the RAS and write enable control lines are broken out
`separately, and I have them highlighted here in blue. And
`then we have the address bus, which is now renamed 117 and
`the control bus 122. And you note that in the disclosure for
`this embodiment, there's not a memory access enabled control
`device. There's just a control device that does more.
` But even here, what the patent teaches -- and this
`is -- I have on the screen column 9, lines 31 to 48. What's
`taught in the written description, is that address bus 117 is
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`what must be electrically isolated and control bus 122 must
`be selectively -- electrically isolated during the power down
`mode. And, again, the fact that read -- the row address
`strobe and write enabled control lines is broken out
`separately, suggests that those are not included within
`control bus 122.
` Now, let's look at some of the arguments from the
`Patent Owner about this issue. On one hand, the Patent Owner
`says -- this is from the Patent Owner's Response to the
`Decision on the Petition on page 10. Patent Owner says "the
`RAS and WE control lines 26, 28 do not communicate with the
`memory devices 5," and then states a few lines down, that the
`purpose of those lines is not to communicate with the memory
`devices 5.
` The next slide, please.
` But on slide 3, we see another argument that those
`control lines, RAS and WE, do not need to be electrically
`isolated from the memory devices 5. But the -- but then,
`kind of paradoxically, the Patent Owner argues that because
`the address bus 17 and control bus 22 are isolated, that
`means that RAS and then a new line -- a new signal called
`"CAS," which is column address strobe, in write enable are
`electrically isolated, and that I submit is -- that can't be
`squared with the previous two arguments, because either the
`signals reach the device or they don't.
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` And then, finally, the Patent Owner argues that the
`constructioner, the scope of selectively electrically
`isolating, has to include all address and control signals,
`because that's what the District Court construed. But,
`actually, that wasn't part of the District Court's
`construction at all.
` The parties actually reached agreement on all
`terms, and that's simply not part of the construction and, in
`any event, of course, this panel should apply the broadest
`reasonable interpretation of the claim terms and certainly
`not bound to anything that the parties agreed to in the
`District Court case under the Phillips Standard.
` Now, the other issue that is real -- part and
`parcel of this issue in ground 1 is whether the CKE or clock
`enable signal, and the Schaefer reference is a clock signal
`that, therefore, means the combination cannot render claims 1
`and 10, the independent claims, obvious.
` And there is an issue here I'm -- my -- I'm sure
`that the panel may have looked for in vain in the patent for
`a clock enable signal to see whether the patentee considered
`that to be within the scope of control signal that has to be
`electrically isolated. And if you looked, you wouldn't have
`found it, because the type of memory that is used in this
`patent is asynchronous dynamic RAM. It doesn't have a clock
`enable signal, because it doesn't have a clock signal. It
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`wasn't clocked.
` The type of memory that is discussed in Schaefer and
`in Qureshi is synchronous dynamic RAM, which is the same that
`the Patent Owner accused in the District Court case.
` And so the patent doesn't provide any guidance as
`to those signals, but unlike row address strobe, column
`address strobe, and write enable, those are signals that are
`used by an asynchronous RAM to control its cycles, the
`clock signal and clock enable signals for a synchronous RAM
`have to be on all the time. They can't be electrically
`isolated or the memory won't function at all.
` And so I submit that because the greater way to the
`evidence from the written description and the figures of the
`'315 patent, suggest that the control signals that must be
`electrically isolated are a subset of those that are -- that
`go to the memory device that CKE and the clock signals should
`not be considered to be signals that have to be electrically
`isolated, because in this case in Qureshi and Schaefer, they
`can't be isolated or it won't work at all.
` That leaves me, unless the panel has any questions
`about this issue, I'll turn to the next issue in ground 1,
`and that's the memory access enable control device.
` So here the only issue that Patent Owner disputes
`is whether the combination of Schaefer and Qureshi teach this
`limitation that the memory access enable control device, and
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`this is just for claims 1 and 5, that it performs a function
`of determining when said memory system is not being accessed,
`because the patent teaches that when the memory system -- the
`memory devices are not being accessed, that is an opportune
`time to place those memory devices in the power down mode,
`which is that low power mode, and to institute the
`self-refresh of the DRAM memory device.
` So what the Patent Owner specifically argues,
`again, just in attorney argument not in evidence, is that the
`Qureshi reference requires a human to cause the JTAG memory
`test and to effect force the self-refresh mode and power down
`mode to be entered. But the Qureshi reference actually
`teaches that it has to follow the timing restrictions, and
`the control signal, and puts out a require to enter into the
`power down mode.
` So nothing in Qureshi actually says that a human
`actually has to control when it is that the self-refresh
`isn't entered.
` Now, I'm showing on slide 19 of our demonstrative
`exhibit, the entirety of the memory access enable control
`device limitation from claim 1, and, again, the only issue is
`whether the -- that device in the combination of Schaefer and
`Qureshi actually does check the memory and see if it's being
`accessed.
` Next, please.
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` This is what the Patent Owner has argued, that
`Qureshi teaches to initiate the low power mode prior to the
`JTAG testing without any determination as to whether those
`memory devices are being accessed.
` If we could see the next slide.
` Slide 21, Patent Owner also argues that the low
`power mode is entered by Qureshi without regard to any
`pending activities. However, this is right from Qureshi,
`this is Exhibit 1004, column 2, lines 3 to 12, it actually
`states in Qureshi that it doesn't permit the system clocks to
`be stopped until the memory controller unit has finished the
`current memory access operation.
` So it absolutely teaches that the JTAG controller
`honors whether an access is pending or is completed.
` So with that, I'll turn it over to Mr. Baca.
` MR. BACA: Thank you, Your Honors, for this
`opportunity.
` This is a real simple question, I think, at this
`point. The question of whether or not we have shown that the
`combination is proper.
` The Patent Owner did not review any of our
`accusations that together they show all of the limitations in
`10 and 16, and that them -- all of they provided, all of the
`Patent Owners provided on why the combination is improper is
`attorney argument.
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` In their Response on -- to our Petition, you see
`that the Petitioners failed to provide any technical
`argument. They make that statement.
` In their Response to the Decision to Institute,
`again, they repeat that the Petitioner has not provided any
`insight as to how the references can be combined. Even --
`Patent Owners even gone so far as to acknowledge that it is
`priorities, back-up batteries and the like as electrical
`power sources when the primary sources failed.
` But I put forth that we have provided, and this
`panel has agreed that we've provided sufficient evidence that
`the combination is proper, and that POSITA would have looked
`to Mazur to combine with Qureshi and Schaefer, to fill in for
`claim 10, the use of an auxiliary power source, a second
`power source battery, in this case. We talk about it here
`and, in fact -- hand me that real quick. Mazur even goes so
`far as to fill in one of the blanks on claim 10, and I'm -- I
`don't need to pull up the Elmo.
` If you look at claim -- sorry, column 4 in Mazur,
`column 4, line 27, it says, "refresh circuit 24 also acts to
`isolate the DRAM from the computer 16."
` So, again, we've met the burden that the
`combination is proper. This talks about isolating the DRAM;
`it talks about using a second power source when the first
`power source fails to meet the requirements in Mazur 4.8, in
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`Qureshi and Schaefer 3.3.
` So if there aren't any questions, we'll reserve the
`rest of our time. Thank you.
` JUDGE McNAMARA: All right. You have ten minutes
`left.
` Mr. Fink?
` MR. FINK: Thank you, Your Honor.
` JUDGE McNAMARA: Do you want me to alert you any
`time for rebuttal?
` MR. FINK: Five minutes.
` JUDGE McNAMARA: Okay. Well --
` MR. FINK: Standard five minutes.
` JUDGE McNAMARA: -- I'll let you know when you're
`-- when you've used up 25 minutes.
` MR. FINK: Could you wink at me when it's 20
`minutes?
` Initially, I want to thank the Board and my
`colleague, Mr. Shelton, for cooperating with me for this
`hearing and the timing.
` This hearing is extremely important to Mr.
`Goodman, the Patent Owner, because it provides an important
`opportunity to respond to the Reply written.
` Basically, everyone has mentioned that Mr. Goodman
`is a poor man. Okay. HP is rich. That's their superpower.
`So it's true. Mr. Goodman doesn't have an expert. On the
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`Case IPR2017-01994
`Patent 6,243,315 B1
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`other hand, here in this presentation, pages, columns, and
`lines were referred to. The fact that at the bottom it says,
`"expert declaration," doesn't change the fact that they are
`referring to a specific column and lines.
` And I could say this. I'm not an expert. I may be
`a little bit of an expert on gravity, but I assure you, if
`you drop the ball, it's going to fall. Now, you might say I
`don't know that's true, because you're not an expert, but I
`guarantee you, it will fall.
` So when we Patent Owner makes arguments, and it
`says, "column 4, 1, such, and such," the fact that it's an
`attorney saying that, should not undermine the value of the
`content of what is being referred to.
` In fact, most of the talk here, other than the
`small print at the bottom of slides, was made by attorneys.
`And I accept it, and I hope the Board accepts it.
` There is a statement here suggesting that the Board
`has corroborated with HP's arguments. But I wish to point
`out that when the Board made the conclusion to go forward
`with the IPR, they said, "Our factual findings and
`conclusions at this stage of the proceedings including claim
`constructions are preliminary and are based on the
`evidentiary record, develops so far. This is not a final
`decision as of the patent ability of the claims, for which
`the IPR is instituted." And the Board has made this
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`eminently clear, because in the conclusion, it says, "At this
`stage, the proceedings of the Board have not been made final.
`A final determination as the patent ability of any challenged
`claim or any underlying factual or legal issues, including
`claim construction."
` So when HP says that the Board has agreed with
`them; yes, temporarily. But that doesn't end it.
` The significant question that has been raised
`concerns the address and control lines being electrically
`isolated and for this purpose, HP has referred to Phillips
`vs. AWH Corp. 415 F.3d1303, 1312 (Fed. Cir. 2003).
` Now, I agree. The Patent Owner agrees. This isn't
`an important issue. But if we take a look at the patent and
`what the patent says, not what I say and not what some expert
`says.
` Okay. To start out with, HP and its Reply Brief
`at page 4, asserts that the two control lines; the RAS, row
`address alike and the WE, write enable, are not included in
`the control lines that make up control bus 22. And this was
`repeated here, this argument.
` I wish to remind everyone here, that this is a
`block diagram, not a circuit diagram. And the fact that
`the RAS and the WE appear some place shown in the block
`diagram, doesn't mean that they're not in any other place.
`They are, in fact, in two places.
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`Case IPR2017-01994
`Patent 6,243,315 B1
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` One, where it's shown in the block diagram in FIG.
`1 to inform the control device, whether or not access is
`being made, so that it can go to power down. Otherwise, the
`control would not know that it can go into power down. There
`is no line going from what is shown in FIG. 1 to the memory
`devices. So it's not necessary to particularly address what
`is shown in FIG.1, the RAS and the WE.
` I think it's important to look at the intent of the
`'315 patent in order to understand the scope of the claims.
`The intent of the '315 patent is to avoid harm or damage to
`the memory due to errant control signals, and this is in the
`patent at column 5, 13 to 16; and with respect to errant
`address signals, the patent at column 5, 16 to 19.
` It's also stated in the summary of the invention at
`column 4, 19 to 24, where it says, "for selectively
`electrically isolating memory devices so that when the memory
`devices are electrically isolated, any signal received on
`said respective control line and respective -- address lines
`do not reach the memory device." The --
` JUDGE McGRAW: Could you clarify, in the '315
`patent, do the RAS and WE control lines communicate with the
`memory devices or not? It's not clear --
` MR. FINK: They do, Your Honor. But they're in two
`places. In this place, it's being shown that it goes to the
`control -- this control device to inform it that there is no
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`Case IPR2017-01994
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`access being made, so that the system can go into power down.
` It also goes with the bundle of lines, the control
`lines bus, to the memory device. That's not shown in the
`drawing. But all of the control lines are in that control
`bus.
` So the answer's yes, except it's not detailed.
`It's not a detailed drawing. It's a block drawing.
` JUDGE BOUCHER: Right. So you just said they're in
`communication with the memory devices, and it wasn't -- and
`I'm not sure I fully followed your argument.
` Are you saying that those, the RAS and WE, are not
`subject to this selective isolation that's recited in the
`claim?
` MR. FINK: Your Honor, what I'm saying is that they
`are in two different places.
` What is shown is where they're going into the
`control device to inform it that there is no access being
`made to the memory. It's not shown that they also go to the
`memory device to actually select the address line and so
`forth.
` So it's just not shown. But those --
` JUDGE BOUCHER: Okay. So are they selective?
` MR. FINK: What?
` JUDGE BOUCHER: Are they selectively isolated or
`not?
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` MR. FINK: Yes, they are. Everything that goes to
`the memory device goes to the control bus, and everything in
`the control bus -- and I will quote the text from the patent,
`"everything is stopped."
` JUDGE BOUCHER: And that --
` JUDGE McGRAW: Where?
` JUDGE BOUCHER: -- includes what's shown in FIG. 4?
` MR. FINK: Yes. But as I say, the RAS and the WE
`appear in two different places. What is shown has to do with
`letting the system know that it can go into a power down.
`It's not shown where it goes into the memory device.
` JUDGE BOUCHER: Right. The implication is --
` MR. FINK: It's presumed --
` JUDGE BOUCHER: -- at --
` MR. FINK: -- it's part of the control bus.
` JUDGE BOUCHER: Right. But with respect to what is
`shown in FIG. 4, your position is that that is subject to the
`selective isolation?
` MR. FINK: In FIG. 4 you're talking about now?
` JUDGE BOUCHER: Yes.
` MR. FINK: FIG. 4 is actually for a different
`invention, and the point of FIG. 4, which is covered by claim
`10, is that if you're going to transf -- change from one
`power system to another power system, you don't want to cause
`damage to the memory. And it --
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` JUDGE BOUCHER: Yes. Okay.
` MR. FINK: -- is shown there.
` JUDGE BOUCHER: FIG. 1 then -- I just want to make
`sure I understand your position.
` The RAS and WE lines that are shown in FIG. 1, your
`position is that those are subject to the selective
`isolation?
` MR. FINK: Let me clarify.
` JUDGE BOUCHER: They're shown.
` MR. FINK: What is shown there never goes -- those
`lines, as they're shown, never go to the memory. They go to
`the control to tell the system that nothing is being
`accessed. They are different lines for the RAS and the WE,
`not shown in FIG. 1, which go to the control bus, which go to
`the memory device.
` JUDGE BOUCHER: Okay. I understand now. Thanks.
` MR. FINK: And so as I pointed out, the point of
`the patent is to protect the memory. It would hardly protect
`it if it allowed control lines to go there.
` And if I may point out, in fact -- as I was saying,
`the patent at column 5, 16 to 66, repeats the operation of
`isolating address control lines even with respect to FIG. 4.
` It appears to be the position of HP that when it
`refers -- when the patent claim says to stop the respective
`control lines and address lines, it only means some of them,
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`which completely misses the point of the patent.
` It -- the patent at column 6, 26 to 28 states,
`"During power down -- power mode" -- excuse me.
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