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`TSMC 1210
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`Physlcs World November 1995
`
`3
`
`PHYSICS
`world
`
`
`
`What future for X-rays?
`
`Why is Physics World not celebrating the centenary of the discovery of X-rays?
`Surely the discovery that won the first Nobel Prize in Physics — a mere six years
`after Rontgen stunned the world with photographs of human bones and other
`“invisible” objects — should be feted in these pages. And it is certainly cause for
`celebration that, thanks to synchrotron radiation sources, the world now has a
`copious supply of X—ray photons for a wide range of experiments in physics,
`chemistry, biology, materials and beyond.
`But it is also worth highlighting, as this issue does, the relentless increases in
`computer power made possible by advances in silicon technology, and the physics
`challenges facing that industry (pp 1 5—1 6 and 29-51). Indeed the X—ray and silicon
`worlds already overlap: X—ray lithography is a possible replacement for optical/
`ultraviolet systems as the feature sizes in integrated circuits approach 0.1 pm. And
`silicon components are playing an important role in X—ray optics as scientists
`struggle to cope with the heat-loads associated with the brightest X—ray sources.
`The silicon industry has a clear idea of where it has to go in the next few
`decades. What do we see if we gaze into an X—ray crystal ball? The traditional X-
`ray tube is now rarely used in research although at least one can be found in most
`airports, hospitals and dental surgeries. Synchrotron radiation sources obviously
`dominate the picture but the intense competition for beam-time means that there
`is also a demand for lab—sized sources.
`Plasma—based sources look the most promising. A laser-produced plasma can
`generate X-rays in a variety of ways:
`it is possible, for example, to set up a
`population inversion — the main prerequisite for laser behaviour — at X—ray
`wavelengths in a plasma. However, the take-up of X—ray lasers has been slow, with
`applications largely limited to probing other laser-produced plasmas (e. g. in laser
`fusion experiments). Nonlinear processes such as harmonic generation — in which
`odd numbers of photons are bundled into a single photon with a proportionally
`shorter wavelength — are just beginning to access the X—ray region. As it becomes
`possible to pack more laser energy into shorter pulses, nonlinear effects will
`increase. Exotic schemes involving the damping of plasma waves could produce
`photons at hard X—ray wavelengths.
`But the most promising of all the laser—plasma sources, from the applications
`point of view, are thermal plasmas. The black-body radiation from a million—
`degree plasma stretches into the X-ray region of the spectrum, and the strongest
`emission lines from the plasma are competitive with synchrotron sources in some
`types of experiment. Create a hundred of these mini-plasmas every second and
`you have a high-average-power source that can be used in lithography,
`microscopy and microfabrication. All you need is a table-top laser and a supply
`of low-Z material (such as the plastic on the back of audio cassette tapes!)
`All these X-rays are of little use without the associated optics and detectors. The
`count rates in X—ray experiments are enormous, and expensive materials like
`diamond may have to be pressed into service to cope with them. And X-ray optics
`is notoriously difficult: ordinary mirrors don’t work at normal incidence and give
`large aberrations that are hard to reduce when used at grazing incidence.
`Multilayers mirrors are used for near—normal incidence, but layers only a few
`atoms thick are needed, which leads to problems with interface roughness.
`Diffractive elements are best for high spatial resolution but currently have their
`own problems — mostly inefficiency.
`One remarkable aspect of the discovery of X—rays was the speed with which
`applications emerged. If X-rays continue to infiltrate applications other than
`radiography and research — IC fabrication for example — the consequences could
`be just as important.
`
`The contents of this magazine, including the views expressed above, are the responsibility
`of the editor. They do not represent the views or policies of the Institute of Physics except
`where explicitly identified as such.
`
`
`
`
`
`(cid:3) (cid:55)(cid:75)(cid:76)(cid:86)(cid:3)(cid:80)(cid:68)(cid:87)(cid:72)(cid:85)(cid:76)(cid:68)(cid:79)(cid:3)(cid:80)(cid:68)(cid:92)(cid:3)(cid:69)(cid:72)(cid:3)(cid:83)(cid:85)(cid:82)(cid:87)(cid:72)(cid:70)(cid:87)(cid:72)(cid:71)(cid:3)(cid:69)(cid:92)(cid:3)(cid:38)(cid:82)(cid:83)(cid:92)(cid:85)(cid:76)(cid:74)(cid:75)(cid:87)(cid:3)(cid:79)(cid:68)(cid:90)(cid:3)(cid:11)(cid:55)(cid:76)(cid:87)(cid:79)(cid:72)(cid:3)(cid:20)(cid:26)(cid:3)(cid:56)(cid:17)(cid:54)(cid:17)(cid:3)(cid:38)(cid:82)(cid:71)(cid:72)(cid:12)(cid:3)
`This material may be protected by Copyright law (Title 17 U.S. Code) WT Physics World November 1995
`
`35
`
`Silicides are a simple family of materials combining metal with
`silicon, but the latest generations of microchips have promoted
`these materials from the relative obscurity of inorganic chemistry
`to the forefront of semiconductor technology
`
`Simply irresistible
`silicides
`
`KAREN MAEX
`
`
`
`IF THE microelectronics industry is to continue to satisfy the
`demand for ever increasing amounts of memory from
`computers, it needs to manufacture devices on ever smaller
`scales. However, each new generation of logic chips
`depends on having materials with the right characteristics
`to make fabrication both economical and practical. In the
`latest generations‘of logic circuits, one group of materials,
`the silicides, has proved highly beneficial.
`The growing interest in the application of silicides
`to microelectronics has widened the scope of silicide
`research and opened up many new avenues of
`investigation. The focal point of much of this work
`has been in improving our understanding of how
`silicides behave in combination with the other
`materials found in devices. No new material would
`
`chips connecting transistors and other devices together)
`are the important factors for microprocessors. In both
`cases, memory bits are interconnected with long, narrow
`conductors known as “word lines”, and it turns out that
`interconnects made from silicides can speed up signal
`propagation times by lowering the electrical resistance of
`these lines. Indeed, a “polycide” technology, mainly based
`on WSiZ, introduced into industrial production lines more
`
`1 A metal oxide silicon field effect transistor (MOSFET) shown in cross-section
`(top) and viewed from above (bottom). Current flows from the source to the
`drain. The presence of the silicide helps to lower the resistance of the source
`and drain areas, a crucial factor in industry’s quest to manufacture ever smaller
`devices. Typical dimensions are indicated for 0.25 pm fabrication technology.
`
`
`ever be considered for device implementation unless
`industry was convinced that
`the material was
`compatible with current manufacturing processes
`and easily integrated into conventional
`integrated
`circuit (IC) technologies.
`Almost all metals in the periodic table react with
`silicon to form silicides, which have the general
`chemical formula MxSiy. Most silicides are metallic,
`have low resistivity and can be divided into three main
`categories. There are the “refractory metal silicides”,
`such as titanium silicide (TiSiz) and tungsten silicide
`(WSi), which generally have a high thermal stability;
`the “near-noble metal silicides”, such as platinum
`silicide (PtSi) and cobalt silicide, whose main asset
`lies in their chemical reactivity; and the “rare earth
`metal silicides”,
`like erbium silicide (ErSiZ), which
`are mainly investigated for their optical properties,
`such as their ability to absorb infrared light. Although
`the process of forming a silicide, known as
`“silicidation”, is complex, the material properties of
`silicides have been widely studied and extensive
`reviews are available (see Further reading).
`One driving technology behind current and future
`developments in microelectronics is complementary
`metal oxide silicon (CMOS). CMOS circuits have
`two main applications: memories and microproces—
`sors. High bit capacity —and hence large chip sizes — is
`the main feature of memory chips. Fast signal speeds
`and a high density of “interconnects” (the tracks on
`
`isolatior;,
`_
`.
`(siltconidioxidelm
`
`W interlevel diel
`
`trio”
`
`a;
`
`silicide
`
`runner (atoiys‘lilcon)
`
`
`
`Junction
`
`depth, (silicon dioxide)
`‘mplamekd
`soiurqxe (silicide):
`kdraln (silicide)
`iurlction
`
`an
`
`it?”
`
`—>l
`
`lfion um
`
` cdhtact (with tungsten
`
`date are;
`
`and aluminium or; top)
`
`source area
`
`‘
`drain area
`Asilicide)
`
`
`
`
`
`«1 pmf
`ifisfpacer
`,tsiitcon" dioxide)
`
`;
`
`_
`--
`
`
`
` 7w(silicide)
`
`I
`_
`’ ‘ I I
`a
`0.25 m
`t
`l
`A fl “X m ‘<‘ a «r. u“ i _
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`36
`
`Physics World November 1995
`
`
`
`
`
`
`
`best self—aligning properties are PtSi, NiSi, CoSiz and
`TiSi2 because their reaction with silicon is
`the most
`controllable. PtSi has been used extensively in bipolar and
`infrared detector applications. Unfortunately it has poor
`thermal stability and is not the ideal choice for a CMOS
`circuit. NiSi has also been investigated in detail, but it is
`unstable in contact with silicon. TiSiz and CoSiz are
`therefore the two main silicides that have been of interest
`
`to MOS technology. TiSiz is now widely accepted by
`integrated circuit manufacturers, but recent studies have
`shown that CoSi2 has even better properties and could also
`be considered a serious candidate.
`
`Hot smfi
`
`What happens when a metal reacts with silicon to form a
`silicide? In the case of titanium or cobalt, experiments on
`bulk reactants have given us a fairly good empirical idea of
`what is going on. However, we need to know what happens
`when a thin film of the metal reacts with the silicon. This
`
`long way from thermodynamic
`a
`type of system is
`equilibrium because the reaction takes place in the solid
`state at temperatures between 500 °C and 800 °C. Under
`these conditions the elements are able to diffuse, and the
`system can lower its free energy by forming a series of
`different intermetallic phases.
`The so-called “phase formation sequence” in the
`reaction between thin metal films and silicon has been
`
`investigated extensively since the late 19603 by F M
`d’Heurle at the IBM Yorktown Heights Laboratory in
`New York, M-A Nicolet at California Institute of Tech-
`nology in Pasadena and J Mayer at
`Cornell University, among many
`others. It turns out that the pres-
`ence of small amounts of contami—
`
`2 The specific resisti-
`vity of various silicides
`and some metals. In
`comparison. the speci-
`iic resistivity of highly
`doped silicon is
`~ 500 Mom.
`
`100
`
`v
`
`-
`
`TiSi2
`'— CoSig— NiSi
`
`—1'\AVIMO
`
`
`
`
`
`Resistivity(p.9/cm)
`
`
`
`than a decade ago, has improved propagation speeds by
`almost a factor of ten.
`
`However, when industry started manufacturing the
`0.5 pm generation of CMOS circuits about
`five years
`ago, it became clear that any further miniaturization would
`require technology changes to the transistor itself. This is
`where silicides have begun to play a key role. Figure 1
`shows a schematic cross—section of a typical metal oxide
`semiconductor field effect
`transistor
`(MOSFET)
`for
`0.25 pm technology. The critical dimensions are the gate
`length, which is used to define the “feature size” of the
`transistor quoted above, the depth of the p—n junctions
`forming the source and drain contacts, and the contact
`surfaces themselves. Electrical current mainly flows
`horizontally in the p—n junction of the contact, but the
`resistance to the flow of current depends on the cross-
`sectional area of the junction and its intrinsic resistivity.
`Because of the limit to the number of dopants that can be
`solubilized in a given volume of silicon, there is also a limit
`to the intrinsic resistivity of the junction. The unfortunate
`consequence of this is that as the junction depth decreases,
`the total resistance of the contact goes up, jeopardizing the
`
`WWTWMMMW
`
`Year of
`BIB/dub
`Ills/club
`Junction
`Feature
`production
`(SIAM)
`(DRAM)
`the (um) depth (pm)
`1992
`4 M
`16 M
`0.50
`0.20
`1995
`16 M
`64 M
`0.35
`0.15
`1998
`64 M
`256 M
`0.25
`0.12
`2001
`256 M
`1 G
`0.18
`0.10
`2004
`1 G
`4 G
`0.12
`0.08
`As the memory requlrement from computers continues to grow ever larger.
`each successive generation of logic circuits needs smaller and smaller
`features — including the p—n junction depth in transistors.
`Source: Semiconductor Industries Association Roadmap (1994).
`
`relative improvement of the device speed that one expects
`during scaling to smaller dimensions.
`To illustrate this point, table 1 gives typical junction
`depths for various generations of logic circuits. The
`expectation is
`that as
`the feature size (i.e.
`the gate
`length) of circuits falls from today’s 0.5 to 0.12 pm by
`the year 2004, the junction depth will have to shrink from
`0.2 to 0.08 pm. In other words, as the gate length is scaled
`down, the other critical dimensions of the transistors have
`to be reduced to keep performance at an acceptable level.
`It was to overcome these problems that many manu—
`facturers began to introduce a silicide fabrication step into
`the production of the 0.5 pm generation of circuits. In this
`process, known as “self—aligned silicide” or “salicide”, a
`silicide is simultaneously formed on the gate and source/
`drain areas through a reaction between the silicon and a
`metal, such as titanium or cobalt. The presence of the
`silicide lowers the resistivity of the junction. Although
`some metallic elements can have an even lower resistivity
`(figure 2), silicides are preferred because they form more
`stable contacts with silicon. Silicides also have the
`
`advantage that they oxidize in air, a process known as
`“self-passivation”, to produce a protective silicon dioxide
`(SiOz) surface barrier that prevents the silicide from being
`attacked during further processing.
`The lack of reactivity between metal and Si02 is a crucial
`factor because SiOz is also used as a dielectric layer
`isolating one component from the other. In addition,
`it
`bestows the unique property of self-alignment. This is a
`fabrication procedure in which two different materials, in
`this case the silicon and the silicide, can be accurately
`positioned one on top of the other. The silicides with the
`
`nants, such as oxygen or carbon -
`either in the metal or at the metal/
`
`silicon interface — have a big impact
`on the solid—state reaction. How—
`ever, if the reaction occurs in a well
`controlled environment, as is man—
`datory for microelectronic pro-
`cesses, the phase sequences shown
`in figure 3 are observed for
`the
`cobalt/silicon and the titanium/sili—
`con reactions.
`The reaction of a thin cobalt film
`with silicon was worked out theor-
`
`etically by Ulrich Gosele and King
`Ning Tu back in 1982. The cobalt
`diffuses into the silicon to form a
`
`cobalt-rich (CoZSi) phase (figure
`3a). This then turns into the
`monosilicide CoSi. Finally, when
`there is no free cobalt left, nuclea—
`tion of CoSi2 begins.
`For silicidation of titanium a
`
`different process takes place. Here
`the TiSiz phase forms immediately.
`However,
`there are two allotropic
`TiSiz phases, each with a different
`orthorhombic crystal structure (fig-
`ure 3b). One phase, referred to as
`C49, is full of defects and forms at
`temperatures below 600‘" C. The
`other phase, C54, forms at temper—
`atures above about 600” C. The
`
`latter is preferred because of its
`
`
`
`
`
`
`
`Physics World
`
`November 1995
`
`37
`
`a Co/Sl reaction
`
`
`
`
`
`
`
`b TilSi reaction
`
`
`
`lower resistivity (figure 2).
`the
`In both cases, however,
`silicide phase that ends up in
`thermal equilibrium with the
`silicon is
`the one with the
`lowest electrical
`resistivity.
`Because the solid solubility of
`titanium and cobalt in silicon is
`extremely low,
`titanium and
`cobalt impurities in silicon do
`not
`interfere with the almost
`ideal semiconducting proper-
`ties of silicon.
`Although the reaction
`between metal and silicon is
`
`important, so is the possibility
`of an interaction between the
`metal and any remaining Si02
`on the surface of the silicon that
`
`has not been properly removed.
`Cobalt has no significant inter—
`action with SiOz but titanium
`can reduce SiOz, because of its
`high reactivity with oxygen.
`Thus, when titanium is depos-
`ited on the surface of the silicon
`
`3 Thin films of cobalt or titanium can form Silicides by reacting with silicon. The reaction takes place in the
`solid state at temperatures of 500—800 °C, with each stage typically lasting 30 s. In both cases, various
`phases are encountered. (a) Cobalt first diffuses into the silicon to form a cobalt-rich (0028i) phase. This
`then turns into CoSi. Finally, when there is no more free cobalt left, CoSi2 starts to form. (b) The silicidation
`of titanium is different. The TiSiz phase forms immediately and there are two allotropic TiSiz phases - C49
`and CS4 — each of which has its own orthorhombic crystal structure.
`
`it is less critical for the surface to be perfectly clean. This
`has practical advantages because surface-cleaning pro—
`cedures, which are still somewhat problematic and poorly
`controlled, do not have to be so stringent in this case.
`
`Silicides in runners and gates
`
`is a term used to
`Ultralarge-scale integration (ULSI)
`describe the grouping of many electronic components in
`the form of large and complex integrated circuits onto a
`single chip. In these circuits the gate electrode and the
`local electrical connections consist of very narrow lines of
`silicon in polycrystalline form, known as “polysilicon”.
`Surrounding these lines are areas of SiOz (figure 4a).
`When such circuits are manufactured, a layer of metal is
`deposited onto each transistor (figure 4b). The idea is for
`the metal to react with the polysilicon, converting it into a
`silicide, but not with the SiOz (figure 46). Because the
`silicide should not form in surrounding regions,
`the
`reaction is said to be “laterally confined”.
`Although lateral confinement does not fundamentally
`change the reaction kinetics, these new boundary condi-
`tions may influence the rate at which the silicide lines are
`formed. This is particularly so for TiSi2. Here, the C49—
`C54 transition between the two different allotropic forms
`of TiSiz, which normally takes place at above 600 0C, is
`actually slowed down on these narrow polysilicon lines
`because of a lack of nucleation centres. However,
`the
`transition can be accelerated using rapid thermal proces—
`sing. In this technique a single wafer is heated by radiation
`from a lamp to around 800 CC for a couple of seconds.
`The higher temperature helps to yield more nucleation
`sites for the C54 phase and the short reaction time
`postpones the disintegration of the silicide film. For CoSiZ,
`however, these nucleation problems are not encountered:
`the CoSi—CoSig transformation (the final step in figure
`3a) occurs faster in thinner films than in the thicker ones.
`The thermal stability of thin silicide films on silicon is a
`major concern, since it limits the “thermal budget” allowed
`for further processing. This term refers to the fact that in
`integrated circuit processing it is important to limit the total
`exposure of the wafer to heat. The aim is to carry out
`
`reactions as fast and at as low a temperature as possible.
`Overexpose the wafer to heat, and the microstructure can
`fall apart
`through processes such as “grooving” and
`“islanding”. Both CoSi2 and TiSiz are polycrystalline and
`suffer from these problems during prolonged high-
`temperature treatments. Thermal grooving is influenced
`by both thermodynamic and kinetic factors. From a
`thermodynamic point of view,
`the driving force for the
`morphological
`transformation is
`the reduction of the
`interface/surface energies. The grooving process occurs
`because of local energy equilibrium at the intersection of a
`grain boundary and the film surface or interface, causing
`matter to diffuse away from the grain edges.
`
`Doping contacts
`
`The creation of a silicide on the source and drain regions
`in a MOS transistor reduces the total resistance to the
`
`the
`current flow. This resistance consists of two parts:
`intrinsic resistance in the channel region, which depends
`on the voltage applied to the gate, and the series resistance
`of the source—drain contacts between the doped junction
`and the metal that is used to wire all of the transistors
`
`together, which is independent of the applied bias. The
`contact between the wiring metal (through the silicide)
`and the silicon is said to be “ohmic” and its formation
`
`requires the silicon to be doped.
`Typical dopants in silicon include arsenic and phos-
`phorus as electron donors and boron as electron acceptors.
`Because these dopant elements are able to diffuse, they play
`an active role in the silicidation reaction. Since silicide films
`
`are polycrystalline, the diffusion of these dopants depends
`on the sum of two separate factors: diffusion in the bulk
`lattice and (much faster) along the grain boundary.
`For a TiSi2 film on the source or drain of a transistor, the
`diffusion of dopants can even lead to the formation of
`titanium/dopant compounds. This consumes most of the
`dopants, reducing the doping level at the interface between
`the silicide and the silicon. Since the concentration of
`
`dopants at the interface directly determines the quality of
`the ohmic contact, dopant depletion should be minimized.
`Cobalt silicidation works better in this respect
`than
`
`
`
`38
`
`Physics World November 1995
`
` a
`
`source
`
`gate (polysilicon)
`
`isolation (silicon dioxide)
`
`drain
`
`source
`
`spacer
`drain
`
`
`
`.rL
` r
`
`
`
`
`
`
`
`metal (titanium or cobalt)
`
`silicide (TiSi2 or CoSig)
`
`tungsten
`
`—l
`
`4 Diagram of the sell-aligned silicidation process in a transistor, by which two different materials, in this case the silicon and the silicide, can be
`layered accurately on top of each other. (a) Source/drain and gate regions made from polycrystalline silicon are first formed. (b) Titanium or cobalt
`metal is then deposited over the whole structure and the structure is heated to ~600 °C. The metal reacts with the silicon, but not with 3:02, to form a
`silicide on the three electrode areas. Silicon dioxide spacers on the side walls of the gate prevent shortages between the source/drain and the gate
`by acting as electrical isolation. (c) The unreacted metal is washed away in a selective chemical etch. A second thermal treatment terminates the
`self-aligned silicidation process, bringing the silicide to its lowest resistivity state. (d) Finally, the separate transistors are joined together with
`aluminium interconnects. Here only the first level of interconnects is shown.
`
`titanium because cobalt is chemically less reactive.
`For a laterally confined silicide the difference in lateral
`expansion of silicide and silicon during heat treatment
`creates stress fields in the silicon. The resulting force is
`almost entirely transmitted to the silicon lattice near the
`silicide edge through a small interfacial area. When the
`yield strength of silicon is exceeded, extended lattice
`defects may be created. Defect formation along silicided
`contact edges is therefore a potential problem.
`At temperatures above 600 OC, localized stress fields can
`cause plastic defamation of the silicon by generating
`dislocations, either heterogeneously by the capture and
`multiplication of existing dislocations or homogeneously
`by the condensation of silicon interstitials.
`
`Back at the end
`
`Silicidation is usually the last of the transistor fabrication
`steps. It is followed by the so-called “back—end” process,
`in which metal conductors are deposited on the chip,
`connecting the contact areas of the individual transistors to
`form an integrated circuit (figure 4d). Since both TiSi2
`and CoSi2 are metallic,
`the electrical contact between
`these areas and the interconnect metal on top is expected
`
`to be of high quality. In other words, the contact should be
`so stable that
`it does not chemically, physically or
`electrically disintegrate during further processing or
`during the transistor’s use. This requires careful control
`of the interactions between the interconnecting metal and
`the silicide.
`
`The current generation of integrated circuits has an
`interconnect technology based on aluminium and tung—
`sten. Unfortunately, the direct deposition of these metals
`onto silicides is problematic because they can react. For
`example, aluminium can react with CoSiz at 400 °C,
`yielding large silicon precipitates at the sample surface and
`the C02A19 compound at the CoSiz/Al interface. Alumi-
`nium can react with TiSiz at 400 °C to form large silicon
`precipitates and large aluminium pits in the underlying
`silicon substrate. At 550 °C,
`the ternary compound
`Ti7A158i12 can be formed.
`To prevent these unwanted reactions, a barrier layer can
`be used to help minimize the diffusion of aluminium and
`silicon through the silicide. Common barriers include TiN
`and TiW (figure 4d). The barriers also allow contacts to be
`formed on the silicon that are stable during heat
`treatments to temperatures as high as 550 °C. Another
`benefit of these barriers is that they promote adhesion of
`
`
`
`
`
`
`
`
`
`60812 on mono—Si area
`
`CoSiz on poly—Si area
`
`5 Scanning electron micrographs of a
`0.1 pm transistor after silicidation with
`CoSiz, in cross—section (top) and from
`above (bottom). The top CoSiz layer on
`the poiysiiicon is 0.1 um wide.
`
`Physics World November 1995
`
`39
`
`that minimize the amount of
`silicon that is consumed when
`silicide is formed in the junc—
`tion? One proposed material is
`NiSiZ, because it uses only half
`of the silicon atoms. However, it
`is unclear how one would avoid
`
`forming the more stable NiSi
`during later processing steps.
`Drastic changes to the back-
`end process are also expected
`over the next few years. Metals
`with a better conductivity than
`aluminium, such as copper,
`have been considered as poss—
`ible conductors to be deposited
`on the chips during this process,
`as have dielectrics with lower
`
`permittivity than SiOZ. Since the
`interconnect density is a driving
`force in the scaling of logic
`circuits, it is hoped that in this
`way RC delays and cross—talk
`problems between different
`wires can be eliminated.
`
`Changes in the back-end pro-
`cess will also have an impact on
`silicide integration. The intro-
`duction of new dielectric mate-
`
`rials often goes hand in hand
`with a reduction of the thermal
`
`
`
`
`
`
`budget, which is beneficial for
`the integrity of the already
`formed silicides. If copper is
`going to be a material
`for
`contacts and interconnects,
`new reaction barriers between
`the silicide and the copper will have to be introduced.
`The decreasing critical dimensions of MOS transistors
`will result in ever higher resistances. Therefore the use of
`pure metals, rather than silicides, on source/drain and gate
`electrodes could be attractive. Both tungsten and
`aluminium can be deposited selectively on silicon, and
`these metals could be considered as future alternatives to
`
`the tungsten interconnects to the silicide. Clearly,
`potential problems that would arise if tungsten were
`‘deposited directly onto the silicide are largely avoided.
`
`Future perspectives
`
`In 1994 the US Semiconductor Industry Association, the
`US network of microelectronics companies, government
`and academia, published a road-map describing future
`integrated circuit processes (see Yoshio Nishi “Silicon
`faces the future” p29). According to the report
`the
`0.25 pm generation of chips is expected to enter the
`production lines within the next three years. In the latest
`0.35 pm generation of circuits, which is currently on the
`verge of production, TiSi2 is the most commonly used
`silicide. However, further scaling of processes based on
`TiSig become increasingly difficult.
`CoSiz, on the other hand, allows much more flexibility
`in that respect. No limits for the implementation of CoSi2
`have been encountered down to critical dimensions of
`
`0.1 pm (figure 5). This is expected to be reached in the
`first decade of the next century. The possibility of forming
`CoSi2 epitaxially on silicon (i.e. with its orientation
`dependent on the silicon substrate) is another advantage.
`This might produce more stable contacts. However,
`industry will first have to be convinced that it is economic
`to switch from titanium to cobalt. It would rather stick
`with TiSi2 for the time being, even if it becomes ever more
`expensive and complicated to use.
`As ICs become smaller and the depth of the junction
`becomes shallower,