throbber
Yusuf Ceblebior~
`
`Analysis avd Design
`Sung-Mo Kang
`
`Third Edition
`
`TSMC 1011
`
`

`

`Physical and Materials Constants
`
`Boltzmann's constant
`
`1.38 x 10°23
`
`JK
`
`Electron charge
`
`Thermalvoltage
`
`Energy gapofsilicon (Si)
`
`Intrinsic carrier
`concentrationofsilicon (Si)
`
`Dielectric constant
`of vacuum
`
`Dielectric constant
`of silicon (Si)
`
`Dielectric constant
`ofsilicon dioxide (SiO,)
`
`1.6 x 1079
`
`0.026
`(at T = 300 K)
`
`1.12
`(at T = 300 K)
`
`1.45 x 10
`(at T= 300 K)
`
`8.85 x 10°74
`
`11.7 &
`
`3.97 x €,
`
`eV
`
`cm?
`
`F/em
`
`Fiem
`
`Fiem
`
`Commonly Used Prefixes for Units
`
`giga
`mega
`kilo
`milli
`micro
`nano
`
`pico
`femto
`
`MAURERZOQ
`
`10°
`10°
`10°
`103
`10°
`10°
`10°12
`105
`
`

`

`second edition
`
`GMOS
`DIGITAL
`INTEGRATED
`CIRCUITS
`
`Analysis and Design
`
`SUNG-Mo (STEVE) KANG
`University of Illinois at Urbana- Champaign
`
`YUSUF LEBLEBIGI
`Worcester Polytechnic Institute
`Swiss FederalInstitute of Technology-Lausanne
`
`-
`a WCB
`fim McGraw-Hill »
`
`Boston Burr Ridge, IL Dubuque,IA Madison, WI New York San Francisco St. Louis
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`

`

`Copyrighted Material
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`McGraw-Hill Higher Education 52
`(cid:6)(cid:3)(cid:18)(cid:16)(cid:11)(cid:17)(cid:1)(cid:4)(cid:14)(cid:15)(cid:15)(cid:22)(cid:5)(cid:12)(cid:13)(cid:10)(cid:22)(cid:2)(cid:9)(cid:21)(cid:8)(cid:7)(cid:20)(cid:19)(cid:22) (cid:1)(cid:2)
`A Division of The McGrawHilt Compariss
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`CM@S DIGITAL INTEGRATE® CIRCUITS: ANALYSIS AND DESIGN
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`TINRB EDITION
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`Published by McGraw-Hill. a busincss unit of The McGraw-Hill Companies. Inc., 122) Avenuc
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`of the Ainericas, New York, NY LO028. Copyright @ 2003, 1999, 04% by The McGraw-Hill
`(cid:125)(cid:71)(cid:156)(cid:80)(cid:55)(cid:18)(cid:154)(cid:114)(cid:57)(cid:133)(cid:83)(cid:49)(cid:146)(cid:4)(cid:183)(cid:84)(cid:18)(cid:192)(cid:206)(cid:13)(cid:11)(cid:50)(cid:29)(cid:1)(cid:52)(cid:75)(cid:101)(cid:206)(cid:13)(cid:9)(cid:10)(cid:17)(cid:8)(cid:5)(cid:54)(cid:19)(cid:125)(cid:127)(cid:181)(cid:134)(cid:86)(cid:78)(cid:81)(cid:100)(cid:183)(cid:11)(cid:239)(cid:17)(cid:12)(cid:22)(cid:6)(cid:54)(cid:22)(cid:31)(cid:31)(cid:31)(cid:10)(cid:206) (cid:29)(cid:41)(cid:239)(cid:67)(cid:177)(cid:183)(cid:59)(cid:96)(cid:85)(cid:183) (cid:72)(cid:114)(cid:79)(cid:174)(cid:178)(cid:192)(cid:11)(cid:58)(cid:134)(cid:145)(cid:145)(cid:206)
`Conipanies,fac, All righis served. Ne pic of this publica¥on moybe ceprodweed or fistrbured
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`v1any form or by any oleaos, o8 slosed in a ditabase or ecurieval sysico, without the ptioc wi iten
`(cid:87)(cid:115)(cid:183)(cid:26)(cid:181)(cid:183)(cid:148)(cid:239)(cid:125)(cid:135)(cid:183)(cid:111)(cid:197)(cid:206) (cid:104)(cid:156)(cid:198)(cid:206)(cid:111)(cid:58)(cid:41)(cid:114)(cid:145)(cid:6)(cid:183)(cid:21)(cid:34)(cid:145)(cid:162)(cid:55)(cid:54)(cid:183)(cid:134)(cid:156)(cid:206)(cid:35)(cid:34)(cid:52)(cid:25)(cid:33)(cid:9)(cid:27)(cid:6)(cid:47)(cid:57)(cid:11)(cid:21)(cid:52)(cid:157)(cid:60)(cid:99)(cid:155)(cid:95)(cid:58)(cid:178)(cid:43)(cid:96)(cid:183)(cid:155)(cid:178)(cid:158)(cid:163)(cid:82)(cid:132)(cid:114)(cid:7)(cid:183)(cid:28)(cid:135)(cid:219)(cid:170)(cid:180)(cid:206)(cid:218)(cid:239)(cid:128)(cid:139)(cid:84)(cid:125)(cid:134)(cid:183)(cid:193)(cid:175) (cid:135)(cid:157)(cid:194)(cid:206)
`consent of The 4¢Grew-Hill Counpanics. Im: _. including. byt mol limited! 1@ a any aciwosk or odhes
`(cid:115)(cid:167)(cid:163)(cid:179)(cid:123)(cid:159)(cid:180)(cid:206) (cid:125)(cid:3)(cid:35)(cid:80)(cid:55)(cid:183)(cid:81)(cid:126)(cid:52)(cid:198)(cid:226)(cid:62)(cid:161)(cid:170)(cid:171)(cid:239)(cid:38)(cid:138)(cid:11)(cid:131)(cid:145)(cid:65)(cid:133)(cid:105)(cid:155)(cid:5)(cid:183) (cid:59)(cid:161)(cid:117)(cid:206)(cid:5)(cid:6)(cid:183)(cid:98)(cid:131)(cid:72)(cid:113)(cid:170)(cid:77)(cid:102)(cid:8)(cid:183)(cid:9)(cid:53)(cid:48)(cid:57)(cid:20)(cid:25)(cid:34) (cid:96)(cid:98)(cid:104)(cid:25)(cid:12)(cid:1)(cid:52)(cid:183)(cid:24)(cid:2)(cid:34)(cid:24)(cid:115)(cid:183)(cid:44)(cid:181)(cid:183)(cid:123)(cid:164)(cid:94)(cid:183) (cid:125)(cid:135)(cid:183)(cid:12)(cid:239)
`elecBonic slocage of Wuosmussion, 47 breuleast for diskanee caning.
`(cid:121)(cid:149)(cid:126)(cid:114)(cid:206)(cid:94)(cid:206)(cid:22)(cid:34)(cid:25)(cid:13)(cid:116)(cid:114)(cid:145)(cid:113)(cid:147)(cid:149)(cid:91)(cid:125)(cid:114)(cid:7)(cid:183)(cid:13)(cid:239)(cid:119)(cid:172)(cid:222)(cid:159)(cid:235)(cid:80)(cid:239)(cid:72)(cid:125)(cid:134)(cid:183)(cid:77)(cid:97)(cid:155)(cid:167)(cid:135)(cid:73)(cid:82)(cid:183)(cid:120)(cid:132)(cid:94)(cid:6)(cid:183)
`
`Some ansWarnies, including cleccronic and Print cemponcols, muy Nut be vvusluble 10 cussomers
`(cid:102)(cid:140)(cid:239)(cid:8)(cid:49)(cid:24)(cid:12)(cid:14)(cid:26)(cid:18)(cid:43)(cid:1)(cid:52)(cid:136)(cid:158)(cid:118)(cid:189)(cid:120)(cid:139)(cid:158)(cid:128)(cid:206)(cid:66)(cid:63)(cid:163)(cid:125)(cid:115)(cid:84)(cid:46)(cid:183)(cid:41)(cid:121)(cid:53)(cid:183)(cid:131)(cid:84)(cid:105)(cid:183)(cid:50)(cid:103)(cid:127)(cid:125)(cid:22)(cid:21)(cid:114)(cid:156)(cid:151)(cid:12)(cid:183)(cid:185)(cid:14)(cid:239)(cid:131)(cid:2)(cid:160)(cid:183) (cid:9)(cid:50)(cid:57) (cid:46)(cid:152)(cid:6)(cid:46)(cid:179)(cid:180)(cid:45)(cid:66)(cid:239)(cid:153)(cid:125)(cid:183) (cid:56)(cid:175)(cid:125)(cid:109)(cid:47)(cid:134)(cid:145)(cid:183)
`oulside the Uniaed Stutes.
`(cid:125)(cid:166)(cid:92)(cid:86)(cid:53)(cid:56)(cid:183) (cid:154)(cid:80)(cid:56)(cid:183)(cid:37)(cid:114)(cid:88)(cid:154)(cid:64)(cid:183) (cid:89)(cid:180)(cid:187)(cid:185)(cid:26)(cid:17)(cid:206)
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`‘This book is prinecd on acid-frec paper.
`(cid:7)(cid:26)(cid:57)(cid:11)(cid:12)(cid:57)(cid:5)(cid:45)(cid:57)(cid:197)(cid:97)(cid:154)(cid:11)(cid:77)(cid:183)(cid:19)(cid:34)(cid:64)(cid:72)(cid:100)(cid:77)(cid:180)(cid:93)(cid:151)(cid:143)(cid:183)(cid:31)(cid:130)(cid:135)(cid:8)(cid:183)
`
`Incmations!
`(cid:68)(cid:158)(cid:46)(cid:114)(cid:125)(cid:116)(cid:125)(cid:17)(cid:109)(cid:183)
`Dontesic
`(cid:92)(cid:125)(cid:159)(cid:238)(cid:114)(cid:206)
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`234567890 QPF/QPFO9876543
`(cid:18)(cid:54)(cid:44)(cid:28)(cid:54)(cid:31)(cid:32)(cid:54)(cid:36)(cid:54) (cid:38)(cid:54)(cid:28)(cid:13)(cid:183)(cid:57)(cid:54)(cid:42)(cid:12)(cid:57)(cid:54)(cid:18)(cid:1)(cid:14)(cid:29)(cid:183)(cid:26)(cid:24)(cid:23)(cid:22)(cid:183)(cid:24)(cid:206)(cid:23)(cid:54)
`23+.567890 QPF/QPF 89876543
`(cid:17)(cid:54)(cid:24)(cid:3)(cid:16)(cid:54)(cid:31)(cid:34)(cid:54)(cid:37)(cid:54)(cid:38)(cid:54)(cid:40)(cid:239)(cid:27)(cid:239)(cid:8)(cid:7)(cid:2)(cid:8)(cid:7)(cid:36)(cid:8)(cid:54)(cid:29)(cid:183)(cid:39)(cid:239)(cid:36)(cid:54)(cid:33)(cid:54)(cid:45)(cid:54)(cid:27)(cid:54)(cid:25)(cid:54)
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`ISBN 687-246053 >
`(cid:62)(cid:90)(cid:41)(cid:76)(cid:206) (cid:42)(cid:36)(cid:1)(cid:17)(cid:28)(cid:35)(cid:30)(cid:24)(cid:4)(cid:54)
`ISBN @07-119644-7 (ISE)
`(cid:63)(cid:91)(cid:42)(cid:77)(cid:206)(cid:203)(cid:12)(cid:22)(cid:23)(cid:32)(cid:25)(cid:14)(cid:29)(cid:5)(cid:89)(cid:52)(cid:6)(cid:206)
`
`Publishes: Evisaberk A Sones
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`Senior SpOUsoring edalee: Curtite Pyulsert
`(cid:34)(cid:55)(cid:117)(cid:83)(cid:125)(cid:134)(cid:183)(cid:46)(cid:47)(cid:10)(cid:11)(cid:40)(cid:27)(cid:34)(cid:45)(cid:2)(cid:52)(cid:19)(cid:16)(cid:24)(cid:32)(cid:6)(cid:52)(cid:51)(cid:206)(cid:234)(cid:138)(cid:239)(cid:95)(cid:181)(cid:239)
`Developmental adi: Micivifle & Mira rstnahaye
`(cid:23)(cid:177)(cid:56)(cid:96)(cid:125)(cid:127)(cid:110)(cid:55)(cid:122)(cid:96)(cid:42)(cid:96)(cid:183)(cid:83)(cid:77)(cid:104)(cid:140)(cid:149)(cid:32)(cid:183)(cid:79)(cid:168)(cid:178)(cid:216)(cid:239)(cid:34)(cid:35)(cid:239)(cid:16)(cid:14)(cid:15)(cid:36)
`Exccusive markcting inanoger: Jor Warnemuber
`(cid:52)(cid:196)(cid:124)(cid:114)(cid:188)(cid:181)(cid:135)(cid:191)(cid:121)(cid:206)(cid:16)(cid:115)(cid:146)(cid:114)(cid:94)(cid:183)(cid:30)(cid:14)(cid:34)(cid:13)(cid:21)(cid:18)(cid:39)(cid:4)(cid:54)(cid:7)(cid:36)(cid:23)(cid:33)(cid:54)(cid:110)(cid:137)(cid:183)(cid:136)(cid:194)(cid:239)
`Senior pryject manager: Rew Koos
`(cid:33)(cid:55)(cid:117)(cid:83)(cid:125)(cid:136)(cid:183)(cid:41)(cid:43)(cid:40)(cid:28)(cid:19)(cid:46)(cid:57)(cid:154)(cid:105)(cid:159)(cid:106)(cid:130)(cid:127)(cid:34)(cid:206)(cid:98)(cid:186)(cid:24)(cid:239)(cid:73)(cid:74)(cid:239)
`Produetion super visor; SAeny & Kame
`(cid:85)(cid:174)(cid:168)(cid:188)(cid:125)(cid:156)(cid:206)(cid:145)(cid:173)(cid:130)(cid:134) (cid:2)(cid:84)(cid:14)(cid:15)(cid:183)(cid:101)(cid:213) (cid:125)(cid:195)(cid:196)(cid:230)(cid:239)(cid:30)(cid:31)(cid:34)(cid:7)(cid:10)(cid:34)
`Media preject manager: Jeot AC Barncwetz
`(cid:50)(cid:89)(cid:97)(cid:64)(cid:183)(cid:145)(cid:153)(cid:82)(cid:19)(cid:183)(cid:32)(cid:41)(cid:2)(cid:54)(cid:8)(cid:37)(cid:24)(cid:54) (cid:72)(cid:239)
`(cid:137)(cid:159)(cid:183)
`Senior nishis wehnology ywexducer: Pullip Meek
`(cid:34)(cid:55)(cid:122)(cid:88)(cid:125)(cid:134)(cid:183) (cid:106)(cid:65)(cid:83)(cid:40)(cid:183)(cid:26)(cid:149)(cid:158)(cid:125)(cid:24)(cid:36)(cid:146)(cid:141)(cid:80)(cid:173)(cid:76)(cid:147)(cid:31)(cid:183)(cid:55)(cid:123) (cid:121)(cid:122)(cid:110)(cid:144)(cid:183)(cid:77)(cid:86)(cid:167)(cid:239)
`Coordinator of fcectance dzxignn Kick O, Nuel
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`QOeover designer: Sheila Barret
`(cid:46)(cid:127)(cid:206)(cid:77)(cid:16)(cid:155)(cid:134)(cid:94)(cid:18)(cid:147)(cid:4)(cid:34)(cid:100)(cid:150)(cid:215)(cid:239)(cid:48)(cid:49)(cid:221)(cid:239)
`Cover invaye: DEC Alaa sicrpmeessar clip pRowoprapli, ceurtesy Aticiael Onvidsaa, Florida State
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`GCaiversiiy Nationeld (teh Magaesic Field Lubearoiens
`(cid:12)(cid:33)(cid:26)(cid:51)(cid:40)(cid:43)(cid:24)(cid:49)(cid:52)(cid:54)(cid:28)(cid:107)(cid:85)(cid:125)(cid:144)(cid:183)(cid:5)(cid:22)(cid:30)(cid:44)(cid:52)(cid:79)(cid:113)(cid:139)(cid:220)(cid:202)(cid:239)(cid:147)(cid:2)(cid:156)(cid:217)(cid:200)(cid:239)(cid:76)(cid:224) (cid:199) (cid:223) (cid:239)
`Cosnposiler: fureractne Composition Conpurwtiun
`(cid:45)(cid:167)(cid:155)(cid:173)(cid:141)(cid:22)(cid:172)(cid:33)(cid:206)(cid:27)(cid:28)(cid:16)(cid:31)(cid:15)(cid:45)(cid:10)(cid:35)(cid:19)(cid:54)(cid:6)(cid:46)(cid:24)(cid:29)(cid:53)(cid:54)(cid:5)(cid:42)(cid:38)(cid:46)(cid:25)(cid:9)(cid:47)(cid:54)
`Typeface: 702 Tisraes Renset
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`Printer: @uebecur Wheld Pricficht Ad
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`Library uf Congress Catilegiog-In-Publication Dsea
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`
`Kang, Suog-Me, 1$45-
`(cid:69)(cid:107)(cid:160)(cid:129)(cid:9) (cid:92)(cid:186)(cid:162)(cid:129)(cid:200)(cid:204)(cid:67)(cid:80)(cid:9)(cid:206)(cid:22)(cid:31)(cid:24)(cid:27)(cid:15)
`CMOSdigital inicesated circuits ; unal¥sis und dagagn / Sung-Mo (Steve) Kang. Yusuf
`(cid:19)(cid:27)(cid:29)(cid:34)(cid:183)(cid:53)(cid:88)(cid:76)(cid:89)(cid:156)(cid:42)(cid:97)(cid:183) (cid:84)(cid:108)(cid:69)(cid:41)(cid:156)(cid:48)(cid:54)(cid:183)(cid:9)(cid:132)(cid:23)(cid:98)(cid:180)(cid:145) (cid:5)(cid:34)(cid:114)(cid:112)(cid:169)(cid:228)(cid:209)(cid:155)(cid:208)(cid:239)(cid:42)(cid:182)(cid:132)(cid:239)(cid:77)(cid:33)(cid:14)(cid:94)(cid:115)(cid:183)(cid:64)(cid:239)(cid:91)(cid:169)(cid:131)(cid:128)(cid:11)(cid:72)(cid:125)(cid:183)(cid:3)(cid:88)(cid:144)(cid:205)(cid:7)(cid:206)(cid:44)(cid:64)(cid:131)(cid:94)(cid:6)(cid:183)(cid:38)(cid:170)(cid:145)(cid:168)(cid:138)(cid:183)
`LebbebicL —3rd ed.
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`PR
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`1. Metal oxide semicenductors. Complementary. 2. Digitil imegred rircvirx. 1. Leblebici,
`(cid:16)(cid:6)(cid:183)(cid:50)(cid:91)(cid:109)(cid:183) (cid:137)(cid:175)(cid:97)(cid:81)(cid:183)(cid:159)(cid:127)(cid:101)(cid:77)(cid:139)(cid:74)(cid:168)(cid:157)(cid:9)(cid:183)(cid:19)(cid:125)(cid:103)(cid:127)(cid:97)(cid:55)(cid:103)(cid:68)(cid:160)(cid:179)(cid:182)(cid:9)(cid:183) (cid:36)(cid:17)(cid:239)(cid:40)(cid:98)(cid:94)(cid:97)(cid:17)(cid:34)(cid:78)(cid:183)(cid:28)(cid:37)(cid:51)(cid:42)(cid:52)(cid:15)(cid:41)(cid:48)(cid:24)(cid:44)(cid:43)(cid:3)(cid:52) (cid:211)(cid:239)(cid:107)(cid:67)(cid:145)(cid:141)(cid:9)(cid:206)
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`Cupyneha ® 2003. Exclusove sights by The Mc Graw-Hil] Companies. Inc, For mamulgytore wel
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`expurt. This book cansiut be re-experted frethe countcy to which it is sold by MeGraw-ill.
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`
`ww w.mbhe. cam
`(cid:180)(cid:180)(cid:180)(cid:10)(cid:103)(cid:79)(cid:82)(cid:10)(cid:51)(cid:183)
`
`Copyrighted Material
`(cid:3)(cid:25)(cid:28)(cid:19)(cid:17)(cid:18)(cid:34)(cid:12)(cid:11)(cid:36)(cid:5)(cid:10)(cid:33)(cid:12)(cid:30)(cid:19)(cid:10)(cid:23)(cid:36)
`
`

`

`CONTENTS
`
`
`
`PREFACE
`
`1
`
`INTRODUCTION
`
`.
`1.1 Historical Perspective .
`1.2
`Objective and Organization of the Book
`1.3.
`A Circuit Design Example
`
`'
`
`2
`
`FABRICATION OF MOSFETs
`
`2.1
`2.2
`2.3.
`2.4
`2.5
`
`Introduction
`Fabrication Process Flow: Basic Steps
`The CMOSn-Well Process
`Layout Design Rules
` Full-Custom Mask Layout Design
`References
`Exercise Problems
`
`3
`
`MOS TRANSISTOR
`
`3.1
`3.2
`3.3
`
`The Metal Oxide Semiconductor (MOS)Structure
`The MOS System under External Bias
`Structure and Operation of MOS
`Transistor (MOSFET)
`3.4 MOSFET Current-Voltage Characteristics
`3.5
`MOSFETScaling and Small-Geometry Effects
`3.6
`MOSFETCapacitances
`References
`Exercise Problems
`
`xi
`
`55
`66
`81
`97
`110
`111
`
`

`

`vi
`
`-
`
`Contents
`
`MODELING OF MOS TRANSISTORS
`USING SPICE
`
`Basic Concepts
`4.1
`The LEVEL 1 Model Equations
`4.2.
`4.3. The LEVEL 2 Model Equations
`4.4
`The LEVEL 3.Model Equations
`4.5
`Capacitance Models
`4.6
`Comparison of the SPICE MOSFET Models
`References
`Appendix: Typical SPICE Model Parameters
`Exercise Problems
`
`MOS INVERTERS: STATIC CHARACTERISTICS
`
`5.1
`5.2
`5.3.
`5.5
`
`Introduction
`Resistive-Load Inverter
`Inverters with n-Type MOSFET Load
`CMOSInverter
`References
`Exercise Problems
`
`MOS INVERTERS: SWITCHING CHARACTERISTICS
`AND INTERCONNECTEFFECTS
`
`6.1
`6.2
`6.3
`6.4
`6.5
`6.6
`6.7.
`
`Introduction
`Delay-Time Definitions
`Calculation of Delay Times
`Inverter Design with Delay Constraints
`Estimation of Interconnect Parasitics
`Calculation of Interconnect Delay
`Switching Power Dissipation of CMOSInverters —
`References
`Appendix: Super Buffer Design
`Exercise Problems
`
`COMBINATIONAL MOSLOGIC CIRCUITS
`
`7.1
`7.2
`7.3.
`7.4
`7.5
`
`Introduction
`MOSLogic Circuits with Depletion nMOS Loads
`CMOSLogic Circuits
`Complex Logic Circuits
`CMOSTransmission Gates (Pass Gates)
`References
`Exercise Problems
`
`117
`
`118
`119
`123
`130
`131
`135
`137
`138
`139
`
`141
`
`141
`149
`160
`(172
`190
`191
`
`196
`
`196
`198
`200
`210
`222
`234
`242
`250
`251
`254
`
`259
`
`259
`260
`274
`281
`295
`305
`306
`
`

`

`Vii
`
`Contents
`
`SEQUENTIAL MOS LOGIC CIRCUITS
`
`Introduction
`Behavior of Bistable Elements
`The SR Latch Circuit
`Clocked Latch and Flip-Flop Circuits
`CMOSD-Latch and Edge-Triggered Flip-Flop
`Appendix: Schmitt Trigger Circuit
`Exercise Problems
`
`DYNAMIC LOGIC CIRCUITS
`
`9.1
`9.2
`9.3
`9.4.
`
`Introduction
`Basic Principles of Pass Transistor Circuits
`Voltage Bootstrapping
`Synchronous Dynamic Circuit Techniques
`High-Performance Dynamic CMOSCircuits
`References
`Exercise Problems
`
`10
`
`SEMICONDUCTOR MEMORIES
`
`10.1
`10.2
`10.3
`10.4
`
`Introduction
`Read-Only Memory (ROM)Circuits
`Static Read-Write Memory (SRAM)Circuits
`Dynamic Read-Write Memory (DRAM)Circuits
`References
`Exercise Problems |
`
`11
`
`LOW-POWER CMOS LOGIC CIRCUITS
`
`312
`
`312
`314
`320
`326
`» 334
`341
`345
`
`350
`
`350
`352
`365
`368
`378
`395
`396
`
`402
`
`402
`405
`417
`435
`447
`447
`
`451
`
`Introduction
`11.1
`451
`Overview of Power Consumption
`11.2
`452
`Low-Power Design Through Voltage Scaling
`11.3.
`463
`11.4—_Estimation and Optimization of Switching Activity
`474
`11.5
`Reduction of Switched Capacitance
`480
`11.6
`Adiabatic Logic Circuits
`482
`References
`489
`Exercise Problems |
`490
`
`12
`
`BiCMOS LOGIC CIRCUITS
`
`Introduction
`12.1
`12.2 Bipolar Junction Transistor (BJT):
`Structure and Operation
`
`491
`
`491
`
`494
`
`

`

`Vili
`
`Contents
`
`12.3
`12.4
`12.5
`12.6
`
`Dynamic Behavior of BJTs
`Basic BiCMOSCircuits: Static Behavior
`Switching Delay in BiCMOSLogicCircuits
`BiCMOSApplications
`References
`Exercise Problems
`
`13.
`
`CHIP INPUT AND OUTPUT(I/O) CIRCUITS
`
`13.1
`13.2
`
`13.3
`13.4
`13.5
`13.6
`
`Introduction
`ESDProtection
`Input Circuits
`- Output Circuits and L(di/dt) Noise
`On-Chip Clock Generation and Distribution
`Latch-Up andIts Prevention
`References
`Exercise Problems
`
`14
`
`VLSI DESIGN METHODOLOGIES
`
`14.1
`14.2
`14.3
`14.4
`14.5
`14.6
`14.7
`14.8
`
`Introduction
`VLSI Design Flow
`Design Hierarchy
`Concepts of Regularity, Modularity and Locality
`VLSI Design Styles
`Design Quality
`Packaging Technology
`Computer-Aided Design Technology
`References
`Exercise Problems
`
`15
`
`DESIGN FOR MANUFACTURABILITY
`
`15.1
`15.2
`15.3
`15.4
`15.5
`15.6
`15.7
`15.8
`
`Introduction
`Process Variations
`Basic Concepts and Definitions
`Design of Experiments and Performance Modeling
`Parametric Yield Estimation
`Parametric Yield Maximization
`Worst-Case Analysis
`Performance Variability Minimization
`References
`_Exercise Problems
`
`509
`516
`519
`524
`529
`530
`
`534
`
`534
`535
`538
`543
`549
`555
`562
`563
`
`566
`
`566
`569
`- 570
`573
`576
`586
`589
`592
`593
`594
`
`598
`
`598
`599
`601
`608
`615
`621
`622
`628
`633
`633
`
`

`

`16
`
`DESIGN FOR TESTABILITY
`
`16.1
`16.2
`16.3
`16.4
`16.5
`16.6
`16.7
`
`Introduction
`;
`Fault Types and Models
`Controllability and Observability
`Ad Hoc Testable Design Techniques
`Scan-Based Techniques
`Built-In Self Test (BIST) Techniques
`Current Monitoring Ippo Test
`References
`Exercise Problems
`
`,
`
`INDEX
`
`ix
`
`Contents
`
`638
`
`638
`638
`642
`644
`646.
`648
`651
`653
`653
`
`655
`
`

`

`ABOUTTHE AUTHORS
`
`
`
`Sung-Mo(Steve) Kang received the Ph.D.degree in electrical engineering from the
`University of California at Berkeley. He has worked on CMOS VLSIdesign at AT&T
`Bell Laboratories at Murray Hill, N.J. as supervisor and memberof technical staff of
`high-end CMOS VLSI microprocessor design. Currently, he is professor and headof the
`departmentofelectrical and computerengineeringat the University ofIllinois at Urbana-
`Champaign. He wasthe foundingeditor-in-chiefof the IEEE Transactions on Very Large
`Scale Integration (VLSI) Systemsand hasserved on editorial boardsof several IEEE and
`international journals. He has received a Humboldt Research Award for Senior US
`Scientists, IEEE Graduate Teaching Technical Field Award, IEEE Circuits and Systems
`Society Technical Achievement Award, SRC Inventor Recognition Awards, IEEE CAS
`Darlington Prize Paper Award and other best paper awards. He has also co-authored
`DesignAutomationfor Timing-Driven Layout Synthesis, Hot- CarrierReliability ofMOS
`VLSI Circuits, Physical Design for Multichip Modules, and Modeling of Electrical
`Overtstress in Integrated Circuits from Kluwer Academic Publishers, and Computer-
`Aided Design of Optoelectronic Integrated Circuits and Systems from Prentice Hall.
`
`Yusuf Leblebici received the Ph.D. degree in electrical and computer engineering
`from the University of Illinois at Urbana-Champaign. He was a visiting assistant
`professorof electrical and computer engineering at the University of Illinois at Urbana-.
`Champaign;associate professor of electrical and electronics engineering at Istanbul .
`Technical University, and invited professor of electrical engineering at the Swiss
`Federal Institute of Technology in Lausanne, Switzerland. Currently, he is an associate
`professor of electrical and computer engineering at Worcester Polytechnic Institute.
`Dr. Leblebici is also a member of technical staff at the New England Center for
`Analog and Digital Integrated Circuit Design. His research interests include high-
`performancedigital integrated circuit architectures, modeling and simulation of semi-
`conductor devices, computer-aided design of VLSI circuits, and VLSIreliability analy-
`sis. He has received a NATO Science Fellowship Award, has been an HonorsScholar
`of the Turkish Scientific and Technological Research Council, and has received the
`Young Scientist Award of the same council. Dr. Leblebici has co-authored aboutfifty
`technical papers and two books.
`
`

`

`PREFACE
`
`Complementary metal oxide semiconductor (CMOS)digital integrated circuits are the
`enabling technology for the modern information age. Becauseoftheir intrinsic features
`in low-power consumption,large noise margins, and ease of design, CMOSintegrated -
`circuits have been widely used to develop random access memory (RAM)chips,
`microprocessor chips, digital signal processor (DSP) chips, and application- specific
`integrated circuit (ASIC) chips. The popular use of CMOScircuits will grow with the
`increasing demands for low-power, low-noise integrated electronic systems in the
`developmentofportable computers,personaldigital assistants (PDAs),portablephones,
`and multimedia agents.
`Since the field ofCMOS integratedcircuits aloneis very broad,it is conventionally
`divided into digital CMOScircuits and analog CMOScircuits. This book is focused on
`the CMOSdigital integrated circuits. At the University ofIllinois at Urbana-Champaign, ’
`we havetried someofthe available textbooks on digital MOSintegrated circuits for our
`senior-level technical elective course, ECE382- Large Scale Integrated Circuit Design.
`Students andinstructorsalike realized, however, thatthere was.a need for anew bookwith
`more comprehensive treatment of CMOSdigital circuits. Thus, our textbook project was
`initiated several years ago by assembling our ownlecturenotes. Since 1993, we have used
`evolving versionsof this material at the University of Illinois at Urbana-Champaign,at
`Istanbul Technical University and at the Swiss Federal Institute of Technology in
`‘Lausanne. Both authors were very much encouraged by comments fromtheir students,
`colleagues, and reviewers. Thefirst edition of CMOS Digital Integrated, Circuits:
`Analysis and Design was publishedinlate 1995.
`
`

`

`xii
`
`Preface
`
`Soonafter publishing the first edition, we saw the need for updating theit to reflect
`many constructive comments from instructors and students who used the textbook, to
`include the topic of low-powercircuit design and provide more rigorous treatment of
`interconnects in high-speed circuit design as well as the deep submicroncircuit design
`issues. Wealso felt that in a very rapidly developing field such as CMOSdigital circuits,
`the quality of a textbook can only be preserved by timely updates reflecting the current
`State-of-the-art. This realization has led us to embark onthe extensive projectof revising
`our work,to reflect recent advances in technology andin circuit design practices.
`This book, CMOS Digital Integrated Circuits: Analysis and Design, is primarily
`intended as a comprehensive textbookat the senior level and first-year graduate level, as
`well as areferencefor practicing engineersin the areasof integratedcircuit design,digital
`design, and VLSI. Recognizing that the area of digital integrated circuit design is
`evolvingat an increasingly faster pace, we have made éverypossibleeffort to presentup-
`to-date materials on all subjects covered. This book contains sixteen chapters; and we
`recognize that it would not be possible to cover rigorously all of this material in one
`semester. Thus, we would propose the following based on our teaching experience: At
`the undergraduate level, coverage of the first ten chapters would constitute sufficient
`material for a one-semester course on CMOSdigital integratedcircuits. Time permitting,
`some selected topics in Chapter 11, Low-Power CMOS Logic Circuits, Chapter 12,
`BiCMOSLogic Circuits and Chapter 13, Chip Input and Output(I/O) Circuits can also
`be covered. Alternatively, this book can be used for a two-semester course, allowing a
`moredetailed treatment of advancedissues, which are presented in the later chapters. At
`the graduate level, selected topics from thefirst eleven chapters plus the last five chapters
`can be covered in one semester.
`Thefirst eight chapters of this book are devoted to a detailed treatment of the MOS
`transistor with all its relevant aspects; to the static and dynamic operation principles,
`analysis and design of basic inverter circuits; and to the structure and operation of
`combinational and sequential logic gates. The issues of on-chip interconnect modeling
`' and interconnectdelay calculation are covered extensively in Chapter 6. Indeed, Chapter
`~ 6 has been significantly extended to provide a more complete view of switching
`characteristics in digital integrated circuits. The coverage of technology-related issues
`has been complemented with the addition of several color plates and graphics, which we
`hopewill also enhancethe educationalvalue of the text. A separate chapter (Chapter9)
`has been reservedfor the treatment of dynamic logic circuits which are used in state-of-
`the-art VLSI chips. Chapter 10 offers an in-depth presentation of semiconductor memory
`circuits.
`Recognizing the increasing importance of low-powercircuit design, we decided to
`- add a new chapter (Chapter 11) on low-power CMOSlogic circuits. This new chapter
`provides a comprehensive coverage of methodologies and design practices that are used
`toreduce the powerdissipation of large-scale digital integrated circuits. BiCMOSdigital
`circuit design is examined in Chapter 12, with a thorough coverage of bipolar transistor
`basics. Considering the on-going useofbipolar circuits and BiCMOScircuits, we believe
`that at least one chaptershould be allocated to coverthe basics ofbipolar transistors. Next,
`Chapter 13 provides a clear insight into the important subject of chip I/O design. Critical
`issues such as ESD protection,clockdistribution, clock buffering, and latch-up phenom-
`enon are discussed in detail. Design methodologies and tools for very large scale
`

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