UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`
`
`
`
`
`
`
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`
`
`
`
`
`
`
`
`
`INTEL CORPORATION, GLOBALFOUNDRIES U.S., INC.,
`AND MICRON TECHNOLOGY, INC.,
`Petitioners,
`
`v.
`
`DANIEL L. FLAMM,
`
`Patent Owner.
`
`
`
`
`
`
`
`
`
`
`
`PTAB Case No. IPR2017-00282
`Patent No. RE40,264 E
`
`
`
`
`
`
`
`
`
`
`
`DECLARATION OF DR. JOHN BRAVMAN IN SUPPORT OF PETITION
`FOR INTER PARTES REVIEW OF U.S. PATENT NO. RE40,264
`(Claims 56-63 and 70-71)
`
`Page 1 of 208
`
`Samsung Exhibit 1006
`
`

`

`TABLE OF CONTENTS
`
`
`Page
`
`
`I.
`
`II.
`
`INTRODUCTION AND SUMMARY OF TESTIMONY ............................ 1
`A. Qualifications ....................................................................................... 1
`1.
`Education ................................................................................... 1
`2.
`Career ......................................................................................... 2
`3.
`Publications ................................................................................ 4
`4.
`Curriculum Vitae ........................................................................ 5
`Compensation ....................................................................................... 5
`B.
`C. Materials Reviewed .............................................................................. 5
`D.
`Level of Ordinary Skill in the Art ........................................................ 7
`OVERVIEW REGARDING TECHNOLOGY .............................................. 9
`A.
`Priority Date ......................................................................................... 9
`1.
`The Challenged Independent Claims ....................................... 10
`2.
`The Disclosure of Application No. 08/567,224, Filed on
`December 4, 1995 .................................................................... 11
`State of the Art from the Perspective of a Person of Ordinary
`Skill in the Art at the Time of the Alleged Invention ........................ 15
`Background and General Description of the ’264 Patent .................. 19
`C.
`Claim Construction ............................................................................ 23
`D.
`III. OVERVIEW OF THE PRIOR ART ............................................................ 24
`A.
`Standard for Invalidity........................................................................ 24
`B.
`Background on Kadomura ................................................................. 26
`1.
`General overview of Kadomura ............................................... 26
`2.
`Summary of Kadomura ............................................................ 34
`Background on Matsumura ................................................................ 35
`1.
`General overview of Matsumura ............................................. 35
`2.
`Summary of Matsumura .......................................................... 38
`
`B.
`
`C.
`
`
`
`
`-i-
`
`Page 2 of 208
`
`

`

`TABLE OF CONTENTS
`(continued)
`
`Page
`
`
`
`D.
`E.
`
`F.
`G.
`H.
`
`Reasons to combine Kadomura with Matsumura .............................. 38
`Background on Muller ....................................................................... 42
`1.
`General overview of Muller ..................................................... 42
`2.
`Summary of Muller .................................................................. 46
`Reasons to combine Matsumura with Muller .................................... 46
`Reasons to combine Muller with Kadomura and Matsumura ........... 51
`Background on Wang ......................................................................... 53
`1.
`General overview of Wang ...................................................... 53
`2.
`Summary of Wang ................................................................... 54
`Reasons to combine Wang with Kadomura and Matsumura ............. 54
`Reasons to combine Wang with Muller and Matsumura ................... 56
`Background on Kikuchi ..................................................................... 59
`1.
`General overview of Kikuchi ................................................... 59
`2.
`Summary of Kikuchi ................................................................ 63
`Reasons to combine Kikuchi with Kadomura and Matsumura ......... 63
`L.
`M. Reasons to combine Kikuchi with Muller and Matsumura................ 66
`IV. KADOMURA, MATSUMURA, MULLER, KIKUCHI, AND WANG
`RENDERED CLAIMS 56-63 AND 70-71 OBVIOUS ............................... 70
`A. Kadomura and Matsumura rendered claim 56 obvious ..................... 71
`1.
`Kadomura disclosed what is recited in the preamble of
`claim 56 .................................................................................... 71
`Kadomura disclosed claim 56, limitation [a] ........................... 73
`Kadomura and Matsumura disclosed claim 56, limitation
`[b] ............................................................................................. 74
`Kadomura disclosed claim 56, limitation [c] ........................... 78
`Kadomura disclosed claim 56, limitation [d]........................... 80
`
`I.
`J.
`K.
`
`2.
`3.
`
`4.
`5.
`
`
`
`
`-ii-
`
`Page 3 of 208
`
`

`

`TABLE OF CONTENTS
`(continued)
`
`Page
`
`6.
`
`2.
`3.
`
`4.
`
`5.
`
`Kadomura and Matsumura disclosed claim 56, limitation
`[e] ............................................................................................. 81
`Kadomura, Matsumura and Muller rendered claim 57 obvious ........ 94
`B.
`Kadomura and Matsumura rendered claim 58 obvious ................... 101
`C.
`D. Kadomura, Matsumura and Wang rendered claim 59 obvious ........ 101
`E.
`Kadomura, Matsumura and Wang rendered claim 60 obvious ........ 106
`1.
`Kadomura disclosed what is recited in the preamble of
`claim 60 .................................................................................. 106
`Kadomura disclosed claim 60, limitation [a] ......................... 107
`Kadomura and Matsumura disclosed claim 60, limitation
`[b] ........................................................................................... 108
`Kadomura and Matsumura in view of Wang disclosed
`claim 60, limitation [c] ........................................................... 112
`Kadomura, Matsumura and Wang disclosed claim 60,
`limitation [d] .......................................................................... 114
`Kadomura, Matsumura and Wang disclosed claim 60,
`limitation [e] ........................................................................... 115
`Kadomura, Matsumura and Wang disclosed claim 60,
`limitation [f] ........................................................................... 115
`Kadomura, Matsumura and Wang rendered claim 61 obvious ........ 116
`F.
`G. Kadomura, Matsumura, Wang and Muller rendered claim 62
`obvious ............................................................................................. 118
`H. Kadomura, Matsumura, Wang and Kikuchi rendered claim 63
`obvious ............................................................................................. 123
`Kadomura, Matsumura, Wang, and Kikuchi rendered claim 70
`obvious ............................................................................................. 126
`Kadomura, Matsumura and Wang rendered claim 71 obvious ........ 128
`
`6.
`
`7.
`
`I.
`
`J.
`
`-iii-
`
`
`
`
`
`
`Page 4 of 208
`
`

`

`TABLE OF CONTENTS
`(continued)
`
`Page
`
`
`V. MULLER, MATSUMURA, WANG AND KIKUCHI RENDERED
`CLAIMS 56-63, 70 AND 71 OBVIOUS ................................................... 129
`A. Muller, Matsumura and Wang rendered claim 56 obvious .............. 130
`1. Muller disclosed what is recited in the preamble of claim
`56 ............................................................................................ 130
`2. Muller disclosed claim 56, limitation [a] ............................... 131
`3. Muller and Matsumura disclosed claim 56, limitation [b] .... 132
`4. Muller and Wang disclosed claim 56, limitation [c] ............. 137
`5. Muller and Wang disclosed claim 56, limitation [d] ............. 143
`6. Muller, Matsumura, and Wang disclosed claim 56,
`limitation [e] ........................................................................... 145
`B. Muller, Matsumura and Wang rendered claim 57 obvious .............. 153
`C. Muller, Matsumura and Wang rendered claim 58 obvious .............. 156
`D. Muller, Matsumura and Wang rendered claim 59 obvious .............. 157
`E. Muller, Matsumura and Wang rendered claim 60 obvious .............. 160
`1. Muller disclosed what is recited in the preamble of claim
`60 ............................................................................................ 160
`2. Muller and Wang disclosed claim 60, limitation [a] ............. 160
`3. Muller and Matsumura disclosed claim 60, limitation [b] .... 161
`4. Muller and Matsumura in view of Wang disclosed claim
`60, limitation [c] ..................................................................... 161
`5. Muller, Matsumura and Wang disclosed claim 60,
`limitation [d] .......................................................................... 162
`6. Muller, Matsumura and Wang disclosed claim 60,
`limitation [e] ........................................................................... 163
`7. Muller, Matsumura and Wang disclosed claim 60,
`limitation [f] ........................................................................... 163
`
`
`
`
`-iv-
`
`Page 5 of 208
`
`

`

`TABLE OF CONTENTS
`(continued)
`
`Page
`
`
`
`I.
`
`F. Muller, Matsumura and Wang rendered claim 61 obvious .............. 164
`G. Muller, Matsumura, and Wang rendered claim 62 obvious ............. 166
`H. Muller, Matsumura, Wang and Kikuchi rendered claim 63
`obvious ............................................................................................. 168
`Muller, Matsumura, and Wang and Kikuchi rendered claim 70
`obvious ............................................................................................. 170
`J. Muller, Matsumura and Wang rendered claim 71 obvious .............. 172
`VI. CONCLUSION ........................................................................................... 174
`
`
`
`
`
`
`-v-
`
`Page 6 of 208
`
`

`

`
`
`
`I. Introduction and summary of testimony
`
`
`
` My name is John Bravman. I have been retained in the above-1.
`
`referenced inter partes review proceeding by Intel Corporation, Micron Technolo-
`
`gy, Inc., and GlobalFoundries U.S., Inc. (collectively, “Petitioners”) to evaluate
`
`United States Patent No. RE40,264 (the “’264 patent”) against certain prior art ref-
`
`erences, specifically U.S. Patent Nos. 6,063,710, 5,151,871, 5,226,056, 5,605,600,
`
`and 4,992,391, as well as the knowledge of a person of skill in the art at the time of
`
`the purported invention, including as demonstrated by various state of the art refer-
`
`ences. The ’264 patent is attached as Exhibit 1001 to Petitioners’ petition for Inter
`
`Partes Review of U.S. Patent No. RE40,264 (“Petition”). I understand that Peti-
`
`tioners seek review of claims 56-63, 70, and 71 in their Petition. As detailed in this
`
`declaration, it is my opinion that each of the challenged claims is rendered obvious
`
`by prior art references that predate the priority date of the ’264 patent. If requested
`
`by the Patent Trial and Appeal Board (“PTAB” or “Board”), I am prepared to testi-
`
`fy about my opinions expressed in this declaration.
`
`A. Qualifications
`
`Education
`
`1.
`I received my Bachelors of Science degree in Materials Science and
`
`
`2.
`
`Engineering at Stanford University in 1979. I later received a Master’s of Science
`
`in Materials Science and Engineering from Stanford University in 1981, and I was
`
`
`
`- 1 -
`
`Page 7 of 208
`
`

`

`
`
`
`awarded a Ph.D. in Materials Science and Engineering from Stanford University in
`
`1984, specializing in semiconductor processing and materials analysis. My thesis
`
`was entitled “Morphological Aspects of Silicon - Silicon Dioxide VLSI Interfac-
`
`es,” and concerned structural analyses of silicon-silicon dioxide interfaces, as
`
`found in integrated circuit devices—specifically very-large-scale integration devic-
`
`es.
`
`Career
`
`2.
`I will discuss my current position first, followed by a synopsis of my
`
`
`3.
`
`career and work from when I received my Ph.D. to the present.
`
`
`4.
`
`I am currently employed as the President and as a Professor of Elec-
`
`trical Engineering at Bucknell University in Lewisburg, Pennsylvania. As the
`
`President of Bucknell, I am the chief administrator at the university and am re-
`
`sponsible for helping to set university policy and priorities, alumni relations, and
`
`university advancement.
`
`
`5.
`
`From 1979 to 1984, while a graduate student at Stanford, I was em-
`
`ployed part-time by Fairchild Semiconductor in their Palo Alto Advanced Re-
`
`search Laboratory. I worked in the Materials Characterization group. In 1985, up-
`
`on completion of my doctorate, I joined the faculty at Stanford as Assistant Profes-
`
`sor of Materials Science and Engineering. I was promoted to Associate Professor
`
`with tenure in 1991, and achieved the rank of Professor in 1995. In 1997 I was
`
`
`
`- 2 -
`
`Page 8 of 208
`
`

`

`
`
`
`named to the Bing Professorship.
`
`
`6.
`
`I served as Chairman of Stanford University’s Department of Materi-
`
`als Science and Engineering from 1996-1999, and the Director of Stanford’s Cen-
`
`ter for Materials Research from 1998-1999. I served as Senior Associate Dean of
`
`the School of Engineering from 1992 to 2001 and the Vice Provost for Undergrad-
`
`uate Education from 1999 to 2010.
`
`
`7.
`
`On July 1, 2010, I retired from Stanford University and began service
`
`as the President of Bucknell University, where I also became a Professor of Elec-
`
`trical Engineering.
`
`
`8.
`
`I have worked for more than 25 years in the areas of thin film materi-
`
`als processing and analysis. Much of my work has involved materials for use in
`
`microelectronic interconnects and packaging, and in superconducting structures
`
`and systems. I have also led multiple development efforts of specialized equip-
`
`ment and methods for determining the microstructural and mechanical properties
`
`of materials and structures.
`
`
`9.
`
`I have taught a wide variety of courses at the undergraduate and grad-
`
`uate level in materials science and engineering, emphasizing both basic science
`
`and applied technology, including coursework in the areas of integrated circuit ma-
`
`terials and processing. More than two thousand students have taken my classes,
`
`and I have trained 24 doctoral students, most of whom now work in the microelec-
`
`
`
`- 3 -
`
`Page 9 of 208
`
`

`

`
`
`
`tronics and semiconductor processing industries.
`
`
`10.
`
`In the course of my research, my research group made extensive use
`
`of plasma semiconductor processing equipment for depositing and etching films of
`
`both simple (e.g., elemental) and complex (e.g., multi-element compound) materi-
`
`als, including semiconductor processing that monitored and controlled temperature
`
`during processing.
`
`
`11.
`
`I am or have been a member of many professional societies, including
`
`the Materials Research Society, the Institute of Electrical and Electronic Engineers,
`
`Electron Microscopy Society of America, the American Society of Metals, the
`
`Metallurgical Society of AIME, the American Chemical Society, and the American
`
`Physical Society. I served as President of the Materials Research Society in 1994.
`
`Publications
`
`3.
`I am a named inventor on two United States patents relating to the de-
`
`
`12.
`
`livery of medicinal compounds using particular material compositions. The patent
`
`numbers and titles as well as my co-inventors are listed on my curriculum vitae at-
`
`tached to this declaration as Appendix A.
`
`
`13.
`
`I am author or co-author of over 160 peer-reviewed articles and con-
`
`ference proceedings, nearly all of which relate to semiconductor processing and/or
`
`integrated circuits. The titles, publication information and my co-authors are listed
`
`on my curriculum vitae attached to this declaration as Appendix A.
`
`
`
`- 4 -
`
`Page 10 of 208
`
`

`

`
`
`
`
`14.
`
`I am also the author, co-author, or editor of 8 edited works related to
`
`semiconductor processing or materials.
`
`4.
`Curriculum Vitae
` Additional details of my education and employment history, recent
`15.
`
`professional service, patents, publications, and other testimony are set forth in my
`
`current curriculum vitae, attached to this declaration as Appendix A.
`
`B. Compensation
`
`
`16.
`
`In connection with my work as an expert, I am being compensated at a
`
`rate of $450.00 per hour for consulting services including time spent testifying at
`
`any hearing that may be held. I am also being reimbursed for reasonable and cus-
`
`tomary expenses associated with my work in this case. I receive no other forms of
`
`compensation related to this case. No portion of my compensation is dependent or
`
`otherwise contingent upon the results of this proceeding or the specifics of my tes-
`
`timony.
`
`C. Materials Reviewed
`
`
`17.
`
`In formulating my opinions in this matter, I have reviewed the ’264
`
`patent (Ex. 10011) and its prosecution history. I have also reviewed the following
`
`
`The citations in this declaration to an “Exhibit” or “Ex.” refer to the Exhibits
`
`to the Petition.
`
` 1
`
`
`
`- 5 -
`
`Page 11 of 208
`
`

`

`
`
`
`materials:
`
`Ex. 1001 U.S. Patent No. RE40,264 (“’264 patent”)
`
`Ex. 1002 U.S. Patent 5,605,600 (“Muller”)
`
`Ex. 1003 U.S. Patent 5,151,871 (“Matsumura”)
`
`Ex. 1004 U.S. Patent 5,226,056 (“Kikuchi”)
`
`Ex. 1005 U.S. Patent 6,063,710 (“Kadomura”)
`
`Ex. 1007 U.S. Patent Application No. 08/567,224 (“’224 application”)
`
`Ex. 1008 Wright, D.R. et al., A Closed Loop Temperature Control System for
`a Low-Temperature Etch Chuck, Advanced Techniques for Integrat-
`ed Processing II, Vol. 1803 (1992), pp. 321–329 (“Wright”)
`
`Ex. 1009 U.S. Patent No. 5,711,849 (“’849 patent”)
`
`Ex. 1010 U.S. Patent No. 4,992,391 (“Wang”)
`
`Ex. 1011
`
`Fischl, D.S. et al., Etching of Tungsten and Tungsten Silicide by
`Chlorine Atoms, J. Electrochemical Soc.: Solid-State Science and
`Technology, Vol. 135, No. 8 (August 1988), pp. 2016-2019
`(“Fischl”)
`
`Ex. 1012 U.S. Patent No. 4,331,485 (“Gat”)
`
`Ex. 1013 U.S. Patent No. 5,393,374 (“Sato”)
`
`Ex. 1014
`
`PTAB Decision Denying Institution of Inter Partes Review, Lam
`Research Corp. v. Daniel L. Flamm, IPR2016-00469, Paper 6 (July
`1, 2016)
`
`Ex. 1015
`
`PTAB Institution of Inter Partes Review, Lam Research Corp. v.
`Daniel L. Flamm, IPR2015-01768, Paper 7 (February 24, 2016)
`
`
`
`- 6 -
`
`Page 12 of 208
`
`

`

`
`
`
`Ex. 1016
`
`Petition for Inter Partes Review of U.S. Patent No. RE40,264 E
`Fourth Petition, Lam Research Corp. v. Daniel L. Flamm, IPR2015-
`01768, Paper 1 (August 18, 2015)
`
`Ex. 1017 U.S. Patent No. 5,242,536 (“Schoenborn”)
`
`Ex. 1018 U.S. Patent No. 5,174,856 (“Hwang”)
`
`Ex. 1019 Declaration of Rachel J. Watters regarding Exhibit 1008
`
`Ex. 1020 Declaration of Rachel J. Watters regarding Exhibit 1011
`
`I also refer to my curriculum vitae, which is attached as Appendix A to this decla-
`
`ration.
`
`
`18.
`
`In connection with live testimony in this proceeding, should I be
`
`asked to provide it, I may use as exhibits various documents that refer to or relate
`
`to the matters contained within this declaration, or which are derived from the re-
`
`sults and analyses discussed in this declaration. Additionally, I may create or su-
`
`pervise the creation of certain demonstrative exhibits to assist me in testifying.
`
`
`19.
`
`I am prepared to use any or all of the above-referenced documents,
`
`and supplemental charts, models, and other representations based on those docu-
`
`ments, to support my live testimony in this proceeding regarding my opinions cov-
`
`ering the ’264 patent. If called upon to do so, I will offer live testimony regarding
`
`the opinions in this declaration.
`
`D. Level of Ordinary Skill in the Art
`
`
`20.
`
`It is my understanding that the claims and specification of a patent
`
`
`
`- 7 -
`
`Page 13 of 208
`
`

`

`
`
`
`must be read and construed through the eyes of a person of ordinary skill in the art
`
`as of the priority date of the claims at issue. Counsel has also advised me that to
`
`determine the appropriate level of one of ordinary skill in the art, the following fac-
`
`tors may be considered: (a) the types of problems encountered by those working in
`
`the field and prior art solutions to those problems; (b) the sophistication of the
`
`technology in question, and the rapidity with which innovations occur in the field;
`
`(c) the educational level of active workers in the field; and (d) the educational level
`
`of the inventor.
`
` The relevant technology fields for the ’264 patent are semiconductor
`21.
`
`processing and semiconductor processing equipment. In my opinion, for the pur-
`
`poses of the ’264 patent, a person of ordinary skill in the art, as of the priority date
`
`for the ’264 patent, would have generally have had either (i) a Bachelor’s degree in
`
`electrical engineering, chemical engineering, materials science engineering, phys-
`
`ics, chemistry, or a similar field, and three or four years of work experience in
`
`semiconductor manufacturing or related fields, (ii) a Master’s degree in chemical
`
`engineering, electrical engineering, materials science engineering, physics, chemis-
`
`try, or a similar field and two or three years of work experience in semiconductor
`
`manufacturing or related fields, or (iii) a Ph.D. or equivalent doctoral degree in
`
`chemical engineering, materials science engineering, electrical engineering, phys-
`
`ics, chemistry, or a similar field, who had performed research related to semicon-
`
`
`
`- 8 -
`
`Page 14 of 208
`
`

`

`
`
`
`ductor manufacturing or related fields.
`
` Based on this understanding of a person of ordinary skill in the art at
`22.
`
`the time of the alleged invention for the ’264 patent, I believe that I am at least a
`
`person having ordinary skill in the art for purposes of the ’264 patent, and that I
`
`was one prior to September 11, 1997. For example, my qualifications and experi-
`
`ences discussed above, and in my curriculum vitae (Appendix A), demonstrate my
`
`familiarity with and knowledge of the art of the ’264 patent. I therefore believe
`
`that I am qualified to offer this declaration as to how such a person would have in-
`
`terpreted the ’264 patent and the prior art prior to September 11, 1997. Unless oth-
`
`erwise stated, my statements below refer to the knowledge, beliefs and abilities of
`
`a person having ordinary skill in the art of the ’264 patent at the time of the pur-
`
`ported invention of the ’264 patent.
`
`II. Overview Regarding Technology
`
`A.
`
`
`23.
`
`Priority Date
`
`I have been informed that a claim of a patent is not entitled to the pri-
`
`ority date of an earlier application if that application does not disclose all limita-
`
`tions of the claim in question.
`
` The ’264 patent is a reissue of U.S. Patent No. 6,231,776 (the “’776
`24.
`
`patent”). The ’264 patent issued on April 29, 2008 from a reissue application filed
`
`on May 14, 2003. The ’776 patent issued from Application No. 09/151,163, filed
`
`
`
`- 9 -
`
`Page 15 of 208
`
`

`

`
`
`
`on September 10, 1998. The ’776 patent claims priority to Provisional Application
`
`No. 60/058,650, filed on September 11, 1997, and further claims priority as a con-
`
`tinuation-in-part of Application No. 08/567,224, filed on December 4, 1995 (the
`
`“’224 application.”)
`
`
`25.
`
`It is my opinion that claims 56-63, 70, and 71 of the ’264 patent
`
`(“challenged claims”) are not entitled to a priority date earlier than September 11,
`
`1997. I express no opinion regarding the correctness of the September 11, 1997 or
`
`September 10, 1998 priority date, but I will use September 11, 1997 for purposes
`
`of this declaration. In my opinion, however, December 4, 1995 is not the correct
`
`priority date for the challenged claims because application No. 08/567,224 does
`
`not disclose or adequately support the subject matter claimed in the challenged
`
`claims.
`
`1. The Challenged Independent Claims
`
` Among other limitations, claim 56 recites: “etching at least a portion
`26.
`
`of a first silicon-containing layer in a chamber while the substrate is maintained at
`
`a selected first substrate temperature,” “etching at least a portion of a second sili-
`
`con-containing layer in the chamber while the substrate is maintained at a selected
`
`second substrate temperature,” and “wherein … the substrate temperature is
`
`changed from the first substrate temperature to the second substrate temperature
`
`with a control circuit operable to effectuate the changing within a preselected time
`
`
`
`- 10 -
`
`Page 16 of 208
`
`

`

`
`
`
`period….” (’264 patent at 24:46-61 (Ex. 1001)) Claim 56 further requires sensing
`
`a substrate holder temperature. (’264 patent at 24:45 (Ex. 1001))
`
` Among other limitations, claim 60 recites: “processing the substrate
`27.
`
`on the substrate holder at a first substrate temperature,” “processing the substrate
`
`on the substrate holder at a second substrate temperature to etch at least a portion
`
`of the silicide layer,” and “wherein … the first substrate temperature is changed to
`
`the second substrate temperature with a substrate temperature control circuit within
`
`a preselected time to etch the silicide layer.” (’264 patent at 25:21-31 (Ex. 1001))
`
`Claim 60 further requires “sensing the substrate holder temperature” and “heating
`
`the substrate holder with a substrate holder control circuit….” (’264 patent at
`
`25:15-30 (Ex. 1001))
`
` Accordingly, independent claims 56 and 60 recite processing a film
`28.
`
`on a substrate at two different substrate etching temperatures and changing from
`
`the first substrate temperature for processing to the second substrate temperature
`
`for processing “within a preselected time” to process the film. Claims 56 and 60
`
`also require measuring a substrate holder temperature and changing the substrate
`
`temperature using a substrate temperature control circuit.
`
`2. The Disclosure of Application No. 08/567,224, Filed on Decem-
`ber 4, 1995
`
`
`29.
`
`In my opinion, the ’224 application, filed on December 4, 1995, does
`
`not include written description sufficient to support independent claims 56 and 60
`
`
`
`- 11 -
`
`Page 17 of 208
`
`

`

`
`
`
`(or their dependents) of the ’264 patent. Thus, the challenged claims are entitled
`
`to a priority date of no earlier than September 11, 1997, the date of Provisional
`
`Application No. 60/058,650.
`
` Specifically, both claims 56 and 60 recite the concepts of processing
`30.
`
`(e.g., etching) a film at a selected first temperature and further processing at a se-
`
`lected second temperature and changing from the first temperature to the second
`
`temperature within a specific preselected time period.
`
`
`31.
`
`I was unable to find any discussion in the ’224 application of chang-
`
`ing the temperature of the substrate from a first temperature to a second tempera-
`
`ture within a preselected time to process the film. Furthermore, the only disclosure
`
`of two-temperature processing in the ’224 application is a disclosure of a technique
`
`well known at the time, changing the temperature by transferring a wafer between
`
`substrate holders held at different temperatures (either in the same processing
`
`chamber or in different chambers). Specifically, the ’224 application discloses
`
`changing the temperature during plasma ashing by transferring the wafer from a
`
`first resist stripping chamber with a half-wave helical resonator, in which a wafer
`
`is processed at a low temperature, to a second chamber with a resonator operating
`
`at a full-wave multiple, in which a wafer is processed at a higher temperature:
`
`An implant resist stripping process was performed to re-
`move the top implant hardened resist. This occurred by
`stripping using an “un-balanced” phase and anti-phase
`
`
`
`- 12 -
`
`Page 18 of 208
`
`

`

`
`
`
`
`
`coupling relationship in a half-wave helical resonator.
`The half-wave helical resonator was configured in one of
`the process chambers. In this chamber, the pedestal had a
`temperature of about 40ºC to maintain a low wafer tem-
`perature. This low wafer temperature was maintained. to
`reduce the possibility of “popping.” Popping occurs
`when vapor in the underlying photoresist explodes
`through the implant hardened resist.
`
`After the top hardened layer was removed. The wafer
`was transferred into a chamber operating at a full-wave
`multiple. This chamber operated at a frequency of about
`27.12 MHz at a full-wave multiple. The pedestal of this
`chamber was at 150 to 200ºC. The full-wave structure
`provided for balanced phase and anti-phase coupled cur-
`rents, thereby reducing the amount of capacitively cou-
`pled plasma, which can be detrimental to the underlying
`substrate. In this step, overashing was performed to sub-
`stantially remove all photoresist material from the wafer.
`No damage occurred to the underlying substrate during
`the overashing step.
`
`Once the photoresist has been stripped, the wafer is
`cooled. In particular, the wafer is removed from the, full-
`wave multiple process chamber, and placed on the cool-
`ing station. This cooling station reduces the temperature
`of the wafer (which was heated). This wafer is then re-
`loaded back into its wafer cassette.
`
`- 13 -
`
`Page 19 of 208
`
`

`

`
`
`
`(’224 application at 33:16-34:6 (Ex. 1007)) This passage does not disclose chang-
`
`ing the temperature within a particular time period. I cannot find any other part of
`
`the ’224 application that contains those teachings. Furthermore, based on my re-
`
`view of the ’224 application, it does not discuss changing the processing tempera-
`
`ture of the same substrate holder.
`
` Claims 56 and 60 further require measuring the temperature of the
`32.
`
`substrate, which is used to control the change from a first processing temperature
`
`to a second processing temperature, “substrate temperature is changed from the
`
`first substrate temperature to the second substrate temperature with a control cir-
`
`cuit” and “the first substrate temperature is changed to the second substrate tem-
`
`perature with a substrate temperature control circuit….” (’264 patent 24:52-61.
`
`25:27-31 (Ex. 1001)).
`
` The ’224 application does not disclose using a measured substrate
`33.
`
`temperature or using a control circuit to change the temperature of the substrate.
`
`The ’224 application discloses, again in the context of plasma ashing, a substrate
`
`support that is heated resistively and has a thermocouple to sense the temperature
`
`of the substrate support:
`
`The wafer 618 is a 6-inch (250mm) <100> type wafer
`with approximately 1.25 microns of spin-coated
`Mitsubishi Kasei positive photoresist MPR-4000. This
`wafer was ashed on the grounded 10 inch diameter wafer
`
`
`
`- 14 -
`
`Page 20 of 208
`
`

`

`
`
`
`support 616. This support was resistivity heated and, the
`temperature of the substrate support was sensed with a
`thermocouple.
`
`(’224 application at 30:24-28 (Ex. 1007)) This is different from measuring the
`
`substrate temperature. Indeed, claim 60 discloses both a substrate holder control
`
`circuit and a substrate temperature control circuit. Another independent claim,
`
`claim 37, also expressly recites both a substrate temperature sensor and a substrate
`
`holder temperature sensor.
`
` The ’224 application does not support the material recited in inde-
`34.
`
`pendent claims 56 and 60, and thus does not provide sufficient disclosure to sup-
`
`port any of the challenged claims.
`
`B.
`
`State of the Art from the Perspective of a Person of Ordinary Skill
`in the Art at the Time of the Alleged Invention
`
` The ’264 patent generally relates to methods for performing semicon-
`35.
`
`ductor processing with in situ temperature changes (meaning the substrate being
`
`processed stays on the same substrate holder during the first processing step at a
`
`first temperature and a second processing temperature at a second temperature, as
`
`well as during the change in temperature from the first temperature to the second
`
`temperature). Below I briefly describe the state of the art prior to September 1997
`
`as it related to semiconductor processing methods and equipment (tools).
`
` By September 11, 1997, semiconductor processing had been under
`36.
`
`
`
`- 15 -
`
`Page 21 of 208
`
`

`

`
`
`
`continuous development for several decades. Specifically, it was well known that
`
`different processing temperatures produced different results during semiconductor
`
`processing. For example, it was known to be generally true that processes such as
`
`etching and ashing usually occurred faster at higher temper