Samsung Exhibit 1020
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`Samsung Exhibit 1020
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` _TECHNOLOGY
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`
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`Edited by
`S. M. Sze
`Bell Laboratories, Incorporated
`Murray Hill, NewJersey
`
`McGraw-Hill Book Company
`St. Louis
`New You
`San Francisca
`
`
`Auckland Bogeta Hamburg
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`Monveal New Delhi
`Johannesburg
`London Madrid Mexico
`Sydney
`Tokyo Toronto
`Panama
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`Singapore
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`This book was set in Times Roman byInformation Sciences Corporation.
`Theeditors wereT. Michael Slaughter and Madelaine Eichberg:
`the production supervisor was Leroy A. Young.
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`The cover was designed by Joseph Gillians.
`The drawings were done byBel] Laboratories, Incorporated.
`Halliday Lithograph Corporation was printer and binder.
`
`VLSI TECHNOLOGY
`2ir
`Copyright © 1983 byBell Telephone Laboratories. Incorporated, All rights reserved. Printed in
`the United States of America. Except as permitted under the United States Copyright Act of
`1976, no part of this publication maybe reproduced or distributed in anyform or by any means.
`or stored in a data base or retrieval system, without the prior written permission of Bell Tele-
`phone Laboratories, Incorporated.
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`234567890HALHAL8987654
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`¥
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`ISBN 0-07-Ob2b8b-3
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`Libraryof Congress Cataloging in Publication Data
`Main entryundertitle:
`VLSItechnology.
`
`(McGraw-Hill seriesin electrical engineering.
`Electronics and electronic circuits)
`Includes index.
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`OREse
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`1. Integrated circuits—Verylarge scale
`integration.
`I. Sze, S. M., date
`I. Series.
`TK7874. V566
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`621.381°73
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`1983
`
`82-24947
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`ISBN 0-07-062686-3
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`CHAPTER
`EIGHT
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`DRY ETCHING
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`C. J. MOGAB
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`303
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`ist patterns defined by the lithographic techniques described in Chapter 7 are not
`permanent elements of the final device but only replicas of circuit features. To pro-
`duce circuit features, these resist patterns must be transferred into the layers compris-
`=g the device. One method oftransferring the patterns is to selectively remove
`samasked portions ofa layer, a process generally knownasetching.
`Asthe tite ofthis chapter suggests, **dry etching’’ methods are particularly suilt-
`2le for VLSI processing. Dry etching is synonymous with plasma-assisted etching!
`which denotes several techniques that use plasmas in the form of low-pressure gas-
`ous discharges. These techniques are commonlyused in VLSI processing because of
`heir potential for very-high-fidelity transfer of resist patterns.
`The earliest application of plasmasto silicon ICs dates back tothe late 1960s,
`«hen oxygen plasmas were being explored forthe stripping of photoresists.? Work on
`the use of plasmasfor etchingsilicon wasalsoinitiated in the late 1960s and wassig-
`aaled bya patent’ detailing the use of CF,—O> gas mixtures. Atthat time, there was
`0 universal endorsement of dry methods which were largely novel replacements for
`2xisting wet chemical techniques.
`This early work set the stage for an importantperiod in the evolution ofIC tech-
`nology. From 1972 to 1974, workers at several major laboratories were heavily
`involved in the development of an inorganic passivation layer for MOS devices, The
`preferred passivation tumedout to be a plasma-depositedsilicon nitride layer. While
`this material exhibited manydesirable characteristics, there was one immediatediffi-
`culty. No suitable wet chemical etchant could be found to etch windowsin the nitude
`in order to expose underlying metallization for subsequent bonding. This problem
`
`8.1 INTRODUCTION
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` warerTe
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`fe 2 E
`ia.
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`Ge his ¢
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`304 VLSI TECHNOLOGY
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`was circumvented bythe use of CF,—O2 plasma etching.* Concurrently, CF,;—-O;
`plasma etching was developed for patterning CVD silicon nitride layers being used as
`junction seals,” These efforts markedthefirst significant applications of plasma etch-
`ing in IC manufacture and the beginning of large-scale efforts to develop plasmaetch-
`ing techniques.
`Not long after this, an awareness ofthe potential of plasma techniques for highly
`anisotropic etching evolved,
`In particular. there were manyobservationsofa vertical
`etch rate that greatly exceeded the lateral etch rate when etching through a layer of
`material. As will become apparent, anisotropy is necessary for high-resolution pat-
`tern transfer. The significance of etch anisotropy was recognized byresearchers who
`were hoping to achieve ever larger scales of integration by designing circuits with
`ever smaller features. By the mid-1970s, therefore, most major IC manufacturershad
`mounted substantial efforts to develop plasma-assisted etching methods. These
`methods were no longer seen as merely novel substitutes for wet etching, but rather as
`echniques having capabilities uniquely suited to meeting forseeable requirements on
`pattern transfer.
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`8.2 PATTERN TRANSFER
`
`**Pattern transfer’’ refers to the transfer of a pattern, defined by a masking layer, into
`a filmor substrate by chemical or physical methods that producesurfacerelief,
`
`8.2.1 Subtractive and Additive Methods
`
`la. the filmis deposited
`In the subrracrive method of pattern transfer shown in Fig.
`first, a patterned masking layer is then generated lithographically, and the unmasked
`portions of the film are removed byetching.
`In the additive (or lift-off) method
`shown in Fig. 1b, the lithographic maskis generatedfirst, the film is then deposited
`over the mask and substrate, and those portionsof the film over the mask are removed
`byselectively dissolving the masking layer in an appropriate liquid so that the overly-
`ing film is lifted off and removed.
`The subtractive methods collectively known as dry etching are the preferred
`meansfor pattern transfer in VLSI processing today. Thelift-off process is capable of
`high résolution, butis not as widelyapplicable as dryetching.
`
`8.2.2 Resolution and EdgeProfiles in Subtractive Pattern Transfer
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`The resolution of an etching process is a measure of the fidelity of pattern transfer.
`which can be quantified by two parameters. Bias is the difference in lateral dimen-
`sion between the etched image and the mask image, defined as shown in Fig. 2
`Tolerance is a measure ofthe statistical distribution of bias values that characterizes
`the lateral uniformityof etching.
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`BS.5
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`3
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`Dry ETCHING 305
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`f
`Peed
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`START
`
`pares
`t ae|
`3}
`$
`SUBSTRATE
`
`;
`
`
`}an
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`¥7
`MASK
`
`AFTER
`LITHOGRAPHY §
`{
`
`SUBSTRATE
`
`;
`
`:
`
`\
`:
`;
`
`
`
`DEPOSIT —e fi
`
`
`Savers5)
`
`
`
`bicecnmapanannennd:,
`
`AFTER
`MASK
`REMOVAL
`
`Pcsepeeet
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`Fig.
`
`1 Schematicillustrations of (a) subxructive and (b) additive methods of pattern transfer.
`
`(6)
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`A zero-bias process produces a vertical edge profile coincident with the edge of
`=e mask, as shown in Fig. 3a.
`In this case. there is no etchingin the lateral direction
`sod the pattern is transferred with perfectfidelity. This case represents the extreme of
`svisotropic etching. Whenthe vertical andlateral etch rates are equal or, more pre-
`=sely, when the etch rate is independent ofdirection, the edge profile appears as a
`qvarter-circle after etching has been carried just to completion, as shown in Fig. 3b.
`2this case ofisotropicetching. the bias is twice the film thickness.
`
`—— dq, ——
`
`} =— SUBSTRATE
`
`{ *— FIL’ ———
`uA
`fs
`{
`ee
`daa
`PeaARRAN
`LINE
`
`
`Fig. 2 Etchbiasis a:
`“asure ofthe amount by which the etched film undercuts the mask at the mask-film
`ntertace.
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`BIAS = B+ ay-dy,
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