`
`25.9
`
`ENGINE COMPARTMENT
`Washer Fluid
`PW"
`
`DRIVER DOOR
`Door Closed
`
`PAS SENGER DOOR
`Door Closed
`
`Door Aj at
`
`
`
`INSTRUIEN’I PANEL
`INSTRUMENT PANEL
`wipe: Switch
`Low Fuel
`Seat Belts
`Kay—in Switch E
`Headlamps on
`
`
` Instrument
`
`Cluster
`
`Message
`Cantu:
`
`FIGURE 26.9 Base vehicle with Class B data link, body computer, instrument
`cluster, message center, and Class A network for sensors.
`
`Class C Real-Time Control. The Class C network is the least mature network, and consen-
`sus of opinion on requirements does not yet exist. Experts cannot agree on many facets and
`many of the requirements are controversial. Many automotive engineers believe that an ade-
`quate statistical latency achievable with a bit-by—bit arbitration-based media access protocol
`is sufficient for real—time distributed Class C multiplexing. Others believe a token-passing
`media access protocol is required because a maximum latency is guaranteed, because with an
`arbitration-based media access only a statistical maximum latency is achievable. There are still
`others who argue that both the arbitration—based and token-passing media access is not good
`enough for tightly looped distributed processing because both methods have too great a vari-
`ation in latency time. They argue that a time-triggered media access method is required
`because the network variations in latency should not affect tightly looped processing times.
`Other factors such as required data rates and the physical media type also remain open. It is
`clear that more research and development is required to resolve these questions.
`
`26.2 ENCODING TECHNIQUES
`
`The data encoding technique“ has a significant effect on the radiated EMI. In order to achieve
`the highest possible data rate, it is important to choose a data-encoding technique that has the
`fewest transitions per bit with the maximum amount of time between transitions and bit—syn-
`chronized so that invalid bit testing can be effective. PWM, for example, has two transitions
`per bit with % bit times between transitions. NRZ has a maximum of one transition per bit but
`is increased to provide for synchronization. Some of the disk drive encoding techniques such
`as modified frequency modulation (MFM) are synchronous with fewer than one transition
`per bit. (See Table 26.1 for a comparison chart of a selection of encoding techniques used in
`vehicle multiplexing.)
`The variable column in the table describes an attribute whereby the transmission time for
`data byte is a variable quantity depending on the data value. VPWM and Bit—Stuf NRZ both
`have variable byte repetition rate (data variability).
`Some of the bit—encoding techniques synchronize on transitions that fall on or within the
`bit boundaries. 10-bit NRZ, Bit-Stuf NRZ, and E-MAN all employ added transitions for syn-
`chronization (clock synchronization).
`
`541
`541
`
`
`
`26.1 0
`
`SAFETY, CONVENIENCE. ENTERTAINMENT, AND OTHER SYSTEMS
`
`TABLE 26.1 Comparison of Multiplexing Bit—Encoding Techniques
`
`PWM VPWM 10-BitNRZ Bit-StquRZ L-MAN EwMAN MFM
`Variable
`No
`Yes
`No
`Yes
`No
`No
`No
`Synchronizing
`Yes
`Yes
`No
`No
`Yes
`No
`Yes
`Arbitrates
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Transitionfbit
`2
`1
`51.25
`51.015
`$2
`$1.25
`£1
`Max data rate
`2.1 K
`11.2 K
`135 K
`16.6 K
`8.4 K
`13.5 K
`16.8 K
`dBV < PWM
`Base
`9
`11
`14
`5
`11
`15
`Oscillator tolerance
`129.2% £29296
`15.1%
`i9.7%
`i29.2%
`$9.796
`140.7%
`Integrity
`Perfect Good
`Fair
`Fair
`Perfect
`Fair
`Superb
`
`All of the encoding techniques considered are capable of bit—by—bit arbitration. This is not
`commonly recognized with some of the encoding techniques, e.g. MFM, and will be addressed
`in Sec. 26.2.7 (arbitrares). Bit—by—bit arbitration is calculated on the number of transitions per
`bit of data.
`
`A suitable data-encoding technique should not generate excessive levels of EMI, and this
`consideration is a dominating challenge in making an encoding choice. The CISPR Standard’R
`is usually considered adequateThis factor determines the maximum allowable data rate of the
`encoding technique, in order to maintain a level of EMI below the CISPR standard break
`point, i.e., ~60 dBV at 500 kHz. The values predicted in Table 26.2 used the same technique
`described in the next section.
`
`Equation (26.1) in Fig. 26.10 can be used to predicts the EMI levels radiated by a single
`wire in a vehicle wiring harness The technique was used to calculate and plot a Fourier series
`of a sample trapezoid wave to determine the values given in Table 26.2. The calculations
`assumed a 10.4 Kbps data rate at a 42 percent factor of the minimum feature size (minimum
`pulse width) to determine the rise time. Consider the trapezoidal wave shown in Fig. 26.10.
`The shortest rise time (42 percent of shortest pulse width),shortest pulse time, and fastest rel}
`etition rate should yield the worst—case BM] in dBV. The actual measured EMI will be a few
`dBV better than the calculated dBV because the output driver frequency bandwidth does act
`as a low-pass filter [EMI below PVVM (dBV < PWM)].
`
`* CISPRFDI'WGZ (Secretariat) 19 Sept 1989 Radiated Emissions Antenna 8:. Probe Test Document has been gener—
`ally interpreted by most RF engineers to specify a break point at 500 kHz of ~60 dBV.
`
`0, _fl
`‘
`T
`
`n
`
`_
`
`_
`
`where n IS an tnteger
`freq 2 ?
`a:n-m]-r1
`
`b=fl'0)[‘[2
`
`Volts
`Vam
`P
`
`C=fl‘(.0|‘33
`(R_;1_
`Costa! + Coslbl—Cm'lc!
`"_ it +
`l
`3|
`I’a—fz
`
`
` {gt—[3 t0 t1 t2 t3 >_l Time
`
`
`
`l4
`r
`_
`.
`FIGURE 26.10 Trapezotdal wave shapmg.
`
`3_ —Sin§a! + Sinlcl~Sinlbl
`_
`r1
`
`MAG = ZillogM VR2 + F2
`(2-rr-rr)2
`
`(26.1}
`
`
`
`542
`542
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`26.1 1
`
`There are a number of hardware constraints that affect network synchronization and oscil-
`lator tolerance. The values given in Table 26.2 are calculated without considering these con-
`straints because they are not generally considered a factor for evaluating encoding
`techniques. For all encoding techniques, the same nominal bit rates or average bit rate, as in
`the case of VPWM, was used. The small decrease in data rates for 10-Bit NRZ, Bit—Stuf NRZ,
`and E-MAN, due to the added bits for synchronization, is normally neglected; i.e., Baud rate
`was used.
`
`The technique used by the receiver to detect a synchronizing transition plays a role in
`determining oscillator tolerance. Many different sampling or integration techniques could be
`used for a comparison, but for the sake of obtaining a reasonable judgment, for the encoding
`techniques under consideration, a very simple pulse width counter technique was assumed. A
`12.5 percent of minimum pulse width (PW min) was assumed for variability in integration
`time (IT).The maximum time for synchronization was either the maximum pulse width (nom—
`inal) or time (nominal) between synchronization transitions.
`Equation (26.2) in Fig. 26.11 yields the natural oscillator tolerance for the encoding tech-
`nique. Figure 26.11 illustrates the maximum fast clock and minimum slow clock that can
`determine the logic value, either a “1” or a “O”, for the symbol decoded by the symbol
`decoder. The IT is the time of uncertainty in determining the pulse width. The example
`demonstrated is for PWM encoding technique. All the other encoding techniques follow the
`same method.The actual tolerance would be affected by the application and the specific hard—
`ware used in the network. The variabilities introduced by the specific hardware will be needed
`to adjust parameters in Eq. (26.2) in order to find the final node oscillator tolerance.
`
`Nominal Clock
`(Logic "1")
`
`Nominal Clock
`(Logic "0")
`
`|<——— PW max ——>[<-—PW min——->|
`'
`|<-PW min—>|<——-——~ PW max ——>|
`I
`
`]<—-- PW max —>|<—PW min—>|
`
`Fast Clock
`(Logic "1")
`
`Slow Clock
`(Logic "0")
`
`|<—- PW min —>]<-——-——— PW Max ——-——>|
`I
`‘
`
`1° =
`To /0
`
`PWmax—PWmin-IT *
`PW max + PW min
`
`100
`
`(26.2)
`
`FIGURE 26.11 Example of oscillator tolerance calculations.
`
`There are generally three types of oscillators used with vehicle multiplex circuits: quartz
`crystal for very tight oscillator tolerances; ceramic resonators for low-cost, tight tolerances
`and fast startup time; and RC oscillators for very low cost and very fast startup time at a very
`loose oscillator tolerance.
`
`The noise filter used is usually a digital filter or some type of sampling process. RC filters
`are usually not used because they are not precise enough. For all of the encoding techniques,
`a 12.5 percent of minimum pulse width was used for IT in calculating the oscillator tolerance.
`
`543
`543
`
`
`
`26.12
`
`SAFETY, CONVENIENCE, ENTERTAINMENT, AND OTHER SYSTEMS
`
`In a single—wire network, ground offsets between nodes cause an added received pulse-
`width variability. This condition is especially acute when trapezoidal waveforms are used to
`reduce EMI. Figure 26.12 illustrates the pulse-width timing (T) variability introduced by
`ground offset. This pulse—width variability must be accounted for because it causes a reduction
`in minimum pulse width and an increase in maximum pulse width, thus having the effect of
`reducing oscillator tolerance.
`
`Offset
`
`
`
`
`
`Max
`Nom
`Min
`
`
`
`
`
`FIGURE 26.12 Ground offset on pulse—width timing.
`
`The output drivers are the source of another pulse-width variability. The effect is the same
`as with ground offset only not nearly as acute. The problem is caused by line drivers used to
`permit arbitration having a longer delay time when going from the active to passive state than
`from a passive to active condition.
`Data integrity is judged on a scale from poor, fair, good, superb, to perfect. Data integrity is
`generally considered to be affected by the EMI. The ambient levels of EMI in a vehicle are
`very low. This condition must remain in order to operate a communications receiver (con-
`sumer radio) in a vehicle. The problem is that very high levels of “bursty” noise for a short
`period at random intervals can completely disrupt multiplex communications for the duration
`of the noise. The only other effect of this bursty noise is a barely noticeable pop in the radio
`speaker. During these events, data integrity is compromised. The accepted practice for data
`communication (Class B) multiplexing is to simply detect this data corruption and throw out
`the full message rather than try to recover the data. This practice is acceptable because the
`amount of corrupted data compared to noncorrupted data is considered negligible, and/or can
`be retransmitted without causing bus bandwidth problems.
`A thorough noise immunity study is very complex, and the criteria for judging would con-
`sider many factors. If something is known about the noise environment and the detector hard-
`ware, as is the case with the automotive situation, a study of data integrity may be useful. For
`the purpose of this discussion, assume that the criteria for judging which data-encoding
`method is acceptable is mainly dependent on its natural ability to detect corruption. Also, the
`corruption detection ability is often determined by the interface hardware capability and its
`message—handling protocol.
`A number of validation tests can be performed on the message level. Bit-error algorithms
`such as a parity bit, checksum, or CRC are the most common test. Also, some protocols can
`perform message length by either message type or defining the message length in the data.
`These and other message level tests are independent of the bit-encoding method and should
`not influence data integrity of the bit—encoding technique.
`The natural ability of the encoding technique to detect corruption is known as invalid bit
`detection. Usually three types of data integrity factors are considered for vehicle multiplexing
`because the effects of EMI environment are basically known:
`
`1. Low pass filtering. For this factor, the data bit is passed through a low pass filter, i.e., an
`integrator; the longer the shortest pulse duration, the more effective the filtering.
`2. The bursty noise detection test checks for a short duration of EMI.
`3. Two independent data bit tests confirm valid data. PWM, for example, has two unique sam-
`ple periods per bit and both periods must complement each other.
`
`544
`544
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`26. 1 3
`
`26.2.1 Pulse-Width Modulation (PWM)
`
`The PWM encoding technique6 is composed of two sample periods or phases (T1 and T2) per
`bit, as shown by Fig. 26.13. PWM encoding has the advantage that the time per bit remains con—
`stant, but has the disadvantage of generating more EMI because it has two transitions per bit.
`This time per phase of PWM also affects the generated EMI noise and, to minimize the EMI
`effect, one phase time is usually defined to be two times the other phase time in duration.
`
`Passive
`
`"0"
`Bit Logic Value
`FIGURE 26.13 PWM encoded data.
`
`"1"
`
`Arbitration ofPWM. PWM has the ability to perform bit-by—bit arbitration. Figure 26.14 illus-
`trates that a “0” bit dominates and takes priority when bit-by—bit arbitrating over a logic “1”.
`
`Logic "0" Bit
`
`Logic "1" bit
`
`Logic
`Results:
`"0" has priority
`over a logic "1"
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`‘
`
`FIGURE 26.14 A logic “0” arbitrating with a logic “1”.
`
`1
`
`Data Integrity ofPWM. Consider a hardware sampler that has the capability of detecting (1)
`transition and (2) phase ((1)) every sample window, as shown in Fig. 26.15.The sampler starts sam—
`pling at a transition, then sequentially samples window 1, window 2, and then window 3. If a
`transition is not detected by window 3, then data has been corrupted and the message is thrown
`out. When this type of sampler is used for PWM encoded data the sampler would sample five
`windows per bit and yield dual transition and phase information per bit. The transition and
`
`"T""1
`\
`
`
`
`“t l _ :t_|_____
`
`Window
`
`1
`
`2
`
`3
`
`Error
`short
`Long
`
`1 + qb
`0
`0
`
`X
`1 + o
`O
`
`X
`X
`1 + 4;
`
`FIGURE 26.15 A three-window sampler,
`
`545
`545
`
`
`
`26.14
`
`SAFETY, CONVENIENCE, ENTERTAINMENTAND OTHER SYSTEMS
`
`phase information must be consistent for a correct PWM encoded data or corruption would be
`assumed and the message will be thrown out. If at any time a transition of either phase is
`detected in sample window 1, the data has been corrupted and the message is thrown out.
`PWM encoding is judged to have very good “perfect" invalid bit—testing capabilities even
`though the effectiveness of the low—pass filter is poor. Otherwise, it has two of the three (e.g.,
`dual periods confirmation of data and burst noise) validation tests PWM is “perfect” encod-
`ing technique used in vehicle multiplexing when data integrity has the highest priority. How-
`ever, this encoding technique has multiple transitions per hit and would not allow operation
`at data rates near the natural EMI limits for single-wire or twisted pair transmission media.
`
`26.2.2 Variable Pulse-Width Modulation lVPWMl
`
`VPWM (sometimes referred to as VPW modulation) is a variation of PWM. Normal PWM
`has two phases per bit as shown by Fig. 26.16. T. is illustrated as a passive short and T2 as an
`active long. This combination is defined as a logic “0” bit. Notice that a logic “0” bit takes pri-
`ority when arbitrating over the opposite pattern of a passive long and an active short.
`
`bit n—l —b|(— bit It —~)|<— bit n+1
`
`Passive
`
`l
`
`T1 I
`
`T2
`
`I
`
`FIGURE 26.16 A PWM encoded logic “0" bit.
`
`One of the most attractive features of VPWM is that the pulse—width variability introduced
`by factors such as ground offset and output driver timing variabilities can be added to the
`pulse—width timing without severely reducing the oscillator tolerance.
`
`Arbitration of VPWM. VPWM encodes each phase as a data bit. Figure 26.1? illustrates a
`passive short arbitrating with a passive long. Figure 26.18 illustrates an active long arbitrating
`with an active short. In both cases, a logic “0“ takes priority over a logic “1" bit. Therefore,
`arbitration using VPWM data encoding can be achieved.
`
`A passive Short
`is defined as a
`logic “0" bit
`
`long
`A passive
`is defined as a
`logic "1" bit
`
`Results:
`A passive
`short has priority
`over a passive long
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`l
`
`I
`
`I
`
`FIGURE 26.]? A passive short arbitrating with a passive long.
`
`VPWM is utilized by SAE 11850; i.e., it uses a pulse width of 64 us for a short and 128 us
`for a long and approximates the same average data rate (10.4 Kbps) as regular PWM using a
`pulse width of 32 its for a short and 64 its for a long. The VPWM minimum pulse width for a
`short is 64 us and permits a rise time of 16 us for T as illustrated in Fig. 26.12. Compare this
`rise time to conventional PWM where a 32—tts short permits only an 8—ps rise time. The result
`of the proportionally longer rise time and wave shaping is an approximate 9—dBV improve—
`ment in EMI over PWM. The disadvantage of VPWM encoding is that the data rate per byte
`
`546
`546
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`26.15
`
`An active long
`is defined as a
`logic "0" bit
`
`An active short
`is defined as a
`logic "1" bit
`
`An active
`Results:
`priority
`long has
`over an active short
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`Active
`
`Passive
`
`FIGURE 26.18 An active long arbitrating with an active short.
`
`!
`
`transmitted will vary in time depending on the data value. The microcomputer interfacing
`transmitter/receiver polling rate with VPWM is required to be less than z 512 us per byte,
`Whereas with PWM, less than : 768 us per byte is required.
`
`Data Integrity of VPWM. VPWM has good data integrity by sampling up to three times
`every pulse width as shown in Fig. 26.15. The sampler is designed to detect a transition and
`phase ((1)) every sample window and have an average number of 2.5 samples per bit. If at any
`time a transition of either phase is detected in sample window 1, the data has been corrupted
`and the message is thrown out.
`The sampling sequence is initiated by a transition of either phase. A short symbol is then
`sensed by not detecting a transition (0) in window 1 and detecting a transition (1 + (1)) and
`proper phase in window 2. Sampling in window 3 is a “don’t care” (X), because sampling is ter-
`minated and the procedure is repeated. Window 3 is actually window 1 on the next sampling
`sequence.
`A long symbol is likewise sensed by not detecting a transition (0) in window 1 or 2 and
`detecting a transition (1 + (1)) and proper phase in window 3.
`The proper phase detection, when a transition is sensed, is used to ensure that the
`sequence does not get scrambled. It is also used to define which logic level, “1” or “O”, has
`been received.
`
`VPWM has been judged to have “good” data integrity because low-pass filtering of the data
`pulse width is good. Every transition is validated by an error—sampling window, and pulse dura-
`tion measurements are validated by the proper phase test, i.e., two of the three invalid bit tests.
`
`26.2.3 Standard 10-Bit NRZ
`
`This is an asynchronous serial I/O (standard UART) 10 bits-per—byte of data. A start bit and a
`stop bit are added to provide data byte synchronization. The standard UART used in RS232
`is bit—ordered least significant bit (LSB) first. Figure 26.19 illustrates this 10—bit NRZ wave—
`form. Vehicle multiplex networks that use 10-bit NRZ make use of the available hardware
`that have this asynchronous I/O, i.e., the serial communications interface (SCI) available on
`many microcomputers.
`
`START
`
`DATA
`
`STOP
`
`
`7 “In-IE 0
`FIGURE 26.19 A lO-bit NRZ waveform (LSB first).
`
`547
`547
`
`
`
`26.16
`
`SAFETY, CONVENIENCE, ENTERTAINMENT, AND OTHER SYSTEMS
`
`Arbitration of 10-Bit NRZ. Figure 26.20 illustrates 28H from transmitter #1 arbitrating
`with 44H from transmitter #2. An active “0” is defined to win arbitration over a passive “1”.
`Take note that bus has a 28H on it and, therefore, transmitter #2 shuts off its output when it
`tries to transmit bit #2.This loss of arbitration action is the usual method employed by all arbi—
`trating protocols.
`
`XMIT #1
`
`XMIT #2
`
`BUS
`
`1
`
`0
`
`l
`
`0
`
`1
`
`0
`
`O
`
`O
`
`0
`
`0
`
`O
`
`1
`
`O
`
`l
`
`0
`
`l
`
`2
`
`l
`
`2
`
`0
`
`2
`
`3
`
`O
`
`3
`
`1
`
`3
`
`4
`
`O
`
`4
`
`0
`
`4
`
`5
`
`O
`
`5
`
`l
`
`5
`
`6
`
`1
`
`6
`
`0
`
`6
`
`7
`
`O
`
`7
`
`0
`
`7
`
`0
`
`0
`
`0
`
`FIGURE 26.20 Arbitration of a 10-bit NRZ network.
`
`Data Integrity of 10-Bit NRZ. The bit—synchronized sampling technique used for PWM
`and VPWM could be used for 10-bit NRZ encoded data, but it would be much more complex
`because it could be guaranteed to synchronize only on the stop—to—start transition. It would
`not sample only one bit, it may have to sample all eight. The normal technique is to use a start
`bit detector to sense a valid start bit and then sample all eight of the data bits sequentially.
`As with all decoding techniques, the data is passed through a low-pass filter. However, fil-
`tering for NRZ is very effective because of the long data pulse duration. 10-bit NRZ encod-
`ing has been judged to have “fair” data integrity, mainly because the addition of a transition
`between the stop bit and start bit is not unique in the sequence and the detector hardware
`could get scrambled. Adding an invalid bit detection for bursty noise between data bits would
`improve the data integrity, but it could not validate every bit.
`
`26.2.4 Bit-Stuf NRZ
`
`Bit—stuffing is another way of synchronizing NRZ encoded data. The concept is to insert a bit
`(i.e., two transitions) after a specified number (X) of bits of contiguous “1” or “0” bits and if the
`X + 1 bit is the same logical value as the other contiguous bits. The proper number of contigu-
`ous bits is chosen as a compromise between the oscillator tolerance and the generated EMI.The
`higher the number of contiguous bits before inserting a stuff-bit, the better the synchronizing
`oscillator tolerance must be, but the lower the EMI. There is also a receiver decoding complex—
`ity consideration with bit-stuf NRZ. Figure 26.21 illustrates waveform used by CAN for X = 5.
`The number of stuff-bits in a frame is dependent on the data value, and the transmission
`time for a data byte is a variable quantity depending on this data value. A number of the fac—
`tors used to evaluate bit-stuf NRZ require a knowledge of the average number of data bytes
`per stuff-bit (see Fig. 26.22). This average number can be derived because the nature of a data
`bit in a message has equal probability of being a “1” or “0”.
`
`Arbitration of Bit-Stuf NRZ. As with all arbitrating encoding methods, the bit-stuf NRZ
`transmitter utilizes a driver that has an active state and a passive state, thereby supporting bit-
`by-bit arbitration.
`
`548
`548
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`26.17
`
`ORIGINALBITSTREAM OlOOllllllllOOlOOOl'
`(TRANSMITTER)
`'- Sixth Contiguous "1"
`OlOOIlllllOlll‘OOlOOOll
`‘— Opposite Bit "Stuffed" in Stream
`
`BITSTREAMONBUS
`
`ORIGINALBITSTREAM 010000001110010001
`(TRANSMITTER)
`
`BITSTREAMONBUS
`
`FIGURE 26.21 NRZ bit—stuffing.
`
`Sixth Contiguous "O"
`OlllOOOOOlOlllOOlOOOl
`‘— Opposite Bit "Stuffed" in Stream
`
`The probability of there being a stuff-bit before B,- in the
`stuffing algorithm where X = 5 is as follows:
`
`B0’ Bl. o 0 Bi. 0 o Bn-l
`
`_
`Pi ‘
`
`0 when
`i < 5
`1/32 when i = 5
`1/64 when 1' > S
`
`= N0. of BYTES/STUF
`F(N)
`
`F(N) = n_lN
`Pi
`i=0
`
`wheren = No. of Bi ts
`
`N = {33 = No. of Bytes
`lim F(N) = 8
`N-u
`
`F ( l 2 )
`
`= 8 . 3 4 8
`
`FIGURE 26.22 Derivation of average number of stuff-bits.
`
`Data Integrity Bit-Stuf NRZ. The bit—synchronized six-window sampling technique illus-
`trated in Fig. 26.23 could be used for bit—stuf NRZ encoded data and would be guaranteed to
`synchronize on the stuff—bit. It must accommodate sampling from one to five data bits sequen-
`tially. All bits of data prior to sampling a transition are assigned the same logic level as the
`level detected by transition and phase detector. If transition is detected in window #1, which
`is due to bursty noise, the message would be thrown out. This detector could somewhat
`improve the data integrity, but it could not validate every bit. As with all decoding techniques,
`the data is passed through a low-pass filter. However, filtering for NRZ is very effective
`because of the long data pulse duration.
`Bit-Stuf NRZ encoding has been judged to have “fair” data integrity, mainly because the
`addition of a synchronizing stuff bit is not unique in the sequence and the detector hardware
`could get scrambled.
`
`549
`549
`
`
`
`26.18
`
`SAFETY, CONVENIENCE, ENTERTAINMENT, AND OTHER SYSTEMS
`
`""T"'"T'V"'TT"T'\'"'I
`
`
`
`\ l 32‘ L: L: l 33—!—
`
`Window
`Data
`
`Error
`Bit 1
`Bit 2
`Bit 3
`Bit 4
`Bit 5
`
`1
`
`1+¢
`0
`0
`o
`o
`o
`
`2
`Dn
`
`X
`1+¢
`0
`0
`0
`o
`
`3
`Dn+1
`
`X
`X
`1+¢
`0
`o
`0
`
`4
`Dirt-2
`
`X
`X
`X
`1+¢
`o
`O
`
`5
`Dn+3
`
`X
`X
`X
`x
`1+¢
`0
`
`FIGURE 26.23 A six—window sampler.
`
`26.2.5 L-ManchesterlL-MAN)
`
`The L—MAN encoding technique is composed of two sample periods of opposite phases per
`bit, as shown by Fig. 26.24. L-MAN encoding has the advantage that the time per bit remains
`constant, but has the disadvantage of generating more EMI because it can have an average of
`one-and-a—half and maximum of two transitions per bit.
`
`W L
`
`i
`
`"1"
`
`CLOCK
`
`Act ive
`
`Pass ive
`
`I
`
`[
`
`|
`
`Bit Logic Value
`
`"0"
`
`FIGURE 26.24 L-MAN encoded synchronizing bits.
`
`A transition from active to passive level will be decoded as a logic “0” and a transition from
`passive to active level will be decoded as a logic “1”. A synchronizing transition is always gen-
`erated in the center of the bit period but may not be generated at the beginning of a bit
`period, depending on the data. As illustrated by Fig. 26.25, when there is a “O” to “1” or “1” to
`“0” data sequence the transition is not generated.
`
`CLOCK
`
`Act ive
`
`Passive
`Data
`
`
`
`1
`
`0
`
`0
`
`1
`
`FIGURE 26.25 One byte of L—MAN encoded data.
`
`550
`550
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`26.19
`
`Active
`_
`Pass 1ve
`
`Xmit #1 Logic Value
`
`Active
`Xmit #2
`Passive
`.
`_
`Xmlt #2 Logic Value
`
`Active
`
`Passive
`
`I
`
`I
`
`I
`
`I
`
`I
`
`I
`
`I
`
`I
`
`"0,,
`
`"1"
`
`I
`
`I—I—I
`
`Arbitration of L-MAN. Figure 26.26 illus-
`trates how a logic “0” arbitrating with a logic
`“1” always wins arbitration. This situation is
`true because the active portion of the Signal
`overrides the passwe portion and also shuts
`off the output of the passive contender
`before it would become active.
`
`Data Integrity of L-MAN. Consider a
`three-window sampler that has the capability
`of detecting a transition (1) and phase (4))
`every sample window as shown in Fig. 26.15.
`
`The circuit starts sampling at a transition and
`
`l
`"0"
`I
`BUS Logic Value
`FIGURE 26.26 A logic “0” arbitrating with a logic
`ML
`
`then sequentially samples window 1, window
`2, and then window 3. If a transition is not
`dammed by wmdow 3’ the“ .data has been
`corrupted and the message is thrown out.
`When this type of sampler is used for L-
`MAN encoded data, the sampler would sam-
`ple four to five windows per bit and yield complementary transition and phase information
`per bit. If DI] and Dn+1 have the same logic level—Le, “1s” or “Os”—then a transition must not
`occur at the bit boundary or a corrupted data would be assumed and the message will be
`thrown out. If at any time a transition of either phase is detected in sample window 1, the data
`has been corrupted and the message is thrown out.
`L—MAN encoding is judged to have very good “perfect” invalid bit—testing capabilities
`even though the effectiveness of the low—pass filter is poor. Otherwise, it has two of the three
`validation tests: dual validation of data by proper periods at the bit boundary and bursty noise
`test every bit. L—MAN has “perfect” encoding technique used in vehicle multiplexing when
`data integrity has the highest priority. However, this encoding technique has multiple transi-
`tions per bit and would not allow operation at data rates near the natural EMI limits for sin-
`gle-wire or twisted pair transmission media.
`
`26.2.6 E-ManchesterlE-MAN)
`
`E-Manchester, or enhanced manchester, utilizes an L-Manchester encoded data bit for syn—
`chronization combined with three bits of NRZ encoded data bits. Figure 26.24 illustrates the
`L—Manchester synchronizing bit values and Fig. 26.27 is an illustration of four bits of E—MAN
`encoded data.
`
`Clock
`
`Bit Logic
`Value
`
`Passive
`
`I
`
`|
`
`"on
`
`NRZ
`
`I
`
`I
`
`"1"
`
`NRZ
`
`I
`
`I
`
`"0|!
`
`NRZ
`
`I
`
`|
`
`"1"
`
`MAN
`
`I
`
`I
`
`FIGURE 26.27 Four bits of E—MAN encoded data bits.
`
`Arbitration of E-MAN. When arbitrating, an active (logic “0”) takes priority over the
`opposite pattern (logic “1”) for both the NRZ bits and the MAN encoded synchronization
`bit. This domination of a logic “0” over a logic “1” is easily understood for the NRZ encoded
`
`551
`551
`
`
`
`26.20
`
`SAFETY, CONVENIENCE, ENTERTAINMENT, AND OTHER SYSTEMS
`
`portion of an E—MAN encoded byte. The dominance of a logic “0” synchronization bit, which
`seems confusing, can be easily realized by considering the fact that the active portion of the
`signal overrides the passive portion and also shuts off the output of the passive contender
`before it would become active.
`
`The main advantage of E—MAN over PWM or VPWM is that the shortest pulse width at
`10.4 Kbps is 2 76.8 us, and permits a 42 percent rise time of 32.3 us compared to a 32 us short
`and 13 us rise time with conventional PWM. The result of the proportionally longer rise time
`and wave shaping is an approximate 11—de improvement in EMI over PWM. Another
`advantage of E—MAN over VPWM is that the data rate per byte transmitted is constant. The
`microcomputer transmitter/receiver polling rate with E—MAN is required to be a constant of
`less than 2 768 us per byte.
`
`If the same sampling technique is used for E-MAN as was used
`Data Integrity of E-MAN.
`for the bit—stuf NRZ case, it is capable of detecting (1) a transition and (2) a phase ((1)) every
`sample window. The E—MAN sampling hardware can sample up to six times every pulse width
`as shown in Fig. 26.23.
`The sampling sequence is initiated by a transition of either phase. If there is a transition (1
`+ (1)) in window 2, then the value of DH is determined by the logic level and phase.
`If there is a transition (1 + (1)) in window 3 in the sampling sequence, then D,1 = D" H and is
`determined by the logic level and phase. If there is a transition (1 + (1)) in window 4 in the sam-
`pling sequence, then D,, = D,, +1 2 Dn+2 and is determined by the logic level and phase.
`If there is a transition (1 + 1)) in window 5 in the sampling sequence, then D" = D“, = D,,+
`2 and is determined by the logic level and phase. The value of D,1 + 3 is determined by the phase
`((1)) because it is the L—MAN encoded bit and will be confirmed by a transition (1 + (1)) in win—
`dow 2 on the following sampling sequence.
`If there is a transition (1 + (1)) in window 6 in the sampling sequence, then D,1 = D,,+1 = D,,+
`2 and is determined by the logic level and phase. The value of D" + 3 is determined by the phase
`((1)) because it is the L-MAN encoded bit.
`The L—MAN encoded bit is not unique in the sequence and the detector hardware must
`keep track of where the L—MAN bit should be, because if a transition (1 + (1)) for the L—MAN
`encoded bit falls in a window other than window 6, then the value of Dn+3 is determined by
`the phase ((1)) of the transition.
`E—MAN encoding has been judged to have “fair” data integrity, mainly because the L-
`MAN encoded bit is not unique in the sequence and the detector hardware could get scram—
`bled. If a transition is detected in window 1, an invalid bit was detected, which helps data
`integrity but it could not validate every bit. As with all decoding techniques, the data is passed
`through a low-pass filter. However, filtering for E-MAN is very effective because of the long
`data pulse duration.
`
`26.2.7 Modified Frequency Modulation (MFM)
`
`Modified frequency modulation (MFM), a modulation technique developed during the latter
`1960s, was used in disk drives and is adaptable to vehicle multiplexing. The advantage of using
`the MFM encoding technique is that it would be synchronous with an average of 0.75 and a
`maximum of 1 transition per bit. The encoding technique permits a transition rise time that
`can be maximized and wave—shaped to significantly reduce EMI. Disk drives have a similar
`requirement where the modulation technique allows pulses to be recorded on a disk at maxi-
`mum density. The diagram shown in Fig. 26.28 demonstrates one method of applying MFM
`encoding technique to a data communication network.
`The rule for encoding simply causes a transition at the data time when the data at that time
`slot is a logic “1”. A transition is also generated at the clock time slot when the data before and
`after the time slot was a logic “0” (or two “0”s in a row).
`
`552
`552
`
`
`
`MULTIPLEX WIRING SYSTEMS
`
`2&21
`
`Bit #
`Time
`Data
`
`C
`
`HUN
`
`C
`
`C
`
`HUG
`
`OUU‘I
`
`Waveform
`D = Data Pulse
`
`C =
`
`FIGURE 26.28 MFM encoded byte of data.
`
`Otjw
`
`C
`
`oON
`
`C
`
`OOH
`
`C
`
`t—‘UO
`
`C
`
`C
`
`C
`
`Htjh
`l
`Clock Pulse
`
`Arbitration of MFM. A requirement for vehicle multiplexing is that the data from one
`device shall bit-by-bit arbitrate with the data from another device. The arbitration bit—order—
`ing is defined MSB first, and 00H has the highest priority. To support arbitration, the output
`driver is defined and designed to have an active state that has priority over a passive state. Fig—
`ure 26.29 demonstrates the four encoding rules that can be used to generate