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`UNITED STATES PATENT AND TRADEMARK OFFICE
`___________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________________
`
`
`INTEL CORPORATION,
`Petitioner
`
`v.
`
`ALACRITECH INC.,
`Patent Owner
`
`___________________
`
`Case IPR2017-01705
`Patent No. 7,673,072
`___________________
`
`
`
`
`
`
`PATENT OWNER’S EXHIBIT 2008
`DECLARATION OF PAUL PRUCNAL, PH.D.
`
`
`06973-00001/9637842.1
`
`
`
`
`Alacritech Exhibit 2001
`
`

`

`
`
`1.
`
`I have been retained on behalf of Alacritech, Inc. (“Alacritech” or
`
`“Patent Owner”) for the above-captioned inter partes review (IPR) proceeding. I
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`understand that this proceeding was filed by Intel Corporation (“Intel”) and
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`involves U.S. Patent No. 7,673,072 (“the ’072 Patent”), titled “Fast-path apparatus
`
`for transmitting data corresponding to a TCP connection.” The ’072 Patent is
`
`currently assigned to Alacritech. I have been retained to provide my opinions in
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`support of Alacritech’s Preliminary Response Pursuant to 35 U.S.C. § 313 and 37
`
`C.F.R. § 42.107 pursuant to the legal standards set forth below. I am being
`
`compensated for my time at the rate of $650 per hour. I have no interest in the
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`outcome of this proceeding.
`
`2.
`
`In preparing this declaration, I have reviewed and am familiar with the
`
`following prior art references:
`
`Connery (Ex. 1043) is U.S. Patent No. 5,937,169, which
`issued on August 10, 1999 and is assigned to 3Com
`Corporation.
`
`
`
`3.
`
`I have also considered all other materials cited and discussed herein,
`
`including all other materials cited and discussed in Intel’s Petition for Inter Partes
`
`Review of U.S. Patent No. 7,673,072 (Case IPR2017-01705).
`
`4.
`
`I have also considered the following:
`
`No.
`
`2006
`
`06973-00001/9637842.1
`
`
`Exhibit
`Short Name
`Memorandum Opinion and Order on Claim
`Claim
`Construction
`Construction, Case No. 2:16-cv-00693-JRG-
`Alacritech Exhibit 2001, Page 1
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`

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`
`
`
`5.
`
`Order
`
`RSP, Dkt. 362 (E.D. Tex., September 21, 2017)
`
`The statements made herein are based on my own knowledge and
`
`opinion. This Declaration represents only the opinions I have formed to date. I
`
`may consider additional documents as they become available or other documents
`
`that are necessary to form my opinions. I reserve the right to revise, supplement,
`
`or amend my opinions based on new information and on my continuing analysis.
`
`II. QUALIFICATIONS
`6. My qualifications can be found in my Curriculum Vitae, which
`
`includes a complete list of my publications. (Ex. 2009).
`
`7.
`
`I am a professor of Electrical Engineering at Princeton University, in
`
`Princeton, NJ. I received my undergraduate education at Bowdoin College, where
`
`I graduated summa cum laude in 1974 with an A.B. in Mathematics and Physics. I
`
`then graduated from Columbia University in 1976 with a M.S. in Electrical
`
`Engineering, and went on to receive an M.Phil. from Columbia University in 1978
`
`in Electrical Engineering and a Ph.D. from Columbia University in 1979 in
`
`Electrical Engineering.
`
`8.
`
`Upon graduation from Columbia in 1979, I joined Columbia
`
`University as an Assistant Professor of Electrical Engineering, and in 1984 I was
`
`promoted to Associate Professor. In 1988, I joined the faculty of Princeton
`
`University as an Associate Professor of Electrical Engineering. My responsibilities
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 2
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`included teaching and research. At that time, I also was the Founding Director of
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`the New Jersey Advanced Technology Center for Photonics and Optoelectronic
`
`Materials. My responsibilities included leading a $10 million research center
`
`involving approximately thirty faculty members.
`
`9.
`
`In 1990, I was promoted to the position of full Professor of Electrical
`
`Engineering at Princeton University. My teaching responsibilities have included
`
`courses in electronic circuits, signal processing, communications and fiber-optic
`
`networks. My broad research interests have included communications networks
`
`and switching, computer interconnects, and network security. I also head the
`
`Lightwave Communications Research Laboratory and the Center for Network
`
`Security and Access at Princeton University, through which much of my present
`
`research is conducted.
`
`10. While at Princeton University, I received several awards and
`
`recognitions, including: (a) becoming a Fellow of the Institute for Electrical and
`
`Electronics Engineers (IEEE) where my fellow citation is, “For contributions to
`
`photonic switching and fiber-optic networks;” (b) becoming a Fellow of the
`
`Optical Society of America (OSA); (c) receiving the Rudolf Kingslake Medal and
`
`Prize from the Society of Photo-Optical Instrumentation Engineers (SPIE) for the
`
`most noteworthy original paper in Optical Engineering, titled, “Self-routing
`
`photonic switching with optically processed control;” (d) receiving the
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`06973-00001/9637842.1
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`
`Alacritech Exhibit 2001, Page 3
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`
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`international Gold Medal Award from the Faculty of Mathematics, Physics, and
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`Informatics from Comenius University; (e) receiving the Princeton University
`
`Graduate Mentoring Award; (f) receiving the Lifetime Achievement Award for
`
`Excellence in Teaching from the Engineering Council at Princeton; (g) receiving
`
`the Walter Curtis Johnson Prize for Excellence in Teaching; (h) receiving the
`
`Princeton School of Engineering and Applied Science Distinguished Teacher
`
`Award; (i) receiving the President’s Award for Distinguished Teaching at
`
`Princeton.
`
`11.
`
`I am the author of the books, “Optical Code Division Multiple Access:
`
`Fundamentals and Applications” (2005) and “Neuromorphic Photonics (2017),
`
`both of which relate to networking. I am a co-author or contributor to
`
`approximately thirty additional book chapters, as well as over 300 peer-reviewed
`
`publications in peer-reviewed journals and conference proceedings including
`
`papers in the area of communications networks and packet switching.
`
`12.
`
`In addition to the activities, education, and professional experience
`
`listed above, I have been involved in numerous research projects that contribute to
`
`my expertise relating to this report. My work in these projects have included,
`
`among other things, multiple access techniques for high-speed communication
`
`networks and fast packet switching techniques. More information on several of
`
`these research projects is provided below.
`
`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 4
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`13.
`
`In 1982, I worked with Optical Information Systems, Inc. on a project
`
`that involved transceiver design for communications systems. My responsibilities
`
`included the investigation of high-speed clock recovery.
`
`14.
`
`In 1983-1984, I worked with GTE Labs on a project that involved
`
`performance analysis of communication systems. My responsibilities included the
`
`investigation of high performance modulation formats.
`
`15.
`
`In 1985-1986, I worked with AT&T Bell Laboratories on a project
`
`that involved research on multiple access techniques. My responsibilities included
`
`investigating multiplexing techniques for telecommunications networks.
`
`16.
`
`In 1987-1988, I worked with IBM on a project that involved research
`
`on multiple access techniques and switching for computer communication
`
`networks.
`
`17.
`
`In 1987-1989, I worked with Dove Electronics on a project that
`
`involved research on communication switching technology and architectures. My
`
`responsibilities included the design and analysis of fast packet switching
`
`architectures.
`
`18.
`
`In 1992-1995, I worked with Siemens Corporate Research on a
`
`project that involved research on switching technology. My responsibilities
`
`included the investigation of technologies for high speed multiplexing and
`
`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 5
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`switching, and performing an analysis of the potential application of these
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`technologies to telecommunications networks that carried TCP/IP traffic.
`
`19.
`
`In 1999-2000, I worked with SAIC on a project that involved research
`
`on network architectures. My responsibilities included the investigation of fast
`
`switching and multiplexing techniques for high-speed communication networks.
`
`20.
`
`In 1999-2002, I worked with Multi Link Technologies, Inc. on a
`
`project that involved communication transceiver design. My responsibilities
`
`included the design and analysis of high-speed transmitters and receivers.
`
`21.
`
`In 2000-2002, I worked with Ultra-Fast Optical Systems on a project
`
`that involved research and development on packet switching technology. My
`
`responsibilities included the design and testing of switch technology.
`
`22.
`
`In 2000-2003, I was a member of the advisory board on optical
`
`network technology for Alphion, Inc. My responsibilities included providing
`
`guidance on the development of technology in the communication networks space.
`
`23.
`
`In 2003-2006, I worked with Kailight Inc. on a project that involved
`
`research and development on switching technology. My responsibilities included
`
`the design and testing of an optical switch for communication networks.
`
`24.
`
`In 2006-2008, I led a DARPA-funded project developing an add drop
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`multiplexer for a metropolitan area networks.
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 6
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`25.
`
`In 2004-2011, I worked with NEC Laboratories on a project that
`
`involved research on physical layer security in communication networks. My
`
`responsibilities included the design and analysis of techniques for steganography
`
`and data encryption.
`
`26.
`
`I am also a named inventor on at least 27 issued U.S. patents, and at
`
`least 5 additional U.S. patent applications.
`
`27.
`
`I have extensive experience in the communication networks field
`
`throughout my career, including being an editor for the IEEE Transactions on
`
`Communications.
`
`28. Also, during the past 10 years I have taught several undergraduate and
`
`graduate courses at Princeton on communications, such as “Photonics and
`
`Lightwave Communications,” which includes digital communications systems and
`
`networks, including protocols such as TCP/IP; “Electronic Circuit Design,” which
`
`covers basic circuit design and implementation; and “An Introduction to
`
`Engineering,” which includes basic communication networks. I am also involved
`
`with independent research projects involving senior thesis works, the majority of
`
`which pertain to communications systems and networking.
`
`29. My research focuses on advanced topics in lightwave and radio
`
`frequency communication systems, networks and switching. My research has been
`
`supported by contracts and grants from the National Science Foundation (NSF),
`
`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 7
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`the U.S. Army Communication Electronics Command, the Office of Naval
`
`Research, the Defense Advanced Research Projects Agency (DARPA) and the
`
`National Security Agency, among others.
`
`30.
`
`I also have extensive experience consulting for the communications
`
`industry, including AT&T Bell Laboratories, NEC Labs, Alphion Inc. and the
`
`Institute for Defense Analyses. In particular, my work at the Institute relates to
`
`computers and communication networks.
`
`31.
`
`I have been a technical advisor to several startup companies in the
`
`telecommunications industry. Based on my patents, Kalight Photonics developed
`
`all-optical communication switching technology, before being acquired by a
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`publicly traded company. Another company, Bascom Hunter Technologies, in
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`conjunction with L3 Telemetry East, developed an anti-jamming systems for
`
`wireless networks. This work is also based on my patents.
`
`32. From my education, teaching, and consulting experience, I am
`
`familiar with networking protocols in general and in particular the TCP/IP
`
`protocol. I am also familiar with TCP offload engines (sometime referred to as
`
`TOE) that offload the processing of the entire TCP/IP stack to the network
`
`controller. I am also familiar with the technologies sometimes referred to as Large
`
`Segmentation Offload (LSO) and Receive Side Coalescing (RSC).
`
`III. LEGAL UNDERSTANDING
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`06973-00001/9637842.1
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`
`Alacritech Exhibit 2001, Page 8
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`A. The Person of Ordinary Skill in the Art
`33.
`
`I understand that a person of ordinary skill in the relevant art (also
`
`referred to herein as “POSA”) is presumed to be aware of all pertinent art, thinks
`
`along conventional wisdom in the art, and is a person of ordinary creativity—not
`
`an automaton.
`
`34.
`
`I have been asked to consider the level of ordinary skill in the field
`
`that someone would have had at the time the claimed invention was made. In
`
`deciding the level of ordinary skill, I considered the following:
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`• the levels of education and experience of persons working in the
`
`field;
`
`• the types of problems encountered in the field; and
`
`• the sophistication of the technology.
`
`35. My opinion below explains how a person of ordinary skill in the art
`
`would have understood the technology described in the references I have identified
`
`herein around the October 1997 timeframe. I have been advised that the earliest
`
`possible effective filing date of the ’072 Patent is October 14, 1997.
`
`36.
`
`In my opinion, a POSA at that time would be a person with (i) at least
`
`four years of relevant work or research experience in the field of network
`
`engineering and/or design; (ii) a Bachelor’s of Science degree in electrical
`
`engineering, computer science, or a related field plus at least two to three years of
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 9
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`
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`relevant work or research experience in the field of network engineering and/or
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`design, or (iii) an advanced degree (e.g., Master’s or Ph.D.) and one to two years
`
`of relevant work or research experience in the field of network engineering and/or
`
`design.
`
`37.
`
`I am well-qualified to determine the level of ordinary skill in the art
`
`and am personally familiar with the technology of the ’072 Patent in the October
`
`1997 timeframe. By 1997, I had completed my formal education and had been
`
`working in the relevant field as a professor, researcher, or consultant for more than
`
`15 years. I have supervised, recruited, advised, and taught individuals at all levels
`
`of training in the relevant field. I have also worked with individuals in the industry
`
`at all levels of training in the relevant field.
`
`38.
`
`I was a person of at least ordinary skill in the art at this timeframe.
`
`Regardless if I do not explicitly state that my statements below are based on this
`
`timeframe, all of my statements are to be understood as a POSA would have
`
`understood something as of the alleged effective filing date of the ’072 patent.
`
`B. My Understanding of Obviousness Law
`39.
`
`I am not a lawyer and will not provide any legal opinions. Though I
`
`am not a lawyer, I have been advised that certain legal standards are to be applied
`
`by technical experts in forming opinions regarding the meaning and validity of
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`patent claims.
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 10
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`40.
`
`I understand that a patent claim is invalid if the claimed invention
`
`would have been obvious to a person of ordinary skill in the field at the time the
`
`application was filed. This means that even if all of the requirements of the claim
`
`cannot be found in a single prior art reference that would anticipate the claim, the
`
`claim can still be invalid.
`
`41. To obtain a patent, a claimed invention must have, as of the priority
`
`date, been nonobvious in view of the prior art in the field. I understand that an
`
`invention is obvious when the differences between the subject matter sought to be
`
`patented and the prior art are such that the subject matter as a whole would have
`
`been obvious at the time the invention was made to a person having ordinary skill
`
`in the art.
`
`42.
`
`I understand that to prove that prior art, or a combination of prior art,
`
`renders a patent obvious, it is necessary to: (1) identify the particular references
`
`that singly, or in combination, make the patent obvious; (2) specifically identify
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`which elements of the patent claim appear in each of the asserted references; and
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`(3) explain how the prior art references could have been combined to create the
`
`inventions claimed in the asserted claim.
`
`43.
`
`I understand that certain objective indicia can be important evidence
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`regarding whether a patent is obvious or nonobvious. Such indicia include: (1)
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`commercial success of products covered by the patent claims; (2) a long-felt need
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 11
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`for the invention; (3) failed attempts by others to make the invention; (4) copying
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`of the invention by others in the field; (5) unexpected results achieved by the
`
`invention as compared to the closest prior art; (6) praise of the invention by the
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`infringer or others in the field; (7) the taking of licenses under the patent by others;
`
`(8) expressions of surprise by experts and those skilled in the art at the making of
`
`the invention; and (9) the patentee proceeded contrary to the accepted wisdom of
`
`the prior art.
`
`44.
`
`I understand that in evaluating the validity of the ’072 Patent claims,
`
`the content of a patent or printed publication prior art should be interpreted the way
`
`a person of ordinary skill in the art would have interpreted the prior art as of the
`
`effective filing date (October 1997) of the challenged patent. My full analysis
`
`below is based upon these understandings.
`
`C. My Understanding of Claim Construction
`45.
`
`I have been instructed by counsel on the law regarding claim
`
`construction and patent claims, and understand that a patent may include two types
`
`of claims––independent claims and dependent claims. An independent claim
`
`stands alone and includes only the features it recites. A dependent claim can
`
`depend from an independent claim or another dependent claim. I understand that a
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`dependent claim includes all the features that it recites in addition to all of the
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`features recited in the claim from which it depends.
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 12
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`46.
`
`I understand that in this inter partes review the claims must be given
`
`their broadest reasonable interpretation, but that interpretation must be consistent
`
`with the patent specification.
`
`47.
`
`I understand that claim terms are given their plain and ordinary
`
`meaning as would be understood by a person of ordinary skill in the art, unless the
`
`inventor provides a special meaning for a term.
`
`48.
`
`I understand that if there are specific statements in the specification
`
`that define the invention, those statements are strong evidence of a definition for a
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`term.
`
`49. Additionally, I understand and have been instructed that, when a
`
`claim’s recitation is purely functional and does not include any definite structure
`
`for performing the function claimed, the term is a “means-plus-function” claim. It
`
`is my understanding that means-plus-function claims are construed using a two-
`
`step process: first, determination of the claimed function, and second, identification
`
`of the corresponding structure. If the term is understood by a POSA as referring to
`
`a particular structure, however, this two-step process is not followed.
`
`50.
`
`I understand and have been instructed that, where the claim uses the
`
`word “means,” there is a presumption that it is a means-plus-function claim term. I
`
`also understand and have been instructed that an applicant for a patent must
`
`disclose adequate structure in the specification to perform the recited function, and
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 13
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`that if adequate structure is not recited, the claim is indefinite. I am further
`
`instructed that when the corresponding structure is a general purpose computer or
`
`microprocessor, the specification must disclose the algorithm or process to be
`
`performed by the general purpose computer or microprocessor, or the claim is
`
`indefinite.
`
`51.
`
`In this Declaration, I have used the broadest reasonable interpretation
`
`(“BRI”) standard when interpreting the claim terms.
`
`52.
`
`I reserve my right to amend or alter my analysis and opinions in view
`
`of the Patent Owner’s proposed claim constructions, if any.
`
`D. My Understanding of Written Description Support
`53.
`
`I have been instructed by counsel on the law regarding written
`
`description support.
`
`54. Petitioner bears the burden of showing that all statutory thresholds
`
`have been met. To satisfy the written description requirement, the specification
`
`must describe the claimed invention in sufficient detail that one skilled in the art
`
`can reasonably conclude that the inventor “had possession of the claimed
`
`invention.” Specifically, the specification must describe the claimed invention in a
`
`manner understandable to a person of ordinary skill in the art and show that the
`
`inventor actually invented the claimed invention. The function of the written
`
`description requirement is to ensure that the inventor had possession of, as of the
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 14
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`filing date of the application relied on, the specific subject matter later claimed by
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`him or her; how the specification accomplishes this is not material.
`
`IV. THE ’072 PROVISIONAL APPLICATION ENABLES AND
`PROVIDES WRITTEN DESCRIPTION FOR ALL LIMITATIONS
`THE CHALLENGED CLAIMS
`A.
`
`“Creating headers for the segments, by the interface device, from
`[the/a] template header,” and “prepending the headers to the
`segments”
`
`55.
`
`I agree with Petitioner’s expert’s opinion in IPR2017-01713 that a
`
`POSA would have understood that the TCP/IP packet creation process entails
`
`prepending headers to data segments. Given this understanding, the ’072
`
`Provisional clearly provides written description for “prepending the headers to the
`
`segments”. As admitted by Petitioner, the ’241 Provisional, which the same
`
`provisional application of the ’072 patent, “describes the INIC transferring ‘basic
`
`frame header’ with a pseudo-header checksum into a frame, then appending the
`
`data to the header (i.e., adding the data to the back of the header), and finally
`
`placing the checksum into the TCP header after appending the data.” (IPR2017-
`
`01713 Petition at 36.) This is the precisely the operation described by the claimed
`
`“prepending” because the data is placed after the header (and hence as a result the
`
`header is “prepended” to the data). The ’072 Provisional further explains that:
`
`[a] large buffer is acquired from the free buffer fifo, and the MAC and
`
`TCP/IP headers are created in it. It may be quicker/simpler to keep a
`
`basic frame header set up in the TCB and either dma directly this into
`Alacritech Exhibit 2001, Page 15
`06973-00001/9637842.1
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`the frame each time. Then data is dmad from host memory into the
`
`frame to create an MSS-sized segment. This dma also checksums the
`
`data. Then the checksum is adjusted for the pseudo-header and placed
`
`into the TCP header, and the frame is queued to the MAC transmit
`
`interface…. (Ex. 1031, ’072 Provisional Application at .061)
`
`56. This paragraph describes placing the data after the header (via a direct
`
`memory access or DMA) so that the header is prepended to the data segment. This
`
`is precisely what is required by the claim language, and the ‘072 Provisional thus
`
`fully supports and enables these claims. (Id.)
`
`57. To be sure, in connection with the “prepending” term, the Court in the
`
`district court proceeding explained “[i]ndeed, given the context of packetized data,
`
`the Court discerns no meaningful distinction between adding a header to the front
`
`of the data and adding data to the rear of the header. The header and data are
`
`simply combined with the header in front of the data (i.e., prepended) and,
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`therefore, the data to the rear of the header.” (Ex. 2005 at 35.) The Court’s
`
`conclusion supports Alacritech’s position that prepending the header to the data
`
`segment is the same as appending the data segment to the header. Both operations
`
`result in the claimed “prepending.” A POSA would therefore reasonably conclude
`
`that the inventor had possession of the claimed invention.
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 16
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`Protocols other than TCP/IP
`
`B.
`58. The diagram below shows the Receive Buffer Format disclosed in the
`
`’072 Provisional. Ex. 1031.123. Bits 04 and 05 in the frame specifically provide a
`
`UDP choice (11), and reserves for other protocols (01). Id. Bit 30 also indicates
`
`that the receiver can receive either a TCP header or a UDP header ("Set when any
`
`of the error bits of ErrStatus are set or if frame processing stops while receiving a
`
`Tcp or Udp header."). Id.
`
`
`59. The first paragraph of section 2.1.1 of the ’072 Provisional states that:
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`06973-00001/9637842.1
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`Alacritech Exhibit 2001, Page 17
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`In this section we introduce the notion of a "context". A context
`
`is required to keep track of information that spans many,
`
`possibly discontiguous, pieces of information. When processing
`
`TCP/IP data, there are actually two contexts that must be
`
`maintained. The first context is required to reassemble IP
`
`fragments. It holds information about the status of the IP
`
`reassembly as well as any checksum information being
`
`calculated across the IP datagram (UDP or TCP). Exhibit
`
`1031.008.
`
`60.
`
`In other words, when the Provisional Application introduces a key
`
`concept of the invention, the "context," it intends to cover both the UDP protocol
`
`and the TCP protocol.
`
`61. As the Petition notes, the Provisional Application describes handling
`
`fragmented UDP (or TCP) as a difficult task. But as I just explained, the
`
`Provisional Application also expressly describes, in writing, handling fragmented
`
`UDP. Specifically, Bit 20 of the Receive Buffer Format discussed above expressly
`
`discloses the situation where the frame processor detected a Frag IP datagram. Ex.
`
`1031.123. A POSA would have no trouble reconciling a patent applicant’s
`
`statement that a problem is difficult with the same applicant’s written disclosure
`
`that he solved the problem. Indeed, a POSA might well expect to see many
`
`06973-00001/9637842.1
`
`
`Alacritech Exhibit 2001, Page 18
`
`

`

`
`
`technical issues identified as difficult, yet nonetheless resolved in writing, in a
`
`patent application.
`
`62. Based on the aforementioned written disclosures in the Provisional
`
`Application, including detailed description of numerous protocols that worked in
`
`connection with the invention at the time the Provisional Application was filed, a
`
`POSA would understand that the inventors of the challenged ‘072 patent claims
`
`possessed the claimed invention, including for protocols other than TCP/IP, as of
`
`October 14, 1997.
`
`
`
`
`
`Executed: October 23, 2017
`
`
`
`
`
`Paul Prucnal, Ph.D.
`
`06973-00001/9637842.1
`
`
`Alacritech Exhibit 2001, Page 19
`
`

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