`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
` ____________
`BMW OF NORTH AMERICA, LLC,
`
`Petitioner
`
`v.
`
`STRAGENT, LLC
`
`Patent Owner
`
`____________
`
`Case No. IPR2017-01521
`Case No. IPR2017-01522
`
`U.S. Patent No. 8,209,705
`
`Title: SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR
`SHARING INFORMATION IN A DISTRIBUTED FRAMEWORK
` ____________
`
`
`DECLARATION OF VIJAY K. MADISETTI, PH.D.
`
`
`
`
`
`
`
`
`BMW EXHIBIT 1003
`
`PAGE 1 OF 159
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`

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`TABLE OF CONTENTS
`
`BACKGROUND AND EDUCATION ........................................................... 1
`I.
`ASSIGNMENT AND MATERIALS REVIEWED ...................................... 12
`II.
`III. OVERVIEW OF THE ’705 PATENT .......................................................... 14
`A.
`The ’263 Prosecution History .............................................................17
`B.
`The ’705 Prosecution History .............................................................18
`C.
`Claim numbering key ..........................................................................19
`IV. STATEMENT OF LEGAL PRINCIPLES .................................................... 21
`A. Anticipation .........................................................................................21
`B.
`Obviousness .........................................................................................21
`C.
`Claim Construction..............................................................................26
`1.
`“real-time” (claims 7 and 17) ................................................... 27
`2.
`“isolated from temporal characteristics” (claim 10) ................ 27
`3.
`“heterogeneous networks” (claim 10) ...................................... 28
`4.
`“diagnostic mode” (claim 18) .................................................. 29
`D.
`Priority Date ........................................................................................29
`E.
`Printed Publications .............................................................................30
`V. OPINIONS ..................................................................................................... 30
`A.
`Level of a Person Having Ordinary Skill in the Art ...........................30
`B.
`the Relevant Time ...............................................................................31
`C.
`Description of the Prior Art .................................................................36
`1.
`Staiger ...................................................................................... 36
`
`Background: Automotive ECU and Networking Technology at
`
`i
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`PAGE 2 OF 159
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`

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`E.
`
`F.
`
`OSEK/VDX ............................................................................. 38
`2.
`3. Millsap ..................................................................................... 42
`4. Wong ........................................................................................ 43
`D. Ground 1: Staiger Anticipates or otherwise Renders Obvious
`Claims 7-19 .........................................................................................44
`1.
`Independent Claim 7 ................................................................ 45
`2.
`Dependent Claims 8-19 ............................................................ 62
`Claims 7-19 Obvious ...........................................................................75
`1.
`Independent Claim 7 ................................................................ 75
`2.
`Dependent Claims 8-19 ............................................................ 86
`Claims Obvious 7-14 and 16-19..........................................................86
`1.
`Independent Claim 7 ................................................................ 87
`2.
`Dependent Claims 8-14 and 16-19 ........................................ 109
`G. Ground 4: OSEK/VDX Renders Claims 7-14 and 16-19
`Obvious..............................................................................................120
`H. Ground 5: OSEK/VDX in View of Millsap and Wong Renders
`Claims 7-14 and 16-19 Obvious........................................................121
`1.
`Independent Claim 7 .............................................................. 121
`2.
`Dependent Claims 8-14 and 16-19 ........................................ 127
`VI. CONCLUSION ........................................................................................... 128
`
`Ground 2: Staiger in View of Millsap and Wong Renders
`
`Ground 3: OSEK/VDX Anticipates or otherwise Renders
`
`
`
`
`
`ii
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`PAGE 3 OF 159
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`I, Vijay K. Madisetti, Ph.D., hereby declare and state as follows:
`
`I. BACKGROUND AND EDUCATION
`I am a tenured Professor in Electrical and Computer Engineering at
`1.
`
`the Georgia Institute of Technology ("Georgia Tech"). I have worked within the
`
`area of embedded computing systems, wireless communications, and digital signal
`
`processing for over twenty-five years, and have authored, co-authored, or edited
`
`several books and numerous peer-reviewed technical papers in these areas.
`
`2.
`
`I received my B. Tech (Hons) in ECE from the Indian Institute of
`
`Technology (IIT), Kharagpur, India in 1984. I obtained my Ph.D. in Electrical
`
`Engineering and Computer Science at the University of California, Berkeley, in
`
`1989. I received the Demetri Angelakos Outstanding Graduate Student Award
`
`from the University of California, Berkeley and the IEEE/ACM Ira M. Kay
`
`Memorial Paper Prize in 1989.
`
`3.
`
`I joined Georgia Tech in Fall of 1989 and am now a tenured Professor
`
`in Electrical and Computer Engineering. I have been active in the areas of
`
`computer systems, embedded systems, multimedia (audio, video, speech, wireless,
`
`etc.), wireless communications, digital signal processing, integrated circuit design
`
`(analog & digital), software engineering, system-level design methodologies and
`
`tools, and software systems. I have been the principal investigator ("PI") or co-PI
`
`in several active research programs in these areas, including DARPA's Rapid
`
`1
`
`PAGE 4 OF 159
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`Prototyping of Application Specific Signal Processors, the State of Georgia's
`
`Yamacraw Initiative, the United States Army's Federated Sensors Laboratory
`
`Program, and the United States Air Force Electronics Parts Obsolescence
`
`Initiative. I have received an IBM Faculty Award and NSF's Research Initiation
`
`Award. I have been awarded the 2006 Frederick Emmons Terman Medal by the
`
`American Society of Engineering Education for contributions to Electrical
`
`Engineering, including authoring a widely used textbook in the design of VLSI
`
`digital signal processors.
`
`4.
`
`I have created and taught undergraduate and graduate courses in
`
`hardware and software design for computer systems, control systems, signal
`
`processing and wireless communication circuits at Georgia Tech for the past
`
`twenty years.
`
`5.
`
`I have been an active consultant to the electronics and automation
`
`industries and various research laboratories (including Massachusetts Institute of
`
`Technology Lincoln Labs and Johns Hopkins University Applied Physics
`
`Laboratory ("APL")). I have founded three companies in the areas of embedded
`
`avionics and wireless software, military chipsets involving imaging technology and
`
`guidance technologies, and wireless communications. I have supervised the Ph.D.
`
`dissertations of over twenty engineers in the areas of computer engineering, signal
`
`2
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`processing, communications,
`
`rapid prototyping, and system-level design
`
`methodology, of which five have resulted in thesis prizes or paper awards.
`
`6. My consulting work for MIT Lincoln Labs involved high resolution
`
`imaging for defense avionics applications, where I worked in the area of
`
`prototyping complex and specialized computing systems. My consulting work for
`
`the APL mainly involved localization of objects in image fields, where I worked
`
`on identifying targets in video and other sensor fields and identifying avionics
`
`computer architectures and circuits for power and space-efficient designs.
`
`7.
`
`I have developed wireless baseband and protocol stack software and
`
`assembly code for a leading telecommunications handset vendor that focused on
`
`efficient realization of speech codecs and echo-cancellation. My work in this
`
`regard included creation of software code, and analysis and revision of existing
`
`software code. This work spanned approximately three years of industry work
`
`between 2000 and 2004.
`
`8.
`
` The first of the companies I founded, VP Technologies, offers
`
`products in the area of semiconductor integrated circuits, including building
`
`computing systems for imaging systems in United States Air Force helicopters. I
`
`remain a director of VP Technologies. The second of these companies, Soft
`
`Networks, LLC, offers software for multimedia and wireless computing platforms,
`
`including the development of a set-top box for Intel that decodes MPEG-2 video
`
`3
`
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`streams and imaging codes for multimedia phones. The technology involved with
`
`the design, development, and implementation of the Intel set-top box included
`
`parsing the bit streams, decoding communications protocols, extracting image and
`
`video data, and then processing for subsequent display or storage. The third of
`
`these companies, Elastic Video, uses region of interest based video encoding or
`
`decoding for capturing high quality video at very low bit rates, with primary
`
`application for wireless video systems.
`
`9.
`
`I have been elected a Fellow of the IEEE, for contributions to
`
`embedded computing systems. The Fellow is the highest grade of membership of
`
`the IEEE, a world professional body consisting of over 300,000 electrical and
`
`electronics engineers, with only one-tenth of one percent (0.1%) of the IEEE
`
`membership being elected to the Fellow grade each year. Election to Fellow is
`
`based upon votes cast by existing Fellows in IEEE.
`
`10.
`
`I have authored or co-authored several books, including VLSI Digital
`
`Signal Processors (IEEE Press 1995) and the Digital Signal Processing Handbook
`
`(CRC Press, 1998). I am also Editor of the three-volume DSP Handbook set:
`
`Volume 1: Digital Signal Processing Fundamentals, Volume 2: Video, Speech,
`
`and Audio Signal Processing and Associated Standards, and Volume 3: Wireless,
`
`Networking, Radar, Sensory Array Processing, and Nonlinear Signal Processing,
`
`4
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`

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`published in 2010 by CRC Press, Boca Raton, Florida. I have also authored papers
`
`on control circuits related to control of electrical motors and generators.
`
`11.
`
`I have designed several specialized computer and communication
`
`systems over the past two decades at Georgia Tech for tasks such as wireless audio
`
`and video processing and protocol processing for portable platforms, such as cell
`
`phones and PDAs. I have worked on designing systems that are efficient from
`
`performance, size, weight, area, and thermal considerations. I have developed
`
`courses and classes for the industry on these topics, and many of my lectures in
`
`advanced computer system design, developed under the sponsorship of the United
`
`States Department of Defense in the late 1990s, are available for educational use at
`
`"http://www.eda.org/rassp" and have been used by several U.S. and international
`
`universities as part of their course work. Some of my recent publications in the
`
`area of design of wireless communications systems and associated protocols are
`
`listed in Appendix A, my CV.
`
`12.
`
`I am knowledgeable and familiar with standards related to the
`
`automotive, avionics, wireless and telecommunications systems industries, and as
`
`shown in Appendix A, some of my papers describe the application of these
`
`standards in optimizing the design and testing of these systems. I am also
`
`knowledgeable and familiar with microprocessor architecture and associated
`
`5
`
`PAGE 8 OF 159
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`

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`software and firmware design for embedded, wireless and telecommunications
`
`terminals and base stations.
`
`13.
`
`I have authored, co-authored, or edited several books in the area of
`
`computer systems and distributed systems in the past twenty years, including:
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`14.
`
`VLSI Digital Signal Processors, Madisetti, V.K.
`
`Quick-Turnaround ASIC Design in VHDL, Romdhane, M., Madisetti,
`V.K., Hines, J.
`
`The Digital Signal Processing Handbook (First Edition), Madisetti, V.
`K., Williams, D. (Editors)
`
`VHDL: Electronics Systems Design Methodologies, Madisetti, V. K.
`(Editor)
`
`to System-on-Chip
`Platform-Centric Approach
`Madisetti, V. K., Arpnikanondt, A.
`
`(SoC) Design,
`
`The Digital Signal Processing Handbook – Second Edition.,
`Madisetti, V. K. (2009/2010)
`
`Cloud Computing: A Hands-On Approach, A Bahga, V. Madisetti
`(2013)
`
`Internet of Things: A Hands-On Approach, A Bahga, V. Madisetti
`(2014)
`In the past decade I have also authored several peer-reviewed papers
`
`in the area of computers, computer software applications, and software design, and
`
`these include:
`
`•
`
`V. Madisetti, et al: “The Georgia tech Digital Signal Multiprocessor,
`IEEE Transactions on Signal Processing, Vol 41, No. 7, July 1993
`
`6
`
`PAGE 9 OF 159
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`

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`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`V. Madisetti et al, “Rapid Prototyping on the Georgia Tech Digital
`Signal Multiprocessor”, IEEE Transactions on Signal Processing, Vol
`42, March 1994
`
`V. Madisetti, “Reengineering legacy embedded systems”, IEEE
`Design & Test of Computers, Vol 16, Vol 2, 1999
`
`V. Madisetti et al, “Virtual Prototyping of Embedded Microcontroller-
`based DSP Systems”, IEEE Micro, Vol 15, Issue 5, 1995
`
`V. Madisetti, et al, “Incorporating Cost Modeling in Embedded-
`System Design”, IEEE Design & Test of Computers, Vol 14, Issue 3,
`1997
`
`V. Madisetti, et al, “Conceptual Prototyping of Scalable Embedded
`DSP Systems”, IEEE Design & Test of Computers, Vol 13, Issue 3,
`1996
`
`V. Madisetti, Electronic System, Platform & Package Codesign,”
`IEEE Design & Test of Computers, Vol 23, Issue 3, June 2006
`
`•
`
`V. Madisetti, et al, “A Dynamic Resource Management and
`Scheduling Environment
`for Embedded Multimedia
`and
`Communications Platforms”, IEEE Embedded Systems Letters, Vol 3,
`Issue 1, 2011
`15. Some of my recent work in the automotive area includes predicting
`
`travel times of cars on freeways for use in mass transportation, and analysis of
`
`travel and logistical data in real-time intelligent transportation networks.
`
`Representative publications include “Configuration for Predicting Travel-Time
`
`Using Wavelet Packets and Support Vector Regression”, Journal of Transportation
`
`Technologies, vol 3, issue 3, 2013, and “Cloud-Based Information Technology
`
`Framework for Data-Driven Intelligent Transportation Systems,” Journal of
`
`7
`
`PAGE 10 OF 159
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`

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`Transportation Technologies, vol 3, no 2, April 2013. I am also a member of SAE
`
`(Society of Automotive Engineers).
`
`16.
`
`In the late 2000s, I collaborated with a leading automotive supplier to
`
`design and development embedded software and electronic control unit (“ECU”)
`
`controller modules in the area of energy profiling for hybrid/gas cars (described in
`
`U.S. Provisional Patent App. No. 61/209,403). The system we developed is
`
`described in more detail in the figures below:
`
`
`
`
`
`8
`
`PAGE 11 OF 159
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`
`
`17.
`
`I have designed and implemented multiple processor computing
`
`systems that perform multimedia tasks (e.g., speech and audio recognition) and
`
`also avionics/embedded guidance systems since the mid-1990s, and I have also
`
`implemented real-time operating systems in the same time frame. Representative
`
`publications of my work in these areas include, The Georgia Tech Digital Signal
`
`Multiprocessor (DSMP), IEEE Transactions on Signal Processing, Vol 41, Issue
`
`7, 1993, and “Task Scheduling on
`
`the Georgia Tech Digital Signal
`
`Multiprocessor”, Proc. IEEE ICASSP 1992. More recent work that is related to
`
`multimedia processing on multiprocessor systems can be found in “A Dynamic
`
`Resource Management and Scheduling Environment for Embedded Multimedia
`
`and Communications Platforms”, IEEE Embedded Systems Letters, Vol 3, Issue 1,
`
`2011. Three generations of Digital Signal Multiprocessors (DSMP’s) (listed in the
`
`9
`
`PAGE 12 OF 159
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`

`

`table below) were designed at Georgia Tech as part of my research and education
`
`efforts.
`
`
`
`
`
`18.
`
`In collaboration with the US Air Force, Lockheed Martin, and Hughes
`
`Corporation, I designed and implemented a 192-processor multiprocessor system
`
`for processing real-time avionics data (infrared search and track applications –
`
`IRST), and this represented one of the largest multiprocessor systems used in the
`
`mid-1990s timeframe on aircraft. See my publications, “Virtual Prototyping of
`
`Embedded Microcontroller-Based DSP Systems”, IEEE Micro, 1995, and also
`
`10
`
`PAGE 13 OF 159
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`

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`“VHDL Token-Based Performance Modeling for 2D and 3D Infrared Search and
`
`Track”, Proc. SPIE VIUF, 1998.
`
`
`
`19.
`
`I have been active
`
`in
`
`the area of wireless OFDM-MIMO
`
`communications systems for several years, and some of my publications in this
`
`area include “Frequency Dependent Space-Interleaving of MIMO OFDM Systems”
`
`Proc. IEEE Radio and Wireless Conference (RAWCON ’03), 2003,’ “Embedded
`
`Alamouti Space Time Codes for High Rate and Low Decoding Complexity”, Proc.
`
`Of
`
`IEEE Asilomar Conf.
`
`on Signals, Systems
`
`and Computers,
`
`2008; and “Asymmetric Golden Codes for Fast Decoding in Time Varying
`
`Channels”, Wireless Personal Communications (2011).
`
`20. Additional representative peer-reviewed publications in this area of
`
`wireless embedded systems are the following: (i) Turkboylari, M. and Madisetti,
`
`V.K., “Effect of Handoff Delay on System Performance of TDMA Cellular
`
`Systems,” 4th International Workshop, Mobile & Wireless Communication
`
`11
`
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`

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`Network, pp. 411-415, 2002;
`
`(ii)
`
`Jatunov, L. and Madisetti, V.K.,
`
`“Computationally-Efficient SNR Estimation for Bandlimited Wideband CDMA
`
`Systems,” IEEE Transactions on Wireless Communications, Issue 12, pp. 3480-
`
`3491, December 2006, and (iii) N. Radia, Y. Zhang, M. Tatipamula, V. Madisetti,
`
`“Next Generation Applications on Cellular Networks: Trends, Challenges, and
`
`Solutions,” Proceedings on IEEE, vol. 100, Issue 4, pp. 841-854, April 2012. I
`
`have significant experience analyzing, designing, and testing systems based on
`
`3GPP Technical Specifications, including specifications describing WCDMA and
`
`HSDPA technologies.
`
`21. Based on the above education and experience, I believe that I have a
`
`detailed understanding of the state of the art during the relevant period, as well as a
`
`sound basis for opining how persons of skill in the art at that time would
`
`understand the technical issues in this case.
`
`22. A copy of my curriculum vitae is attached hereto as Appendix A.
`
`II. ASSIGNMENT AND MATERIALS REVIEWED
`I submit this declaration to offer my independent expert opinion in
`23.
`
`support of this petition for inter partes review (“Petition”) of U.S. Patent No.
`
`8,209,705 (“the ’705 patent”) submitted by BMW of North America, LLC
`
`(“BMW” or “Petitioner”).
`
`12
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`24.
`
`I am not an employee of BMW or of any affiliate or subsidiary
`
`thereof.
`
`25.
`
`I am being compensated for my time at my customary rate of $500 per
`
`hour. My compensation is not based on the substance of the opinions rendered
`
`here, or upon the outcome of BMW’s petitions for Inter Partes review (or the
`
`outcome of the Inter Partes reviews, if trials are instituted).
`
`26.
`
`I have been asked to provide certain opinions relating to the
`
`patentability of the ’705 patent. Specifically, I have been asked to provide my
`
`opinions regarding (1) the level of ordinary skill in the art to which the ’705 patent
`
`pertains, and (2) whether claims 1-6 and 20 of the ’705 patent (the “Challenged
`
`Claims”) are anticipated by or would have been obvious in view of the prior art.
`
`27. As part of my work in connection with this matter, I have studied the
`
`’705 patent, including the respective written descriptions, figures, and claims.
`
`28.
`
`In forming my opinions, I have reviewed the ’705 patent [Exhibit
`
`1001] and its prosecution history [Exhibits 1002, 1005, 1011], as well as prior art
`
`to the ’705 patent, including:
`
`U.S. Patent Application Publication No. 2002/0073243 to Staiger
`(“Staiger”) [Exhibit 1004];
`
`OSEK/VDX Binding Specification, Version 1.3 (Sept. 17, 2001)
`(“OSEK Binding”) [Exhibit 1007];
`
`•
`
`
`
` •
`
`13
`
`PAGE 16 OF 159
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`

`•
`
`•
`
`•
`
`2.2.2
`
`1.0
`
`Specification, Version
`Communication
`OSEK/VDX
`(Dec. 18, 2000) (“OSEK COM”) [Exhibit 1008];
`OSEK/VDX Network Management Concept and Application
`Programming Interface, Version 2.51 (May 31, 2000) (“OSEK NM”)
`[Exhibit 1009];
`Communication, Version
`Fault-Tolerant
`OSEK/VDX
`(July 24, 2001) (“OSEK FTCom”) [Exhibit 1010];
`• William Wong, Software And Hardware Standards Help, But In-
`Vehicle Network Growth Will Be Conservative: CAN networks and
`OSEK/VDX compatible operating systems will drive tomorrow’s
`vehicles,
`Electronic Design,
`vol.
`49,
`issue
`1,
`62
`(Jan. 8, 2001) (“Wong”) [Exhibit 1012]; and
`U.S. Patent No. 6,484,082 to Millsap (“Millsap”) [Exhibit 1015]
`•
`29. This report is based on my review of the documents cited in this
`
`report, the challenged patent and its file history, and my personal knowledge.
`
`III. OVERVIEW OF THE ’705 PATENT
`30. This overview is not meant to describe my full understanding of the
`
`’705 patent, but is only used to generally describe the functionalities of the ’705
`
`patent.
`
`31.
`
`I have been informed that the priority date of the ’705 patent is
`
`December 15, 2003, the filing date of its parent U.S. Patent No. 7,802,263 (“the
`
`’263 patent”). I also have been informed that the ’705 patent claims priority to
`
`Provisional Application No. 60/434,018, filed on December 17, 2002.
`
`14
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`32.
`
`I have reviewed the ’705 patent, including the specification, claims,
`
`and prosecution history. The ’705 patent discloses a system and method for
`
`sharing information in a distributed system. Ex. 1001, Abstract. It describes
`
`sharing information with processes associated with different networks, such as a
`
`Controller Area Network (“CAN”), Local Interconnect Network (“LIN”), and
`
`FlexRay in “vehicle communication and control systems, real-time monitoring
`
`systems, industrial automation and control systems, as well as any other desired
`
`system.” Id., 1:22-25, 3:24-33.
`
`33. The ’705 patent explains that an ECU in “an automotive environment
`
`. . . control[s] complex applications such as engine control, brake control, or
`
`diagnostics.” Id., 3:13-16. It explains that multiple ECUs performing these
`
`applications may be connected by multiplexing bus-systems corresponding to
`
`different networks. Id., 3:26-33. According to the ’705 patent, an ECU has
`
`software for interfacing with the ECU’s input/output mechanisms and storing
`
`information within the ECU. Id., 4:45-5:9. The ’705 patent further describes
`
`arbitrated access to “a common, or shared storage system that is connected to all of
`
`the system networks through network interfaces” within the ECU. Id., 7:30-32,
`
`8:13-31.
`
`34. FIG. 7 of the ’705 patent (below) shows a bulletin board (i.e., “storage
`
`resource”) interacting with multiple communication busses. As shown, data
`
`15
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`received from one communication bus is stored on the bulletin board and then
`
`output or “shared” as a new message with other network types. Id., 7:4-37.
`
`
`
`35. The claims specifically describe an “electronic control unit” with a
`
`gateway function and two interface portions. Id., claim 1; see also, id.,
`
`FIG. 1:block 105, 5:45-47. The ’705 patent states that an ECU in “an automotive
`
`environment . . . control[s] complex applications such as engine control, brake
`
`control, or diagnostics.” Id., 3:13-16. It explains that multiple ECUs performing
`
`these applications may be connected by multiplexing bus-systems corresponding to
`
`different networks. Id., 3:26-33. An ECU receives and shares information from
`
`the different busses through one or more gateways, which link together the busses
`
`from each network. Id., 3:39-56, FIG. 3. The claims further state that the ECU
`
`16
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`interface with at least two networks, specifically, either CAN, FlexRay, or LIN.
`
`Id., claim 1.
`
`36. The concept of using a gateway to transfer data from one network to
`
`another was well known in the art before December 17, 2002. See, e.g., Ex. 1005,
`
`2 (“[T]he industry has defined several types of gateways or bridges.”); Ex. 1001,
`
`1:8-13.
`
`
`
`A. The ’263 Prosecution History
`37. The ’263 patent was filed on December 15, 2003, with claims
`
`requiring only software that received information, stored it on a bulletin board, and
`
`shared it in real-time among a plurality of heterogeneous processes. Ex. 1011,
`
`649-53. Concurrently with an amendment to the claims, the applicants stated that
`
`the prior art disclosed the “bulletin board” shared memory, noting that the prior art
`
`disclosed “‘a bulletin board system (BBS) for allowing users to post and review
`
`messages,’ . . . ‘replicat[ing] update transactions across all servers,’ . . . and
`
`‘dispatch[ing] each update transaction to every server,’” among other things. Id.,
`
`583 (alterations in original) (citations omitted).
`
`38. Later, the applicants further amended the claims, adding, for example,
`
`the following limitation to claim 1: “converting the information on the bulletin
`
`board in real-time into a plurality of message formats corresponding to different
`
`17
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`network protocols which are different from the first network protocol.” Id., 529.
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`Despite these amendments, the claims were rejected again. Id., 474-87.
`
`39. After an interview, the Examiner agreed to allow the claims only after
`
`adding some specific memory-related limitations, including: (1) “requesting a
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`bulletin board resource of one or more bulletin boards”; (2) “determining whether
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`the bulletin board resource is available”; (3) “in the event the bulletin board
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`resource is not available, re-requesting the bulletin board resource until a threshold
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`has been reached”; and (4) storing the information on the bulletin board resource
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`“in the event the bulletin board resource is available.” Id., 251-52.
`
`B. The ’705 Prosecution History
`40. The ’705 patent was filed on July 30, 2008, with claims that were
`
`similar to the original ’263 claims, particularly in that they lacked the memory-
`
`related limitations ultimately added to the ’263 claims, as discussed above. Ex.
`
`1002, 255-57. During prosecution, and as with the ’263 patent, the applicants
`
`authorized the Examiner to add memory-related limitations similar to those in the
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`claims of the ’263 patent. Id., 83, 127-30. The Examiner thus added the following
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`to claim 1:
`
`in the event the storage resource is not available, determining whether
`
`a timeout has been reached and causing a re-request in
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`connection with the storage resource if the timeout has not been
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`reached; [and]
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`in the event the timeout has been reached, causing an error
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`notification to be sent.
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`Id., 84-85. These features were well known and disclosed in prior art documents,
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`such as Staiger and OSEK/VDX, discussed in detail below.
`
`41.
`
`I understand that the Staiger (Ex. 1004) and OSEK/VDX (exs. 1007-
`
`1010) references on which I rely in rendering my opinions were cited during the
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`prosecution of the ’705 patent. Ex. 1002, 112-14. The record indicates that the
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`Examiner formally considered these references on May 30, 2012, over a month
`
`after the Examiner allowed the claims. Id., 16-18. I also understand that Staiger
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`and OSEK/VDX were not the subject of any substantive rejections during the
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`prosecution of the ’705 patent. I do not, however, express any opinion on the
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`timing of and consideration by the Examiner of Staiger or OSEK/VDX.
`
`C. Claim numbering key
`42. The table below includes a listing of the claims of the ’705 patent I
`
`have analyzed in view of the prior art for the purposes of this Petition. I have
`
`broken each claim down into separate limitations as follows:
`
`Claim Limitations
`[7.0] A non-transitory computer-readable medium storing a computer
`program product for sharing information, the computer program product
`comprising:
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`[7.1] computer code for allowing receipt of information associated with a
`message, utilizing a first network protocol associated with a first network;
`[7.2] computer code for causing a determination as to whether a storage
`resource is available;
`[7.3] computer code for, in the event the storage resource is not available,
`determining whether a timeout has been reached and causing a re-request in
`connection with the storage resource;
`[7.4] computer code for, in the event the storage resource is available and
`the timeout has not been reached, causing storage of the information
`utilizing the storage resource;
`[7.5] computer code for, in the event the timeout has been reached, causing
`an error notification to be sent;
`[7.6] computer code for causing the information to be shared by:
`[7.7] in real-time, sharing the information utilizing at least one message
`format corresponding to a second network protocol associated with a second
`network which is different from the first network protocol;
`[7.8] wherein the computer program product is associated with an electronic
`control unit with at least one gateway function, and a plurality of interface
`portions including:
`[7.9] a first interface portion for interfacing with the first network, the first
`interface portion including
`
` a
`
` first interface-related first layer part for receiving first interface-related
`first layer messages and
`
` a
`
` second interface-related second layer part,
`
`20
`
` first interface-related second layer part,
`
`
`the first interface-related first layer messages being processed after which
`first interface-related second layer messages are provided,
`
`where the first network is at least one of a Controller Area Network, a
`Flexray network, or a Local Interconnect Network; and
`[7.10] a second interface portion for interfacing with the second network,
`the second interface portion including
`
` second interface-related first layer part for receiving second interface-
`related first layer messages and
`
` a
`
` a
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`the second interface-related first layer messages being processed after which
`second interface-related second layer messages are provided,
`
`where the second network is different from the first network and is at least
`one of the Controller Area Network, the Flexray network, or the Local
`Interconnect Network.
`
`
`IV. STATEMENT OF LEGAL PRINCIPLES
`I am a technical expert, and I do not offer any legal opinions. But
`43.
`
`from my discussions with counsel, I have been informed of the framework applied
`
`for determining patentability and related matters. I applied this framework in
`
`developing my technical opinions expressed in this declaration.
`
`A. Anticipation
`I have been informed by counsel and understand that a patent claim is
`44.
`
`invalid on the basis of anticipation (under 35 U.S.C. § 102) if a single prior art
`
`reference discloses, either expressly or inherently, each limitation of the patent
`
`claim. I have been informed that a limitation is said to be inherently disclosed if
`
`one of ordinary skill in the art would read the reference and understand that the
`
`limitation is necessarily present in the reference.
`
`B. Obviousness
`I further have been informed and understand that a patent claim is not
`45.
`
`patentable under 35 U.S.C. § 103 if the differences between the patent claim and
`
`the prior art are such that the claimed subject matter as a whole would have been
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`obvious at the time the claimed invention was made to a person having ordinary
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`skill in the art to which the subject matter pertains. Obviousness, as I have been
`
`informed, is based on the scope and content of the prior art, the differences
`
`between the prior art and the claim, the level of ordinary skill in the art, and, to the
`
`extent that they exist and have an appropriate nexus to the claimed invention
`
`(as opposed to prior art features), secondary indicia of non–obviousness.
`
`46.
`
`I have been informed that whether there are any relevant differences
`
`between the prio