`U.S. Patent No. 8,805,948
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
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`
`INTEL CORPORATION
`Petitioner
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`v.
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`ALACRITECH, INC.
`Patent Owner
`
`________________________
`
`Case IPR. No. IPR2017-01395
`U.S. Patent No. 8,805,948
`________________________
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`PATENT OWNER’S FIRST UPDATED EXHIBIT LIST
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`Exhibit #
`Ex.1001
`Ex.1002
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`Ex.1003
`Ex.1004
`Ex.1005
`Ex.1006
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`Ex.1007
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`Ex.1008
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`Ex.1009
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`Ex.1010
`Ex.1011
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`Ex.1012
`Ex.1013
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`Ex.1014
`Ex.1015
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`Ex.1016
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`Ex.1017
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`Ex.1018
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`Case IPR2017-01395
`U.S. Patent No. 8,805,948
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`Description
`U.S. Patent No. 8,805,948 (“948 Patent”)
`Excerpts from Prosecution File History of U.S. Patent No.
`8,805,948 (“948 File History”)
`Declaration of Robert Horst
`Curriculum Vitae of Robert Horst
`U.S. Patent No. 5,768,618 (“Erickson”)
`Tanenbaum, Andrew S., Computer Networks, Prentice-Hall, Inc.,
`New Jersey (1996). (“Tanenbaum96”)
`Transmission Control Protocol, “Darpa Internet Protocol
`Specification”, RFC: 793, Sept. 1981. (“RFC 793”)
`Stevens, W. Richard, TCP/IP Illustrated Volume 1: The Protocols,
`Addison-Wesley (1994). (“Stevens1”)
`Lilinkamp, J., Mandell. R. and Padlipsky, M., “Proposed Host-
`Front End Protocol”, Network Working Group Request for
`Comments: 929, Dec. 1984. (“RFC 929”)
`Not Used
`Librarian Declaration of Rice Mayors regarding Andrew S.
`Tanenbaum, Computer Networks (3rd ed. 1996) (Ex.1006,
`“Tanenbaum96”)
`Not Used
`Stevens, W. Richard and Gary R. Wright, TCP/IP Illustrated
`Volume 2: The Implementation, Addison-Wesley (1995).
`(“Stevens2”)
`Not Used
`Thia, Y.H., Woodside, C.M., “A Reduced Operation Protocol
`Engine (ROPE) for a Multiple-Layer Bypass Architecture”,
`Protocols for High Speed Networks (Dordrecht), 1995. (“Thia and
`Woodside”)
`Biersack, E. W., Rütsche E., “Demultiplexing on the ATM
`Adapter: Experiments with Internet Protocols in
`User Space”, Journal on High Speed Networks, Vol. 5, No. 2,
`May 1996. (“Biersack”)
`Rütsche, E., Kaiserswerth, M ., “TCP/IP on the Parallel Protocol
`Engine”, Proceedings, IFIP Conference on High Performance
`Networking, Liege (Belgium), Dec. 1992. (“Rütsche92”)
`Rütsche, E., “The Architecture of a Gb/s Multimedia Protocol
`Adapter”, Computer Communication Review, 1993.
`(“Rütsche93”)
`
`
`
`
`
`
`
`Case IPR2017-01395
`U.S. Patent No. 8,805,948
`
`
`Description
`Padlipsky, M. A., “A Proposed Protocol for Connecting Host
`Computers to Arpa-Like Networks Via Directly-Connected Front
`End Processors”, Network Working Group RFC #647, Nov. 1974.
`(“RFC 647”)
`U.S. Patent No. 5,619,650 (“Bach”)
`U.S. Patent No. 5,915,124 (“Morris”)
`Cooper, E.C., et al., “Protocol Implementation on the Nectar
`Communication Processor”, School of Computer Science,
`Carnegie Mellon University, Sept. 1990. (“Cooper”)
`Kung, H.T., et al., “A Host Interface Architecture for High-Speed
`Networks”, School of Computer Science, Carnegie Mellon
`University and Network Systems Corporation. (“Kung”)
`Exhibit D to Declaration of Dr. Gregory L. Chesson in Support of
`Microsoft’s Opposition to Alacritech’s Motion for Preliminary
`Injunction: “Protocol Engine Handbook”, Protocol Engines
`Incorporated, Oct. 1990. (“Chesson”)
`Kanakia, H., Cheriton, D.R., “The VMP Network Adapter Board
`(NAB): High-Performance Network Communication for
`Multiprocessors”, Communications Architectures & Protocols,
`Stanford University, Aug. 1988. (“Kanakia”)
`Kung, H.T., Cooper, E.C., et al., “Network-Based
`Multicomputers: An Emerging Parallel Architectures”, School of
`Computer Science, Carnegie Mellon University. (“Kung and
`Cooper”)
`Dalton, C., et al., “Afterburner: Architectural Support for High-
`Performance Protocols”, Networks & Communications
`Laboratories, HP Laboratories Bristol, July 1993. (“Dalton”)
`Murphy, E., Hayes, S., Enders, M., TCP/IP Tutorial and
`Technical Overview Fifth Edition, Prentice-Hall, Inc. New Jersey,
`(1995). (“Murphy”)
`MacLean, A.R., Barvick, S. E., “An Outboard Processor for High
`Performance Implementation of Transport Layer Protocols”,
`IEEE Globecom ’91, Phoenix, AZ, Dec. 1991. (“MacLean”)
`Clark, D.D., et al., “An Analysis of TCP Processing Overhead”,
`IEEE Communications Magazine, June 1989. (“Clark”)
`Provisional Application 60-061,809 (“Alacritech 1997 Provisional
`Application”)
`Culler, E.C., et al., “Parallel Computing on the Berkeley NOW”,
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`Exhibit #
`Ex.1019
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`Ex.1020
`Ex.1021
`Ex.1022
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`Ex.1023
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`Ex.1024
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`Ex.1025
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`Ex.1026
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`Ex.1027
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`Ex.1028
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`Ex.1029
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`Ex.1030
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`Ex.1031
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`Ex.1032
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`2
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`Case IPR2017-01395
`U.S. Patent No. 8,805,948
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`Exhibit #
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`Ex.1033
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`Ex.1034
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`Ex.1035
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`Ex.1036
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`Description
`Computer Science Division, University of California, Berkeley.
`(“Culler”)
`“Gigabit Ethernet Technical Brief: Achieving End-to-End
`Performance”, Alteon Networks, Inc. First Edition, Sept. 1996.
`(“Alteon”)
`Smith, J.A., Primmer, M., “Tachyon: A Gigabit Fibre Channel
`Protocol Chip”, Hewlett-Packard Journal, Article 12, Oct. 1996.
`(“Smith”)
`Patterson, D.A., Hennessy, J.L., Computer Architecture: A
`Quantitative Approach, Morgan Kaufmann Publishers, Inc., San
`Mateo, CA (1990). (“Patterson”)
`Internet Protocol, “Darpa Internet Protocol Specification”, RFC:
`791, Sept. 1981. (“RFC 791”)
`Ex.1037
`Not Used
`Ex.1038 Woodside, C. M., K. Ravindran, and R. G. Franks. “The protocol
`bypass concept for high speed OSI data transfer.” IFIP Workshop
`on Protocols for High Speed Networks. 1990. (“Woodside”)
`Not Used
`
`Exs.1039-
`1062
`Ex.1063
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`Ex.1064
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`Ex.1065-
`Ex.1094
`Ex.1095
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`Ex.1096
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`Librarian Declaration of Pamela Stansbury regarding Gary R.
`Wright & W. Richard Stevens, TCP/IP Illustrated: The
`Implementation (1995) (Ex.1013, “Stevens2”).
`Librarian Declaration of Lisa Rowlison de Ortiz re Y.H. Thia &
`C.M. Woodside, A Reduced Operation Protocol Engine (ROPE)
`for a Multiple-layer Bypass Architecture (1995) (Ex.1015,
`“Thia”)
`Not Used
`
`FAQs: Publication Formats, Reprints, Editions, etc. from
`ISBN.org downloaded on 12/22/2017 at
`https://www.isbn.org/faqs_formats_reprints_editions
`1995 Copyright page from the 1995 Printing of Gary R.Wright &
`W. Richard Stevens, TCP/IP Illustrated: The Implementation
`(1995)
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`Dated: December 22, 2017
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`Case IPR2017-01395
`U.S. Patent No. 8,805,948
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`Respectfully submitted,
`
`
`/s/ Garland T. Stephens
`
` Garland T. Stephens, Reg. No. 37,242
` Weil, Gotshal & Manges LLP
`
`700 Louisiana, Suite 1700
` Houston, TX 77002
`
`Tel: (713) 546-5000
`
`garland.stephens@weil.com
`
` Anne M. Cappella, Reg. No. 43,217
` Adrian Percer, Reg. No. 46,986
`
`Jeremy Jason Lang, Reg. No. 73,604
` Weil, Gotshal & Manges LLP
`
`201 Redwood Shores Parkway
`
`Redwood Shores, CA 94065
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`Tel: (650) 802-3141
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`anne.cappella@weil.com
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`adrian.percer@weil.com
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`jason.lang@weil.com
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`Attorneys for Petitioner Intel Corporation
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`Case IPR2017-01395
`U.S. Patent No. 8,805,948
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`CERTIFICATE OF SERVICE
`I hereby certify that on December 22, 2017, a copy of PATENT OWNER’S
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`
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`FIRST UPDATED EXHIBIT LIST was served by filing this document through
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`the PTAB’s E2E Filing System as well as delivering a copy via electronic mail
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`upon the following:
`
`James M. Glass
`Registration No. 46,729
`Quinn Emanuel Urquhart & Sullivan LLP
`51 Madison Ave., 22nd Fl.
`New York, NY 10010
`Tel.: (212) 849-7000
`Email: jimglass@quinnemanuel.com
`
`Joseph M. Paunovich
`Registration No. 59,033
`Quinn Emanuel Urquhart & Sullivan LLP
`865 S. Figueroa Street, 10th Fl.
`Los Angeles, CA 90017
`Tel.: (213) 443-3000
`Email: joepaunovich@quinnemanuel.com
`
`Brian E. Mack
`Registration No. 57,189
`Quinn Emanuel Urquhart & Sullivan LLP
`50 California Street, 22nd Fl.
`San Francisco, CA 94111
`Tel.: (415) 875-6600
`Email: brianmack@quinnemanuel.com
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`Case IPR2017-01395
`U.S. Patent No. 8,805,948
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`
`Mark Lauer
`Registration No. 36,578
`Silicon Edge Law Group LLP
`7901 Stoneridge Dr., Ste. 528
`Pleasanton, CA 94588
`Tel.: (925) 621-2121
`Email: mark@siliconedgelaw.com
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`
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`Dated: December 22, 2017
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`/s/ Garland T. Stephens
`Garland T. Stephens
`Reg. No. 37,242
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