US 7,496,689 B2
`(10) Patent No.:
`(12) Unlted States Patent
`Sharp et al.
`(45) Date of Patent:
`Feb. 24, 2009
`
`
`USOO7496689B2
`
`(54) TCP/IP OFFLOAD DEVICE
`
`(75)
`
`Inventors: Colin C. Sharp, Santa Cruz, CA (US);
`Clive M. Philbrick San Jose CA (US)
`Daryl D. Starr, Milpitas, CA (US);
`Stephen E. J. Blightman, San Jose, CA
`(Us)
`
`(73) Assignee: Alacritech, Inc., San Jose, CA (US)
`
`(
`
`) Nome.
`
`subJeCt.tO any (31153121111163; the :lermefflgl:
`Ijjatselg 11552)???) 693091“; JuSte un er
`i
`i
`i
`( ) y
`ays.
`
`(21) Appl. N05 10/420,364
`.
`F11ed:
`
`Apr. 22’ 2003
`
`(22)
`
`(65)
`
`Prior Publication Data
`
`US 2004/0062245 A1
`
`Apr. 1, 2004
`_
`_
`Related U-S- Appllcatlon Data
`(60) Provisional application No. 60/374 788 filed on Apr.
`22 2002
`a
`a
`’
`Int. Cl.
`G06F 15/1 73
`G06F 15/16
`G06F 12/00
`H04L 15/00
`
`i
`
`(51)
`
`(2006 01)
`(2006.01)
`(200601)
`2006.01
`(
`'
`)
`
`(52) US. Cl.
`
`....................... 709/250; 709/238; 711/108;
`370/463
`
`(58) Field of Classification Search ................. 709/238,
`709/250; 711/108; 370/463; 375/219
`See application file for complete search history.
`
`(56)
`
`W0
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`4,366,538 A
`
`12/1982 Johnson et a1.
`(Contmued)
`FOREIGN PATENT DOCUMENTS
`W0 98/19412
`5/1998
`
`............. 364/200
`
`(Continued)
`OTHER PUBLICATIONS
`Internet pages entitled “Hardware Assisted Protocol Processing”,
`(which Eugene Feinberis working on), 1 page, printedNov. 25, 1998.
`(Continued)
`
`Primary ExamineriArio Etienne
`Assistant ExamineriPhili
`J Chea
`P
`(74) Attorney, Agent, or FirmiMark Lauer; Silicon Edge
`L
`G
`LLP
`aw roup
`
`ABSTRACT
`(57)
`A TCP/IP offload network interface device (NID) is inte-
`grated with a processing device that executes a stack. The
`TCP/IP ofl=load NID can either be a full TCP/IP offload device
`or a partial TCP/IP offload device. Common types ofpackets
`are processed by the NID in a fast-path such that the stack is
`ofl=loaded of TCP and IP protocol processing tasks. A hash is
`made from the packet header and is pushed onto a queue. The
`hash is later popped off the queue and is used to identify an
`associated TCB number from a hash table. A mechanism
`caches hash buckets in SRAM and stores other hash buckets
`in DRAM. An “IN SRAM CAM” is used to determine
`whether the TCB associated with the identified TCB number
`is cached in SRAM or whether it must be moved from DRAM
`into the SRAM cache. A lock table and a “lock table CAM”
`mechanism is disclosed that facilitates multiple processors
`working on the protocol processing of a single packet.
`
`21 Claims, 72 Drawing Sheets
`
`I —————————————————————————————————————————— 1
`
`INTEL EX. 1258.001
`
`|I
`
`
`
`PROCESSOR THAT
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`
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`
`INTEL Ex. 1258.001
`
`

`

`US 7,496,689 B2
`
`Page 2
`
`US. PATENT DOCUMENTS
`
`4,589,063 A
`4,700,185 A
`4,991,133 A
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`5,163,131 A
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`5,809,328 A
`5,809,527 A
`5,812,775 A
`5,815,646 A
`5,828,835 A
`5,848,293 A
`5,872,919 A
`5,878,225 A
`5,892,903 A
`
`
`
`5/1986 Shah etal.
`..................... 710/8
`10/1987 138113116131 ~~
`~ 370/451
`
`2/1991 Davis 9181 ~~
`~ 364/900
`10/1991 Hiram 6131 ~
`~ 709/230
`10/1991 Beacheta1~ ~
`~~ 370/856
`3/1992 Ward 6131
`365/78
`11/1992 Row eta1~ ~
`~ 395/200
`5/1993 Dally 6181 ~~
`~ 395/400
`1/1994 Trapp ~~~~~~~~~
`370/851
`2/1994 Latif et a1 ~~~~~~
`395/275
`
`4/1994 Yokoyama et 31 ~
`~ 395/200
`5/1995 Hausmaneta1~
`~ 395/250
`5/1995 Christenson
`709/234
`
`9/1995 Richter 9181
`370/941
`1/1996 Dobbins etal.
`~
`~370/255
`1/1996 Schrieret al.
`703/227
`
`.. 395/200.12
`1/1996 Hitz et al.
`4/1996 Ban ~~~~~~~~~~~~~~~ 395/250
`
`4/1996 Suda ................
`395/280
`5/1996 Szwerinskieta1
`~ 395/800
`6/1996 (3116550116131
`~ 395/775
`
`7/1996 Eshel
`~~~~~~~~~
`~~ 703/27
`
`8/1996 Young 9181 ~
`~ 395/280
`10/1996 Bakke etal.
`370/60
`
`11/1996 Netravaliet al.
`712/220
`~~ 395/20015
`12/1996 Reddin et a1
`
`....... 395/675
`12/1996 Seno et al.
`1/1997 18161616131 ~~
`395/20002
`
`1/1997 Stone ............. 370/469
`4/1997 1380116131
`395/20001
`
`5/1997 Delp 6131
`370/411
`5/1997 Cronin ................. 361/220
`5/1997 Andrews 6131
`395/20007
`
`5/1997 Cloud et a1
`395/680
`6/1997 Pardillos ........
`395/200.2
`9/1997 Kreohalr~etal~
`~ 395/20064
`
`
`9/1997 Collins .............
`. 395/200.2
`10/1997 Yokoyama 6131 ~
`~ 709/212
`
`10/1997 Kapooreta1 ~~
`709/203
`
`11/1997 Shobu etal.
`.
`.. 395/200.12
`12/1997 Sartore et al.
`.. 395/230.06
`~~~~~~~ 370/254
`12/1997 Kraslavsky
`
`12/1997 Nakagawa ~~
`395/484
`
`12/1997 Cheng 6181 ~
`~ 395/842
`3/1998 Chen ..........
`.395/181
`
`4/1998 Wong 6131 ~~
`709/230
`5/1998 Hagersten
`711/141
`
`5/1998 Chan et a1
`~ 370/455
`5/1998 Delp et al.
`.................. 395/827
`5/1998 Silverstein et a1.
`395/200.58
`
`~- 395/20064
`5/1998 Gentryetal.
`5/1998 Hamilton etal.
`............ 395/831
`5/1998 Kuzma ....................... 395/886
`
`6/1998 Erickson 6131 ~
`~~~~~~~ 710/9
`6/1998 Pioazoalrota1 ~~~~~~ 395/18801
`6/1998 Brendelet al.
`......... 395/200.31
`
`7/1998 Jedwab ~~~~~~~~~~
`714/807
`.............. 711/112
`7/1998 Hansen et al.
`8/1998 Osborne ..................... 709/245
`
`~~ 395/80001
`8/1998 Hansen 9131
`9/1998 Chen ..................... 395/182.08
`9/1998 McAlpice ................... 711/149
`
`9/1998 Nogales 6181 ~~
`~ 395/825
`9/1998 Cooper 9181 ~~~~~~~~~~~~~~~ 711/133
`9/1998 Van Seeters et al.
`395/200.43
`
`9/1998 Purcell 6131
`395/163
`................. 709/200
`10/1998 Isfeld et al.
`12/1998 Gentry .......................... 710/5
`2/1999 Wakeland ................... 709/230
`3/1999 Bilansky eta1.
`........ 395/200.57
`4/1999 Klaus ......................... 709/227
`
`
`
`5,898,713 A
`................. 371/53
`4/1999 Melzeretal.
`5,913,028 A
`.....
`. 395/200.33
`6/1999 Wang eta1.
`
`5,920,566 A
`............... 370/401
`7/1999 Hendelet 31.
`5,930,830 A
`7/1999 Mendelson eta1.
`......... 711/171
`
`5,931,918 A
`8/1999 Row eta1.
`.............
`709/300
`5,935,205 A
`.......... 709/216
`8/1999 Murayarna eta1.
`5,937,169 A
`8/1999 Conneryetal.
`.......... 395/200.8
`
`5,941,969 A
`8/1999 Rarnetal.
`...... 710/128
`5,941,972 A
`................ 710/129
`8/1999 Hoese eta1.
`5,950,203 A
`9/1999 Stakuis eta1.
`................. 707/10
`5,987,022 A
`.. 370/349
`11/1999 Geiger eta1.
`
`5,991,299 A
`............. 370/392
`11/1999 Radogna eta1.
`5,996,013 A
`11/1999 Delp eta1.
`.................. 709/226
`5,996,024 A
`11/1999 Blumenau
`709/301
`
`6,005,849 A
`................ 370/276
`12/1999 Roach eta1.
`6,009,478 A
`12/1999 Panneretal.
`.................. 710/5
`6,009,504 A * 12/1999 Krick ..........
`711/220
`
`6,016,513 A
`1/2000 Lowe
`709/250
`2/2000 Gentryet 31.
`6,021,446 A
`709/303
`
`2/2000 Chen ................. 714/2
`6,021,507 A
`6,026,452 A
`2/2000 Pitts
`710/56
`
`3/2000 Minami eta1.
`..
`6,034,963 A
`370/401
`3/2000 Anjur eta1. ............. 707/10
`6,038,562 A
`
`3/2000 Flanders eta1.
`6,041,058 A
`370/401
`3/2000 Hoese ............
`6,041,381 A
`710/129
`
`6,044,438 A
`3/2000 Olnowich .
`711/130
`
`6,047,323 A
`4/2000 Krause .....
`711/129
`..
`6,047,356 A
`4/2000 Anderson eta1.
`711/129
`6,049,528 A
`4/2000 Hendelet 31.
`......
`370/235
`6,057,863 A
`5/2000 Olarig ............
`345/520
`
`6,061,368 A
`5/2000 Hitzelberger
`370/537
`6,065,096 A
`5/2000 Day eta1.
`.......
`711/114
`6,067,569 A
`5/2000 Khaki eta1.
`709/224
`6,070,200 A
`5/2000 Gates etal. ............. 710/20
`
`6,078,564 A
`6/2000 Lakshman eta1.
`.
`370/235
`6,078,733 A
`6/2000 Osborne ............
`709/250
`6,097,734 A
`8/2000 Gotesman et 31.
`..
`370/474
`
`6,101,555 A
`8/2000 Gosheyetal.
`.....
`709/321
`...... 359/123
`6,111,673 A
`8/2000 Chang et 31.
`
`6,115,615 A
`9/2000 Ota eta1.
`........
`455/4221
`...... 709/230
`6,122,670 A
`9/2000 Bennett eta1.
`..
`
`6,141,701 A
`10/2000 Whitney ......
`710/5
`6,141,705 A
`10/2000 Anandetal.
`.
`.. 710/15
`6,145,017 A
`11/2000 Ghaffari ............... 710/5
`.. 709/228
`6,157,955 A
`12/2000 Narad eta1.
`
`............. 370/401
`6,172,980 B1
`1/2001 Flanders eta1.
`6,173,333 B1
`1/2001 Jolitz et 31.
`370/412
`.
`6,181,705 B1
`1/2001 Branstad eta1.
`6,202,105 B1
`3/2001 Gates eta1. ............. 710/20
`6,226,680 B1
`5/2001 Boucheretal.
`.
`709/230
`6,233,242 B1
`5/2001 Mayer et 31.
`370/392
`6,246,683 B1
`6/2001 Conneryetal.
`370/392
`6,247,060 B1
`6/2001 Boucheretal.
`709/238
`6,279,051 B1
`8/2001 Gates etal. .......... 710/20
`6,289,023 B1
`9/2001 Dowling et 31.
`.
`370/419
`6,298,403 B1
`10/2001 Suri eta1.
`.......
`710/100
`6,324,649 B1
`11/2001 Eyres eta1.
`.....
`713/202
`6,334,153 B2
`12/2001 Boucher et 31.
`.
`709/230
`6,343,360 B1
`1/2002 Feinleib ................ 713/1
`6,345,301 B1
`2/2002 Burns et 31.
`.....
`709/230
`6,345,302 B1
`2/2002 Bennett et 31.
`..
`709/236
`6,356,951 B1
`3/2002 Gentryetal.
`709/250
`6,370,599 B1
`4/2002 Anand et 31.
`..... 710/15
`
`......
`6,385,647 B1
`5/2002 Wills et 31.
`.. 709/217
`
`............... 709/226
`6,389,468 B1
`5/2002 Muller eta1.
`6,389,479 B1
`5/2002 Boucher ..................... 709/243
`6,393,487 B2
`5/2002 Boucher et 31.
`.
`709/238
`
`6,421,742 B1
`7/2002 Tillier
`........................... 710/1
`7/2002 Hoese et 31.
`................ 710/129
`6,421,753 131
`6,427,169 B1
`7/2002 Elzur
`709/224
`
`7/2002 Craft eta1.
`.................. 709/230
`6,427,171 B1
`6,427,173 B1
`7/2002 Boucheretal.
`............. 709/238
`6,434,620 B1
`8/2002 Boucheretal.
`............. 709/230
`
`
`
`
`
`
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`INTEL EX. 1258.002
`
`INTEL Ex. 1258.002
`
`

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`US 7,496,689 B2
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`Page 3
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`6,434,651 B1
`6,449,656 B1
`6,453,360 B1
`6,470,415 B1
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`6,480,489 B1
`6,487,202 B1
`6,487,654 B2
`6,490,631 B1
`6,502,144 B1
`6,523,119 B2
`6,526,446 B1
`6,570,884 B1
`6,591,302 B2
`6,591,310 B1
`6,648,611 B2
`6,650,640 B1
`6,657,757 B1
`6,658,480 B2
`6,678,283 B1
`6,681,364 B1
`6,687,758 B2
`6,697,868 B2
`6,751,665 B2
`6,757,746 B2
`6,765,901 B1
`6,807,581 B1
`6,842,896 B1
`6,912,522 B2
`6,938,092 B2
`6,941,386 B2
`6,965,941 B2
`6,996,070 B2
`7,042,898 B2
`7,076,568 B2
`7,089,326 B2
`7,093,099 B2
`7,124,205 B2
`7,133,940 B2
`7,167,926 B1
`7,167,927 B2
`7,174,393 B2
`7,185,266 B2
`7,191,241 B2
`7,191,318 B2
`7,237,036 B2
`7,254,696 B2
`7,284,070 B2
`2001/0004354 A1
`2001/0025315 A1
`2001/0013059 A1
`2001/0014892 A1
`2001/0014954 A1
`200 1/0048681 A1
`2001/0053148 A1
`2002/0073223 A1
`2002/0112175 A1
`2003/0066011 A1
`2003/0110344 A1
`2003/0165160 A1
`2004/0054814 A1
`2004/0059926 A1
`2004/0153578 A1
`2004/0213290 A1
`2004/0246974 A1
`
`.................. 710/260
`8/2002 Gentry, Jr.
`..
`. 709/236
`9/2002 Elzur et al.
`
`............... 709/250
`9/2002 Muller et al.
`10/2002 Starr et al.
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`11/2002 Muller et al.
`11/2002 Klausmeier et al.
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`
`11/2002 Dowling ........
`712/244
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`12/2002 Teich et al.
`12/2002 Accarie ......................... 710/8
`.
`2/2003 Pavlin et a1.
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`5/2003 Connery et a1.
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`.
`7/2003 Boucher et al.
`. 709/230
`
`7/2003 Johnson ......................... 710/3
`11/2003 Morse et a1.
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`11/2003 Muller et a1.
`. 370/392
`
`.
`12/2003 Chang et a1.
`. 359/124
`
`. 709/239
`12/2003 Boucher et a1
`1/2004 Teplitsky .......
`. 370/463
`
`1/2004 Calvignac et a1.
`.
`. 714/776
`
`. 709/250
`2/2004 Craft et a1.
`. 709/230
`2/2004 Craft et al.
`
`6/2004 Philbrick et al.
`. 709/224
`.
`6/2004 Boucher et al.
`. 709/250
`
`7/2004 Johnson et al.
`.
`. 370/352
`10/2004 Starr et al.
`. 709/250
`
`1/2005 Redding et al
`. 717/172
`
`6/2005 Edgar .............. 707/10
`
`8/2005 Burns ......
`709/230
`
`9/2005 Craft et al.
`. 709/250
`11/2005 Boucher et al
`. 709/230
`
`2/2006 Starr et al.
`. 370/252
`5/2006 Blightman et a
`. 370/463
`
`7/2006 Philbrick et a1.
`. 709/250
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`.
`. 709/242
`. 711/206
`.
`8/2006 Bodas et al.
`
`......
`. 709/250
`10/2006 Craft et al.
`
`11/2006 Blightman et al.
`710/22
`.
`. 709/250
`1/2007 Boucher et al.
`
`. 709/250
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`.
`. 709/250
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`
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`. 714/776
`
`.
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`.
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`
`.
`6/2007 Boucher et al.
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`
`.
`. 709/250
`10/2007 Boucher et al.
`
`6/2001 Jolitz .........
`370/328
`
`6/2001 Jolitz .........
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`8/2001 Dawson et al.
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`
`8/2001 Purcell et al.
`714/4
`12/2001 Bilic et al.
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`. 709/232
`
`8/2002 Makofl<a et al.
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`4/2003 Oren ................
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`..
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`......
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`............
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`.
`10/2004 Johnson et al.
`370/469
`12/2004 Gyugi et al.
`........... 370/395.31
`
`
`
`..
`..
`
`FOREIGN PATENT DOCUMENTS
`
`W0
`W0
`W0
`
`WO 98/50852
`WO 99/04343
`WO 99/65219
`
`11/1998
`1/1999
`12/1999
`
`W0
`W0
`W0
`W0
`W0
`W0
`W0
`W0
`
`WO 00/13091
`WO 01/04770
`WO 01/05107
`WO 01/05116
`WO 01/05123
`WO 01/40960
`WO 01/59966
`WO 01/86430
`
`3/2000
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`1/2001
`1/2001
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`Zilog product Brief entitled “Z85C30 CMOS SCC Serial Commu-
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`Internet pages entitled: Asante and 100BASE-T Fast Ethernet. 7
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`lecture, 4 pages, printed Feb. 19, 2001.
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`Internet pages directed to Technical Brief on Alteon Ethernet Gigabit
`NIC technology, www.alteon.com, 14 pages, printed Mar. 15, 1997.
`VIA Technologies, Inc. article entitled “VT8501 Apollo MVP4”, pp.
`i-iV, 1-1 1, cover and copyright page, revision 1.3, Feb. 1, 2000.
`iReady News Archives article entitled “iReady Rounding Out Man-
`agement Team with Two Key Executives”, http://www.ireadyco.
`com/archives/keyexechtml, 2 pages, printed Nov. 28, 1998.
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`Ready Based On iReady’s Design,” Press Release Oct. 1998, 3 pages,
`printed Nov. 28, 1998.
`Internet pages from iReady Products, web sitehttp://www.ireadyco.
`corn/products,htrnl, 2 pages, downloaded Nov. 25, 1998.
`iReady News Archives, Toshiba, iReady shipping Internet chip, 1
`page, printed Nov. 25, 1998.
`Interprophet article entitled “Technology”, http://www.interprophet.
`corn/technologyhtml, 17 pages, printed Mar. 1, 2000.
`iReady Corporation, article entitled “The I-1000 Internet Tuner”, 2
`pages, date unknown.
`iReady article entitled “About Us Introduction”, Internet pages
`fromhttp://www.iReadyco.com/about.html, 3 pages, printed Nov.
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`iReady News Archive article entitled “Revolutionary Approach to
`Consumer Electronics Internet Connectivity Funded”, San Jose, CA,
`Nov. 20, 1997. 2 pages, printed Nov. 2, 1998.
`iReady News Archive article entitled “Seiko Instruments Inc. (S11)
`Introduces World’s First Internet-Ready Intelligent LCD Modules
`Based on iReady Technology,” Santa Clara, CA and Chiba, Japan,
`Oct. 26, 1998. 2 pages, printed Nov. 2, 1998.
`NEWSwatch article entitled “iReady internet Tuner to Web Enable
`Devices”, Tuesday, Nov. 5, 1996, printed Nov. 2, 1998, 2 pages.
`EETimes article entitled “Tuner for Toshiba, Toshiba Taps iReady for
`Internet Tuner”, by David Lammers, 2 pages, printed Nov. 2, 1998.
`“Comparison of Novell Netware and TCP/IP Protocol Architec-
`tures”, by J.S. Carbone, 19 pages, printed Apr. 10, 1998.
`Adaptec article entitled “AEA-7110C-a DuraSAN product”, 11
`pages, printed Oct. 1, 2001.
`iSCSI HBA article entitled “iSCSI and 2Gigabit fibre Channel Host
`Bus Adapters from Emulex, QLogic, Adaptec, JNI”, 8 pages, printed
`Oct. 1, 2001.
`iSCSI HBA article entitled “FCE-3210/6410 32 and 64-bit PCI-to-
`Fibre Channel HBA”, 6 pages, printed Oct. 1, 2001.
`ISCSI.com article entitled “iSCSI Storage”, 2 pages, printed Oct. 1,
`2001.
`“Two-Way TCP Traffic Over Rate Controlled Channels: Effects and
`Analysis”, by Kalampoukas et al., IEEE Transactions on Network-
`ing, vol. 6, No. 6, Dec. 1998, 17 pages.
`
`INTEL EX. 1258.003
`
`INTEL Ex. 1258.003
`
`

`

`US 7,496,689 B2
`
`Page 4
`
`IReady News article entitled “Toshiba Delivers First Chips to Make
`Consumer Devices Internet-Ready Based on iReady Design”, Santa
`Clara, CA, and Tokyo, Japan, Oct. 14, 1998, printed Nov. 2, 1998, 3
`pages.
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`tions”, by Lynne Jolitz, printed Jun. 14, 2000, 4 pages.
`“File System Design For An NFS File Server Appliance”, Article by
`D. Hitz, et al., 13 pages.
`Adaptec Press Release article entitled “Adaptec Announces
`EtherStorage Technology”, 2 pages, May 4, 2000, printed Jun. 14,
`2000.
`
`Adaptec article entitled “EtherStorage Frequently Asked Questions”,
`5 pages, printed Jul. 19, 2000.
`Adaptec article entitled “EtherStorage White Paper”, 7 pages, printed
`Jul. 19,2000.
`CIBC World Markets article entitled “Computers; Storage”, by J.
`Berlino et al., 9 pages, dated Aug. 7, 2000.
`Merrill Lynch article entitled “Storage Futures”, by S. Milunovich,
`22 pages, dated May 10, 2000.
`CBS Market Watch article entitled “Montreal Start-Up Battles Data
`Storage Bottleneck”, by S. Taylor, dated Mar. 5, 2000, 2 pages,
`printed Mar. 7, 2000.
`Internet-draft article entitled “SCSI/TCP (SCSI over TCP)”, by J.
`Satran et al., 38 pages, dated Feb. 2000, printed May 19, 2000.
`Internet pages entitled Technical White Paper-XPoint’s Disk to LAN
`Acceleration Solution for Windows NT Server, printed Jun. 5, 1997,
`15 pages.
`Jato Technologies article entitled Network Accelerator Chip Archi-
`tecture, twelve-slide presentation, printed Aug. 19, 1998, 13 pages.
`EETimes article entitled Enterprise System Uses Flexible Spec,
`dated Aug. 10, 1998, printed Nov. 25, 1998, 3 pages.
`Internet pages entitled “Smart Ethernet Network Interface Cards”,
`which Berend Ozceri is developing, printed Nov. 25, 1998, 2 pages.
`Internet pages of Xaqti corporation entitled “GigaPower Protocol
`Processor Product Review,” printed Nov. 25, 1999, 4 pages.
`U.S. Appl. No. 60/283,896, Titled: CRC Calculations for Out of
`Order PUDs, filed Apr. 12, 2003, Inventor: Amit Oren, Assignee:
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`via Data-Copy Avoidance,” by Robert J. Walsh, printed Jun. 3, 1999,
`25 pages.
`Andrew S. Tanenbaum, Computer Networks, Third Edition, 1996,
`ISBN 0-13-349945-6.
`
`Rice University article entitled “LRP: A Network Subsystem Archi-
`tecture for Server Systems”, by P. Druschel and G. Banga, 14 pages.
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`“RFC2140” entitled “TCP Control Block Interdependence”, web
`address http://www.faqs.org/ftp/rfc/pdf/rfc2140.txt.pdf, 11 pages,
`Apr. 1997.
`WindRiver article entitled “Tornado: For Intelligent Network Accel-
`eration”, copyright Wind River Systems, 2001, 2 pages.
`WindRiver White Paper entitled “Complete TCP/IP Offload for
`High-Speed Ethernet Networks”, Copyright Wind River Systems,
`2002, 7 pages.
`Intel article entitled “Solving Server Bottlenecks with Intel Server
`Adapters”, Copyright Intel Corporation, 1999, 8 pages.
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`Schwaderer et al ., IEEE Computer Society Press publication entitled,
`“XTP in VLSI Protocol Decomposition for ASIC Implementation”,
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`Beach, Bob, IEEE Computer Society Press publication entitled,
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`ference on Local Computer Networks, 18 pages, Sep. 30-Oct. 3,
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`Chesson et al., IEEE Syposium Record entitled, “The Protocol
`Engine Chipset”, from Hot Chips III, 16 pages, Aug. 26-27, 1991.
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`Globecom ’91, presentation entitled, “An Outboard Processor for
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`pages, Dec. 2-5, 1991.
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`chip Gigabit Ethernet NIC”, from Compcon ’97 Proceedings, 7
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`tecture, 4 pages, printed Feb. 19, 2001.
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`system Architecture for Server Systems”, by Peter Druschel and
`Gaurav Banga, 14 pages.
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`“XTP in VLSI Protocol Decomposition for ASIC Implementation”,
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`ference on Local Computer Networks, 18 pages, Sep. 30-Oct. 3,
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`Engine (ROPE) for a multiple-layer bypass architecture,” Protocols
`for High Speed Networks, pp. 224-239, 1995.
`
`* cited by examiner
`
`INTEL EX. 1258.004
`
`INTEL Ex. 1258.004
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 1 of 72
`
`US 7,496,689 B2
`
`
`e
`SYSTEM
`I____________________________I
`I
`|
`I
`|
`I
`II
`I
`II
`I
`'I
`CACHED
`I
`
`LOCK
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`TCBs
`‘
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`HASH
`'I
`114
`TABLE
`i
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`CAM
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`105
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`
`PROCESSOR THAT
`IMPLEM ENTS
`PROTOCOL STACK
`
`FIG. 1
`
`INTEL EX. 1258.005
`
`INTEL Ex. 1258.005
`
`

`

`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet20f72
`
`US 7,496,689 B2
`
`
`
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`
`INTEL EX. 1258.006
`
`INTEL Ex. 1258.006
`
`
`
`
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 3 of 72
`
`US 7,496,689 B2
`
`START
`
`,~ 200
`
`OBTAIN AVAILABLE "PROCESSOR CONTEXT"
`
`
`201
`
`202
`
`POP RECEIVE DESCRIPTOR AND HASH OFF THE RECEIVE DESCRIPTOR
`QUEUE
`
`
`
`CHECK ATTENTION BIT, IF SET THEN GO TO SLOW-PATH (END)
`
`I
`IF ATTENTION BIT IS NOT SET, THEN START THE DMA OF
`
`THE HEADER FROM DRAM TO SRAM
`
`
`203
`
`I
`
`BITS[13:2] OF THE HASH ARE THE HASH BUCKET NUMBER, CHECK THE
`CORRESPONDING HASH BUCKET STATUS BYTE TO SEE IF THE BUCKET IS IN
`
`SRAM (CACHE)
`I
`IF THE BUCKET IS IN CACHE, THEN WAIT FOR THE HEADER DMA TO
`
`COMPLETE
`
`r' 205
`
`r- 204
`
`IF THE BUCKET IS NOT IN CACHE, THEN IDENTIFY A FREE HASH SLOT FROM
`Q_FREEHASHSLOTS AND DMA THE HASH BUCKET FROM DRAM INTO THE
`FREE SLOT IN SRAM, SET THE HASH BUCKET STATUS BYTE TO POINT TO THE
`NOW OCCUPIED SLOT
`
`206
`
`207
`
`SEARCH THE HASH BUCKET (IN SRAM) FOR THE TCB NUMBER, USE BITS[1:O]
`OF THE HASH TO DETERMINE THE FIRST HASH ENTRY TO CHECK, CHECK
`
`CONSECUTIVE HASH ENTRIES IN THE BUCKET FROM THERE
`
`208
`
`IF A MATCH IS NOT FOUND IN THE BUCKET, THEN GO TO SLOW-PATH (END)
`
`209
`
`IF A MATCH IS FOUND IN THE BUCKET, THEN GET THE TCB NUMBER FROM
`
`THE HASH BUCKET ENTRY
`
`I
`ATTEMPT TO LOCK THE INDICATED TCB BY SETTING THE TCB'S LOCK BIT
`
`210
`
`I
`
`FIG. 3A
`
`INTEL EX. 1258.007
`
`INTEL Ex. 1258.007
`
`

`

`
`5213
`
`
`IF THE TCB SLOT NUMBER IS FOUND IN THE INSRAM CAM, THEN DO FAST-
`
` PATH RECEIVE PROCESSING (END)
`
`
`
`IF THE TCB SLOT NUMBER IS NOT FOUND IN THE INSRAM CAM, THEN
`IDENTIFY A LRU SLOT IN THE TCB SRAM CACHE AND DMA THE TCB FROM
`
`DRAM INTO THE LRU SLOT
`
`PUT THE TCB SLOT NUMBER INTO THE SRAM CAM
`
`216
`
`
`
`
`
`214
`
`US. Patent
`
`Feb. 24, 2009
`
`Sheet 4 of 72
`
`US 7,496,689 B2
`
`
`
`
`
`
`212
`
`
`IF THE TCB IS LOCKED AS INDICATED BY THE LOOK BIT, THEN INSERT THE
`RUNNING PROCESSOR CONTEXT INTO THE TCB LOCK TABLE AND SUSPEND.
`
`WHEN THE TCB IS UNLOCKED BY THE CURRENT OWNER, A TCB LOCK TABLE
`CAM AND THE LOCK TABLE ARE USED TO IDENTIFY THE NEXT WAITING
`PROCESSOR CONTEXT. THIS PROCESSOR CONTEXT IS RESTARTED.
`
`
`
`
`
`ONCE THE PROCESSOR CONTEXT HAS LOCKED THE MATCHED TCB, THEN
`SEARCH THE INSRAM CAM FOR THE TCB SLOT NUMBER. IF THE TCB SLOT
`
`NUMBER IS IN THE INSRAM CAM, THEN THIS TCB IS IN THE TCB SRAM
`
`CACHE.
`
`DO FAST-PATH RECEIVE. PROCESSING (END)
`
`FIG. 38
`
`KEY TO FIG.3
`
`FIG.3A
`
`FIG.BB
`
`FIG.3
`
`INTEL EX. 1258.008
`
`INTEL Ex. 1258.008
`
`

`

`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 5 of 72
`
`US 7,496,689 B2
`
`300
`__________________ fi_ _ 1
`COMPUTER
`306
`r _______ .fi__
`
`
`I
` NETWORK
`
`NETWORK
`
`CPU EXECUTES
`
`
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`INSTRUCNONS
`INTERFACE
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`TTmTIMPLEMENT
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`—————————— I
`
`
`
`CPUEXECUTES
`INSTRUCHONS
`TTMTIMPLEMENT
`PROTOCOLSTACK
`
`
`
`500
`
`I _____________________ d—I
`COMPUTER
`I
`_______________ I
`HOST
`301
`
`
`
`
`NETWORK
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`
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`DEVICE
`
`
`
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`
`
`LOCAL BUS
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`
`STORAGE
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`
`CPU EXECUTES
`
`INSTRUCTIONS
`THAT IMPLEMENT
`PROTOCOL STACK
`
`|
`I
`:
`
`I|
`
`INTEL EX. 1258.009
`
`301
`
`
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`N ETWORK
`
`NERNORK
`‘flfl
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`INTERFACE
`DEva
`I
`
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`
`
`INTEL Ex. 1258.009
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 6 0f 72
`
`US 7,496,689 B2
`
` BRIDGE
`
`|
`
`CPU EXECUTES
`
`501
`i
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`INSTRUCTIONS
`
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`THATIMPLEMENT
`
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`IEEE‘I/RVFOARC:
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`PROTOCOL STACK
`
`F I G 8
`800
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`________________________ d__
`CPU
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`NETWORK I
`COMPUTER
`IMPLEMENTS
`'
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`
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`DEVICE
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`PROTOCOL
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`STACK
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`NETWORK
`
`801
`
`BRIDGE
`
`
`INTEL EX. 1258.010
`
`INTEL Ex. 1258.010
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 7 of 72
`
`US 7,496,689 B2
`
`_________________________________________________
`
`Rev
`Seq
`
`th
`Seq
`
`Reg File
`4K1 WCS
`4K1 ROM
`ll
`-—1!= 32 KB Sram
`-
`
`I-"
`
`External
`Memory
`Ctrl
`
`-EEPROM
`
`SDRAM
`
`FLASH
`
`_________________________________________________
`
`INTEL EX. 1258.011
`
`INTEL Ex. 1258.011
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 8 of 72
`
`US 7,496,689 B2
`
`Datapath Bandwidth
`
`(125MB/s/IOOOBasc) x 2 (full duplex) x 1 connections
`
`Average frame size
`
`Frame rate : 250MB/s / 512B
`
`Overhead / frame : (256B context read * 25%) + (968 header read) +
`(192B context write * 25%) + (64B misc.)
`
`Total bandwidth = (5123 in) + (512B out) + (272B Cpu)
`
`Dram Bandwidth required = (1296B/frame) x (488,280 frames/s)
`
`Dram Bandwidth @ ISOMHZ : (64 bytes/ 126.6ns)
`
`PCI Bandwidth required
`
`PC] Bandwidth available @ 33 MHZ, 64b, average
`
`PCI Bandwidth available @ 66 MHZ, 64b, average
`
`=
`
`=
`
`=
`
`=
`
`=
`
`i
`
`=
`
`=
`
`:
`
`=
`
`250 MB/s
`
`512 B
`
`488,280 frames /5
`
`272B / frame
`
`12963 / frame
`
`632.8MB/s
`
`505MB/S
`
`250MB/s
`
`200MB/s
`
`450MB/s
`
`Cpu Bandwidth
`
`Required instructions / frame (per Clive)
`
`Ack frames per receive
`
`Average instructions/Rev = 250 + (220 * .5)
`Receive frame interval : 512B / 125MB/s
`
`:
`
`—
`
`:
`
`250 instructions/rcv
`220 instructions/ack
`
`.5
`
`360 instructions/frame
`
`4.267 us
`
`Instructions / frame @ 100MHz = (4.27us/frame)/(15ns/instruction) =
`
`284 instructions/frame
`
`FIG. 12
`
`INTEL EX. 1258.012
`
`INTEL Ex. 1258.012
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 9 of 72
`
`US 7,496,689 B2
`
`PIN ASSIGNMENTS
`
`BALL
`
`SIGNAL DESCRIPTION
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
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`
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`
`
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`INTEL EX. 1258.013
`
`INTEL Ex. 1258.013
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 10 of 72
`
`US 7,496,689 B2
`
`
`
`SIGNAL DESCRIPTION
`
`
`
`
`
`
`H17
`
`U10
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`R17
`
`
`
`
`
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`
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`
`
`
`
` SIGNAL DESCRIPTION
`
`V10
`
`T18
`
`BIO
`
`VDDPC108
`VDDPC109
`
`CLK_SEL_0
`CLK_SEL_1
`PWR_GOOD
`AUx_PWR_GO0D
`NAND_OUT
`
`11
`
`GPIO_2
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`- GPIO_3
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
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`
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`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`INTEL EX. 1258.014
`
`<:CU
`
`
`
`
`
`
`
`4 1
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`
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`
`A p-L N
`
`1
`
`G4
`
`
`
`INTEL Ex. 1258.014
`
`

`

`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 11 of 72
`
`US 7,496,689 B2
`
`LLgB
`
`NGS
`
`AL DESCRIPTION
`
`L
`
`SIGNAL DESCRIPTION
`
`
`
`EnmnmmmnmmmeTYWYVVJKMPUCCDCBDACGJJRMT
`
`RAM WE L
`RAM D 0 M
`EEPROM SDI
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`EEPROM CLK
`FSH CD L
`NC
`NC
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`
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`
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`A CRS
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`A TXD3
`A TXDV
`A TXER
`
`DIO
`M CHK 0
`M CHK 1
`M CHK 2
`M CHK 3
`M CHK 4
`M DATA 0
`M DATA 1
`
`M DATAJ
`M DATA 3
`M DATA 4
`M DATA 5
`M DATA 6
`M DATA 7
`M ADDR_0
`M ADDR 1
`
`M ADD'
`
`M_ADDR 3
`M_ADDR 4
`M ADD 5
`
`M ADDR_6
`M ADDR_7
`M ADDR 8
`
`M ADDR_9
`M ADD' 10
`M ADD'11
`M ADDR 12
`M ADD'
`13
`M ADDR 14
`M ADDR 15
`RAM CLK
`M CKE
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`
`FIG. 13/3
`
`INTEL EX. 1258.015
`
`INTEL Ex. 1258.015
`
`
`
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 12 of 72
`
`US 7,496,689 B2
`
`ILAG
`Sram LOAD LOAD
`Ctr-lCtr-lCtrl
`Add,lFIL-E ALU FLAG
`BASED
`
`CTX
`
`REGS
`
`CC's
`
`REG’s
`
`Data
`
`addr
`C
`
`din
`C
`
`384x32
`FILE
`
`BAD
`DINAAAFETCH LOAD STACK BAD
`TC“
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`pc
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`
`REG
`
`Addr
`
`
`
`
`
`
`FILE
`
`ALU
`
`ALU
`
`ALU
`
`TEST
`
`FLAG
`
`CTX
`
`OPD's
`
`CC's
`
`0P
`
`SEL
`
`SEL
`
`QCH
`&
`QCMD
`
`LIT
`
`CTRL
`
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`PC STACK ABA
`“ASE Add,
`
`
`
`
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`
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`
`CC's
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`
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`
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`
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`
`PGM
`
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`
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`
`CB
`
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`Sm DEBUG
`Addr
`“ASE Addr
`
`
`
`FILE
`
`CTX
`
`FIG. 14
`
`INTEL EX. 1258.016
`
`INTEL Ex. 1258.016
`
`

`

`US. Patent
`
`Feb. 24, 2009
`
`Sheet 13 0f 72
`
`US 7,496,689 B2
`
`INSTRUCTION-WORD FOR