Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 1 of 59 PageID #: 4511
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`MARSHALL DIVISION
`
`ALACRITECH, INC.,
`
`
`
`Plaintiff,
`
`Case No. 2:16-cv-693-JRG-RSP
`
`v.
`
`CENTURYLINK, INC., et al.,
`
`
`
`LEAD CASE
`
`Defendants,
`
`JURY TRIAL DEMANDED
`
`and
`
`CAVIUM, Inc., et al.,
`
`Intervenors.
`
`
`
`ANSWER AND COUNTERCLAIMS TO
`CAVIUM INC.’S COMPLAINT IN INTERVENTION
`
`Plaintiff Alacritech, Inc. (“Alacritech”) responds
`
`to Intervenor Cavium, Inc.’s
`
`(“Cavium”) Complaint in Intervention as follows. Any allegation Alacritech does not expressly
`
`admit should be deemed denied.
`
`PARTIES
`
`1.
`
`Alacritech admits that Cavium purports to seek declaratory judgment of non-
`
`infringement in its Complaint in Intervention. Alacritech denies the remaining allegations of
`
`Paragraph 1 of the Complaint in Intervention.
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`2.
`
`Alacritech is without knowledge or information sufficient to form a belief as to
`
`the truth of the allegations of Paragraph 2 of the Complaint in Intervention, and therefore denies
`
`them.
`
`
`
`3.
`
`Alacritech admits the allegations of Paragraph 3 of the Complaint in Intervention.
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`1
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`INTEL EX. 1233.001
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 2 of 59 PageID #: 4512
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`4.
`
`Alacritech admits that it has brought patent claims against Defendant Dell, Inc.
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`(“Dell”) in this action under 35 U.S.C. §§ 101 et seq., and that this Court has subject matter
`
`jurisdiction over those claims pursuant to 28 U.S.C. §§ 1331 and 1338(a). Alacritech is without
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`knowledge or information sufficient to form a belief as to the truth of the remaining allegations
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`of Paragraph 4 of the Complaint in Intervention, and therefore denies them.
`
`5.
`
`6.
`
`Alacritech admits the allegations of Paragraph 5 of the Complaint in Intervention.
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`FACTUAL BACKGROUND
`
`Alacritech admits that on June 30, 2016, it filed its Complaint in this action
`
`accusing Dell of making, using, selling, offering to sell and/or importing Dell products and
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`services that infringe United States Patent Nos. 7,124,205; 7,237,036; 7,337,241; 7,673,072;
`
`7,945,699; 8,131,880; 8,805,948; and 9,055,104 (respectively, the ‘205 Patent, the ‘036 Patent,
`
`the ‘241 Patent, the ‘072 Patent, the ‘699 Patent, the ‘880 Patent, the ‘948 Patent, and the ‘104
`
`Patent; collectively, the “Asserted Patents”). Alacritech is without knowledge or information
`
`sufficient to form a belief as to the truth of the remaining allegations of Paragraph 6 of the
`
`Complaint in Intervention, and therefore denies them.
`
`7.
`
`8.
`
`Alacritech admits the allegations of Paragraph 7 of the Complaint in Intervention.
`
`Alacritech admits that some of Alacritech’s allegations under the Asserted Patents
`
`are directed against infringing Dell products and services that have certain Cavium components.
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`Alacritech denies the remaining allegations of Paragraph 8 of the Complaint in Intervention.
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`9.
`
`Alacritech admits that its Complaint alleges that Dell infringes certain of the
`
`asserted patents by making, using, selling, offering for sale, and/or importing Dell products and
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`services that have the QLogic 8262-k as a component, among other components. Alacritech
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`further admits that its infringement allegations are based, in part, on other QLogic products
`
`
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`2
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`INTEL EX. 1233.002
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 3 of 59 PageID #: 4513
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`included in Dell’s accused products. Alacritech denies the remaining allegations of Paragraph 9
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`of the Complaint in Intervention.
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`10.
`
`Alacritech is without knowledge or information sufficient to form a belief as to
`
`the truth of the allegations of Paragraph 10 of the Complaint in Intervention, and therefore denies
`
`them.
`
`11.
`
`Alacritech is without knowledge or information sufficient to form a belief as to
`
`the truth of the allegations of Paragraph 11 of the Complaint in Intervention, and therefore denies
`
`them.
`
`COUNT I
`
`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,124,205
`
`12.
`
`Alacritech incorporates by reference Paragraphs 1-11 of this Answer as if set forth
`
`fully here.
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`13.
`
`Alacritech denies the allegations of Paragraph 13 of the Complaint in
`
`Intervention.
`
`14.
`
`Alacritech denies the allegations of Paragraph 14 of the Complaint in
`
`Intervention.
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`15.
`
`Alacritech denies the allegations of Paragraph 15 of the Complaint in
`
`Intervention.
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`16.
`
`Alacritech denies the allegations of Paragraph 16 of the Complaint in
`
`Intervention.
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`COUNT II
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,237,036
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`
`
`3
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`INTEL EX. 1233.003
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 4 of 59 PageID #: 4514
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`17.
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`Alacritech incorporates by reference Paragraphs 1-16 of this Answer as if set forth
`
`fully here.
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`18.
`
`Alacritech denies the allegations of Paragraph 18 of the Complaint in
`
`Intervention.
`
`19.
`
`Alacritech denies the allegations of Paragraph 19 of the Complaint in
`
`Intervention.
`
`20.
`
`Alacritech denies the allegations of Paragraph 20 of the Complaint in
`
`Intervention.
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`21.
`
`Alacritech denies the allegations of Paragraph 21 of the Complaint in
`
`Intervention.
`
`COUNT III
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,337,241
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`22.
`
`Alacritech incorporates by reference Paragraphs 1-21 of this Answer as if set forth
`
`fully here.
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`23.
`
`Alacritech denies the allegations of Paragraph 23 of the Complaint in
`
`Intervention.
`
`24.
`
`Alacritech denies the allegations of Paragraph 24 of the Complaint in
`
`Intervention.
`
`25.
`
`Alacritech denies the allegations of Paragraph 25 of the Complaint in
`
`Intervention.
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`26.
`
`Alacritech denies the allegations of Paragraph 26 of the Complaint in
`
`Intervention.
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`
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`4
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`INTEL EX. 1233.004
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 5 of 59 PageID #: 4515
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`COUNT IV
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 7,673,072
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`27.
`
`Alacritech incorporates by reference Paragraphs 1-26 of this Answer as if set forth
`
`fully here.
`
`28.
`
`Alacritech denies the allegations of Paragraph 28 of the Complaint in
`
`Intervention.
`
`29.
`
`Alacritech denies the allegations of Paragraph 29 of the Complaint in
`
`Intervention.
`
`30.
`
`Alacritech denies the allegations of Paragraph 30 of the Complaint in
`
`Intervention.
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`31.
`
`Alacritech denies the allegations of Paragraph 31 of the Complaint in
`
`Intervention.
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`COUNT V
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`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 8,131,880
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`32.
`
`Alacritech incorporates by reference Paragraphs 1-31 of this Answer as if set forth
`
`fully here.
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`33.
`
`Alacritech denies the allegations of Paragraph 33 of the Complaint in
`
`Intervention.
`
`34.
`
`Alacritech denies the allegations of Paragraph 34 of the Complaint in
`
`Intervention.
`
`35.
`
`Alacritech denies the allegations of Paragraph 35 of the Complaint in
`
`Intervention.
`
`
`
`5
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`INTEL EX. 1233.005
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 6 of 59 PageID #: 4516
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`36.
`
`Alacritech denies the allegations of Paragraph 36 of the Complaint in
`
`Intervention.
`
`COUNT VI
`
`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 8,805,948
`
`37.
`
`Alacritech incorporates by reference Paragraphs 1-36 of this Answer as if set forth
`
`fully here.
`
`38.
`
`Alacritech denies the allegations of Paragraph 38 of the Complaint in
`
`Intervention.
`
`39.
`
`Alacritech denies the allegations of Paragraph 39 of the Complaint in
`
`Intervention.
`
`40.
`
`Alacritech denies the allegations of Paragraph 40 of the Complaint in
`
`Intervention.
`
`41.
`
`Alacritech denies the allegations of Paragraph 41 of the Complaint in
`
`Intervention.
`
`COUNT VII
`
`DECLARATORY JUDGMENT REGARDING U.S. PATENT NO. 9,055,104
`
`42.
`
`Alacritech incorporates by reference Paragraphs 1-41 of this Answer as if set forth
`
`fully here.
`
`43.
`
`Alacritech denies the allegations of Paragraph 43 of the Complaint in
`
`Intervention.
`
`44.
`
`Alacritech denies the allegations of Paragraph 44 of the Complaint in
`
`Intervention.
`
`
`
`6
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`INTEL EX. 1233.006
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 7 of 59 PageID #: 4517
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`45.
`
`Alacritech denies the allegations of Paragraph 45 of the Complaint in
`
`Intervention.
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`46.
`
`Alacritech denies the allegations of Paragraph 46 of the Complaint in
`
`Intervention.
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`REQUEST FOR RELIEF
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`Alacritech denies that Cavium is entitled to any of the relief requested in its Request for
`
`Relief.
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`DEMAND FOR JURY TRIAL
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`Alacritech admits that Cavium demands a trial by jury on all issues so triable in this
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`action. Alacritech also demands a trial by jury on all issues so triable.
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`DENIAL OF ANY REMAINING ALLEGATIONS
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`Except as specifically admitted herein, Alacritech denies any remaining allegations in
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`Cavium’s Complaint in Intervention.
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`
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`
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`7
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`INTEL EX. 1233.007
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 8 of 59 PageID #: 4518
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`COUNTERCLAIMS FOR PATENT INFRINGEMENT
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`In these counterclaims for patent infringement under 35 U.S.C. § 271 in response to
`
`Cavium, Inc.’s (“Cavium”) intervention in Case No. 2:16-cv-00695 to defend Dell, Plaintiff
`
`Alacritech, Inc. (“Alacritech”), by and through its undersigned counsel, complains and alleges as
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`follows against Intervenor Cavium, based on Alacritech’s own personal knowledge and upon
`
`information and belief with respect to Cavium’s actions:
`
`THE PARTIES
`
`1.
`
`Alacritech is a California corporation with its principal place of business at P.O.
`
`Box 20307, San Jose, California 95160.
`
`2.
`
`On information and belief, Cavium is a Delaware corporation with its principal
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`place of business in San Jose, California, and QLogic Corporation (“QLogic”) is a wholly-owned
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`subsidiary of Cavium.
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`NATURE OF THE ACTION
`
`3.
`
`This is a civil action for patent infringement arising under the patent laws of the
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`United States, 35 U.S.C. § 1, et seq.
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`4.
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`Cavium has infringed and continues to infringe, has contributed to and continues
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`to contribute to the infringement of, and has actively induced and continues to actively induce
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`others to infringe the following Alacritech patents: U.S. Patent Nos. 7,124,205; 7,237,036;
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`7,337,241; 7,673,072; 7,945,699; 8,131,880; 8,805,948; and 9,055,104 (collectively, the
`
`“Asserted Patents”). Alacritech is the legal owner by assignment of the Asserted Patents, which
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`were all duly and legally issued by the United States Patent and Trademark Office. Alacritech
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`seeks injunctive relief and monetary damages.
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`
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`8
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`INTEL EX. 1233.008
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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 9 of 59 PageID #: 4519
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`JURISDICTION AND VENUE
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`5.
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`This is a civil action for patent infringement arising under the patent laws of the
`
`United States, 35 U.S.C. § 1, et seq., including § 271. This Court has subject matter jurisdiction
`
`over this action under 28 U.S.C. §§ 1331 and 1338(a).
`
`6.
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`This Court has personal jurisdiction over Cavium because, among other reasons,
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`of Cavium’s filing of its Complaint in Intervention in this action, and Cavium’s Motion to
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`Intervene whereby Cavium expressly asked this Court for the opportunity to adjudicate its
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`declaratory judgment claims in this District, and because of this Court’s grant of Cavium’s
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`request.
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`7.
`
`In addition, Cavium regularly conducts business in Texas, including in this
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`District, and Cavium has committed and continues to commit direct and indirect acts of patent
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`infringement complained of herein within this District and elsewhere in Texas and the United
`
`States. For example, Cavium advertises, sells, and provides its products and services, including
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`infringing products and services complained of herein, directly to businesses and consumers in
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`this District. As such, Cavium has purposefully availed itself of the privilege of conducting
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`business within this District, has established sufficient minimum contacts with this District such
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`that Cavium should reasonably and fairly anticipate being haled into this Court, and has
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`purposefully directed activities at residents in this District, wherein at least a portion of the
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`claims alleged herein arise out of or are related to those activities.
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`8.
`
`Venue is proper in this District under 28 U.S.C. §§ 1391(b)-(c) and 1400(b) at
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`least because, as discussed above, Cavium is subject to personal jurisdiction in this District,
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`regularly conducts business in this District, and has committed and continues to commit direct
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`and indirect acts of patent infringement complained of herein within this District.
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`
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`9
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`INTEL EX. 1233.009
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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 10 of 59 PageID #: 4520
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`FACTUAL BACKGROUND
`
`Alacritech’s History
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`9.
`
`Alacritech was founded in 1997 by technology pioneer Larry Boucher, the creator
`
`and author of the original Small Computer System Interface (“SCSI”) specification and a
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`visionary, award-winning leader in server adapter, storage and networking technologies.
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`10. Mr. Boucher has more than 50 years of experience in the industry. Following a
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`twelve-year tenure in IBM’s Storage Division, he served as director of design services at Shugart
`
`Associates, where he developed the Shugart Associates System Interface (“SASI”) and then
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`SCSI, the industry standard for connecting storage and other peripherals to PCs and servers. In
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`1981, Mr. Boucher founded Adaptec, Inc., which became a global leader for host adapters and
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`other innovative storage solutions. After taking Adaptec public, Mr. Boucher founded Auspex
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`Systems, Inc., a manufacturer of enterprise servers, where he pioneered the networked file
`
`system design that is the basis of today’s network-attached storage (“NAS”) model. In 1997,
`
`Mr. Boucher founded Alacritech.
`
`11.
`
` Mr. Boucher and other innovators at Alacritech (including Peter Craft, Clive
`
`Philbrick, Stephen Blightman, David Higgen, and Daryl Starr) foresaw the convergence of
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`storage and networking and, as a result, the enormous processing demands that would be placed
`
`on host computer CPUs in order to move and store large quantities of data within a network,
`
`creating bottlenecks and reducing CPU processing power available for performing more
`
`substantive computing tasks. To solve this impending problem, the Alacritech team pioneered a
`
`series of fundamental network acceleration technologies, including but not limited to techniques
`
`for streamlining, bypassing and/or offloading aspects of conventional network protocol
`
`processing from host CPUs to “intelligent” network interface devices (sometimes called
`
`“NIDs”). These technologies are critical to modern network computing, dramatically increasing
`
`
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`10
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`INTEL EX. 1233.010
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`the speed and efficiency with which data is transferred and stored, while reducing the associated
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`processing burden imposed on host CPUs.
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`12. Working with industry partners, Alacritech released a number of network and
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`storage products related to the technologies it developed. For example, Alacritech produced a
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`series of Scalable Network Accelerators (also referred to as TCP Offload Engine (TOE) Network
`
`Interface Cards (TNICs)) and the ANX 1500, a sophisticated Network File System (NFS)
`
`Throughput Acceleration Appliance for use with Network-Attached Storage (NAS) systems.
`
`Alacritech’s Asserted Patents
`
`13.
`
`Network computing is ubiquitous in contemporary society. It enables the
`
`dissemination of information and digital content to people around the world, and it is a critical
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`component of the modern information economy. Many businesses have their own data centers
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`(made up of large numbers of networked servers) that they use for the remote storage,
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`management, processing, and/or distribution of their data. And a lucrative and rapidly-growing
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`industry has developed to provide cloud computing services, which essentially allow businesses
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`(and consumers) to offload their data to shared, third-party data centers.
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`14.
`
`However, as growing volumes of data are moved across networks of increasing
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`complexity and bandwidth, more and more of the processing power of the servers (and/or other
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`computers) in a network is consumed by simply moving and storing the data, greatly diminishing
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`the ability of the servers to perform other more substantive tasks. In addition, bottlenecks
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`develop when there is insufficient processing power available to transfer data, and the data
`
`cannot be moved as quickly or efficiently as desired. The Alacritech team foresaw these
`
`problems years ago and, to address them, they developed and patented a collection of innovative
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`network acceleration techniques that dramatically speed up the transfer and storage of data, and
`
`
`
`11
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`INTEL EX. 1233.011
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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 12 of 59 PageID #: 4522
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`decrease the corresponding processing demands on servers. Alacritech holds 71 United States
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`patents covering its groundbreaking inventions.
`
`15.
`
` Conventionally, computers connected over a network rely on a multi-layered
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`software architecture to transfer and store data. The architecture (also called a protocol stack) is
`
`generally based on one or more specifications and/or protocols, such as TCP/IP (a protocol suite
`
`including the Transmission Control Protocol (“TCP”) and Internet Protocol (“IP”)). Depending
`
`on the specifications and/or protocols at issue, the architecture may include up to seven different
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`layers described by the Open Systems Interconnection (OSI) model (listed, in order, from highest
`
`to lowest): the application layer, the presentation layer, the session layer, the transport layer, the
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`network layer, the data link layer, and the physical layer. Each software layer performs different
`
`functions associated with transferring and storing data.
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`16.
`
`In order to prepare data for transmission over a network, a sending computer must
`
`process the data through each layer of the protocol stack (working from highest to lowest). At
`
`each layer, the sending computer must perform further processing on the data resulting from
`
`processing by the previous layer, such as preparing and attaching a new header containing
`
`associated metadata. In the transport layer, the sending computer must also divide the data up
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`into units (e.g., packets) that are small enough to be transmitted over the network medium.
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`Likewise, a receiving computer must process incoming data through each layer of the same
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`protocol stack (working from lowest to highest) before it can be used by host applications on the
`
`receiving computer. At each layer, the receiving computer must perform further processing on
`
`the data resulting from processing by the previous layer, such as removing and processing an
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`additional header and, in the transport layer, combining multiple units of data together in
`
`
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`12
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`INTEL EX. 1233.012
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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 13 of 59 PageID #: 4523
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`memory. In both the sending and receiving operations, the computer may move and/or make a
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`new copy of the data each time another layer is processed.
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`17.
`
`This conventional approach for transferring and storing data within a network,
`
`while functional, is also slow and highly inefficient. Too much of the processing power of a
`
`computer’s CPU is wasted performing brute-force, layer-by-layer processing. Recognizing these
`
`inefficiencies early on, the Alacritech team developed sophisticated solutions that greatly
`
`improve upon the conventional approach. Central to these solutions is Alacritech’s pioneering
`
`use of dedicated NIDs to efficiently handle optimal portions of the processing associated with
`
`sending, receiving, and storing data, particularly for complicated multi-layer protocol suites that
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`use variable-length units of data with multiple headers, such as TCP/IP.
`
`18.
`
`Others in the industry attempted solutions that involved offloading essentially all
`
`processing associated with data communications to a NID, completely bypassing the host CPU,
`
`but they were unable to develop effective solutions that were suitable for TCP/IP and other more
`
`complicated protocol suites involving maintenance of state and variable-length data units with
`
`multiple headers, situations in which it is important that the host CPU remains involved in the
`
`processing. Still others in the industry attempted solutions involving offload of discrete TCP/IP
`
`processing tasks to a NID, but they were only able to offload very limited tasks, such as
`
`checksum processing, that did not significantly reduce the processing burden on the host CPU.
`
`19.
`
`Only Alacritech solved the problem of how to efficiently offload large portions of
`
`communications processing to NIDs implementing TCP/IP and other more complicated protocol
`
`suites. By offloading processing tasks to a dedicated NID in accordance with the solutions
`
`provided by the Asserted Patents, transfer of data between devices is accelerated and the host
`
`CPUs retain dramatically more processing power to perform other more substantive tasks,
`
`
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`13
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`INTEL EX. 1233.013
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`

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`without sacrificing the flexibility and control necessary to implement a complicated protocol
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`suite such as TCP/IP. Some of the innovative solutions and techniques developed by Alacritech
`
`and claimed by the Asserted Patents are discussed below.
`
`20.
`
`Some of the Asserted Patents provide solutions that increase efficiency of
`
`network computing by using multiple paths to process received data, whereby an intelligent NID
`
`uses criteria (e.g., provided by the host CPU) to determine whether incoming data should be
`
`processed directly by the NID (e.g., using a “fast-path”), or whether it should be passed to and
`
`processed by the host CPU in the conventional manner (e.g., using a “slow-path”). This
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`substantially reduces the burden on the host CPU, while retaining its flexibility and control for
`
`handling exceptions and other complicated processing tasks. And, because the NID is
`
`specifically designed to perform these operations (usually in hardware), it can perform them
`
`more efficiently and more quickly than a host CPU.
`
`21.
`
`Alacritech also pioneered techniques that allow NIDs to transfer and store data
`
`more quickly and efficiently. For example, some of the Asserted Patents provide solutions
`
`through which NIDs transfer data to and from host memory associated with upper layer (e.g.,
`
`application layer) software, without unit-by-unit lower-layer processing by the host CPU and
`
`without excessive intermediate copying of data in a series of intermediate buffers and/or caches.
`
`In this way, data can be transferred to the network or the host memory directly by the NID,
`
`without substantial processing by the host CPU or excessive intermediate copying, resulting in
`
`much faster and more efficient transfer and storage of data.
`
`22.
`
`As another example, some of the Asserted Patents provide solutions for more
`
`efficiently preparing and sending data over a network. For example, the NID uses information
`
`(e.g., provided by the host CPU) to divide data up into smaller units for transmission, and to
`
`
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`14
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`INTEL EX. 1233.014
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`

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`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 15 of 59 PageID #: 4525
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`generate and attach multiple lower-layer headers to the units of data. Moreover, it does so in
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`essentially a single operation, without the brute-force, layer-by-layer processing (and associated
`
`copying) required to carry out the same tasks under the conventional approach described above.
`
`These solutions greatly reduce processing by the host CPU associated with sending data, and
`
`they allow the NID to prepare and transmit data more efficiently.
`
`23.
`
`Similarly, some of the Asserted Patents provide solutions for more efficiently
`
`processing data received from a network. For example, the NID removes and processes the
`
`lower-layer headers from related units of data, without the brute-force processing of those
`
`headers required under the conventional approach described above. In addition, the NID may
`
`combine processed data units into a single payload of data that it delivers to host memory. These
`
`solutions greatly reduce processing by the host CPU associated with receiving and storing data,
`
`and they allow the NID to receive and process data more efficiently.
`
`24.
`
`The Asserted Patents are a product of Alacritech’s extensive research and
`
`development, reflecting groundbreaking innovations that are found throughout modern networks,
`
`especially large-scale and/or high-end networks such as those used in data centers.
`
`25.
`
`The technologies covered by Alacritech’s Asserted Patents are critical to
`
`fundamental network and/or storage acceleration techniques, including Large Segment Offload
`
`(“LSO”) (also called Large Send Offload or Generic Segmentation Offload), Receive Side
`
`Coalescing (“RSC”) (also called Receive Segment Coalescing, Large Receive Offload, or
`
`Generic Receive Offload), and TCP Offload Engine (“TOE”). They are also essential to many
`
`network and/or storage protocols that incorporate Remote Direct Memory Access (“RDMA”),
`
`such as the InfiniBand protocol, the RDMA over Converged Ethernet (“RoCE”) protocol, the
`
`Internet Wide Area RDMA Protocol (“iWARP”), the Internet Small Computer System Interface
`
`
`
`15
`
`INTEL EX. 1233.015
`
`

`

`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 16 of 59 PageID #: 4526
`
`(“iSCSI”) Extensions for RDMA (“iSER”) protocol, and the Server Message Block (“SMB”)
`
`Direct protocol.
`
`26. Without
`
`the benefit of Alacritech’s groundbreaking
`
`inventions, modern
`
`computing networks (especially large-scale and/or high-performance networks) would be
`
`significantly slower and less efficient (and, therefore, more expensive and less useful) than they
`
`are today.
`
`Cavium’s Infringing Technologies
`
`27.
`
`Cavium uses the Alacritech patented technologies that Alacritech asserted against
`
`Dell and the other Defendants in this consolidated action, which Cavium identified as the basis
`
`of its intervention across many different parts of its business, including in the network adapters,
`
`network controllers, and other network products that it makes, uses and/or sells, and in the
`
`associated consulting and support services that it provides to its customers. Cavium’s use of
`
`these technologies infringes the Asserted Patents directly, and also induces and contributes to
`
`infringement of the Asserted Patents by its customers.
`
`28.
`
`Cavium makes, uses, sells, and/or provides technical support for a variety of
`
`network products that infringe the Asserted Patents, including network controllers (e.g., QLogic
`
`FastLinQ 45000 Series Controllers), network cards (e.g., QLogic 57810S dual-port 10GbE SFP+
`
`converged network adapter), and other network interface devices. See, e.g., “QLogic Intelligent
`
`Ethernet
`
`Adapters,”
`
`available
`
`at
`
`http://www.qlogic.com/Products/adapters/Pages/
`
`IntelligentEthernetAdapters.aspx; “QLogic Converged Network Adapters,” available at
`
`http://www.qlogic.com/Products/adapters/Pages/ConvergedNetworkAdapters.aspx;
`
`“QLogic
`
`Converged Network Controllers,” available at http://www.qlogic.com/Products/Controllers/
`
`Pages/ConvergedNetworkControllers.aspx; “QLogic 10GbE High-Performance Adapters for
`
`
`
`16
`
`INTEL EX. 1233.016
`
`

`

`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 17 of 59 PageID #: 4527
`
`Dell PowerEdge Servers,” available at http://www.qlogic.com/OEMPartnerships/Dell/
`
`Documents/Converged/WhitePaper_QLogic_10GbE_High-Performance_Adapters_for_Dell.pdf.
`
`29.
`
`On information and belief, a large and growing portion of QLogic’s revenue is
`
`tied to the infringing network products and services described above. Without the benefit of
`
`Alacritech’s patented technologies, the infringing network products and services Cavium
`
`provides through its QLogic subsidiary would cost substantially more and/or suffer a significant
`
`degradation in performance, hurting Cavium’s business as a result.
`
`COUNT I
`
`INFRINGEMENT OF U.S. PATENT NO. 7,124,205
`
`30.
`
`Alacritech re-alleges and incorporates by reference each of the allegations of the
`
`paragraphs set forth above as though fully set forth herein.
`
`31.
`
`Alacritech is the current exclusive owner and assignee of all right, title, and
`
`interest in and to U.S. Patent No. 7,124,205 (the “’205 patent”), titled “Network Interface Device
`
`that Fast-Path Processes Solicited Session Layer Read Commands,” duly and legally issued by
`
`the United States Patent and Trademark Office on October 17, 2006, including the right to bring
`
`this suit for injunctive relief and damages. A true and correct copy of the ’205 patent is attached
`
`hereto as Exhibit A.
`
`32.
`
`33.
`
`The ‘205 patent is valid and enforceable.
`
`Cavium has directly infringed and is currently directly infringing the ‘205 patent
`
`by making, using, selling, offering for sale, and/or importing into the United States, without
`
`authority, products, methods, equipment, and/or services that practice one or more claims of the
`
`‘205 patent in connection with infringing RSC functionality, including but not limited to the
`
`QLogic 3000/3100 Series Intelligent Ethernet adapters, including without limitation the
`
`QLE3044-RJ, QLE3142-CU, QLE3142-LR, and QLE3142-SR; QLogic 3200 Series 10Gbps
`
`
`
`17
`
`INTEL EX. 1233.017
`
`

`

`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 18 of 59 PageID #: 4528
`
`Ethernet-to-PCIe Intelligent Ethernet Adapters, including without limitation the QLE3240-LR,
`
`QLE3240-SR, QLE3242-CU, QLE3242-LR, QLE3242-SR, and QLE3242-RJ; QLogic FastLinQ
`
`3400 Series 10Gb Ethernet Intelligent Ethernet Adapters, including without limitation the
`
`QLE3442-RJ-CK, QLE3442-CU-CK, QLE3440-CU-CK, QLE3440-SR-CK, QLE3442-SR-CK;
`
`QLogic 8200 Series 10Gbps Ethernet-to-PCIe Converged Network Adapters, including without
`
`limitation the QLE8240-CU-CK, QLE8242-CU-CK, QLE8240-SR-CK, and QLE8242-SR-CK;
`
`QLogic 8200 Series Multi-Port 1Gbps and 10Gbps Ethernet-to-PCIe Converged Network
`
`Controllers, including without limitation the cLOM8214, cLOM8214-KR, cLOM8214-RJ, and
`
`EP8214; QLogic 8300 Series 10Gbps Ethernet-to-PCIe Converged Network Adapters, including
`
`without limitation the QLE8360-CU-CK, QLE8362-CU-CK, QLE8360-SR-CK, QLE8362-SR-
`
`CK; QLogic 8300 Series Dual-Personality 16Gb Fibre Channel/10GbE to PCIe Converged
`
`Network Controllers, including without limitation the EP8324; QLogic FastLinQ 8400 Series
`
`10Gb Ethernet Converged Network Adapters, including without limitation the QLE8440-CU-
`
`CK, QLE8442-CU-CK, QLE8440-SR-CK, QLE8442-SR-CK; QLogic FastLinQ 45000 Series
`
`25Gb/40Gb/100Gb Intelligent Ethernet Adapters, including without limitation the QL45212-DE,
`
`QL45211HLCU-CK/SP/BK,
`
`QL45212HLCU-CK/SP/BK,
`
`QL45411HLSR-CK/SP/BK,
`
`QL45412HLSR-CK/SP/BK,
`
`QL45411HLCU-CK/SP/BK,
`
`QL45412HLCU-CK/SP/BK,
`
`QL45611HLSR-CK/SP/BK, and QL45611HLCU-CK/SP/BK; QLogic 57800S 1GB and
`
`10GBASE-T rNDC Dual-Port 1GbE RJ45 and Dual-Port 10GBASE-T Converged Network
`
`Daughter Card; QLogic 57800S Quad RJ45/SFP+/DA rNDC Dual-Port 1GbE RJ45 and Dual
`
`Port 10GbE SFP+/DA Converged Network Daughter Card; QLogic 57810S Dual 10GBASE-T
`
`Dual-Port 10GBASE-T PCIe Standup Converged Network Adapter; QLogic 57810S SFP+/DA
`
`Dual-Port 10GbE SFP+ or Direct Attach (DA) Converged Network Adapter; QLogic 57810S-K
`
`
`
`18
`
`INTEL EX. 1233.018
`
`

`

`Case 2:16-cv-00693-JRG-RSP Document 137 Filed 02/24/17 Page 19 of 59 PageID #: 4529
`
`Dual KR Blade NDC Dual-Port 10GbE Converged Network Daughter Card; QLogic 57810S-K
`
`Dual KR Blade Mezzanine Dual-Port 10GbE Converged Network Mezzanine Adapter; QLogic
`
`57840S-K Quad KR Blade NDC Quad-Port 10GbE Converged Network Daughter Card; QLogic
`
`57840S Quad 10GbE SFP+/DA rNDC Quad-Port 10GbE SFP+ or Direct Attach (DA)
`
`Converged Network Daughter Card; QLE8262 Dual-Port, 10Gbps Ethernet-to-PCIe®
`
`Converged Network Adapter; QMD8262-k Dual-Port, 10Gbps Blade Network Daughter Card;
`
`QME8242-k Dual-Port, 10Gbps Ethernet-to-PCIe® Adapter; QME8262-k Dual-Port, 10Gbps
`
`Ethernet-to-PCIe® Adapter; QLogic BCM57800S Dual-Port 1GbE and Dual Port 10GbE
`
`Converged Network Controller; QLogic BCM57810S/ BCM57811S 10Gbps Dual-Port iSCSI,
`
`FCoE, and PCI-SIG® SR-IOV x8 PCI Express® 2.0 Converged Contro