`U.S. Patent No. 7,337,241
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`________________
`
`INTEL CORPORATION, CAVIUM, LLC,
`WISTRON, INC, and DELL INC.
`Petitioner,
`
`v.
`
`ALACRITECH, INC.,
`Patent Owner
`
`________________
`
` Case IPR2017-01392
`
`U.S. Patent No. 7,337,241
`
`________________
`
`PATENT OWNER ALACRITECH, INC.’S NOTICE OF APPEAL
`
`
`
`
`
`
`
`Case No. IPR2017-01392
`U.S. Patent No. 7,337,241
`
`
`
`Director of the United States Patent and Trademark Office
`c/o Office of the General Counsel
`Madison Building East, Room 10B20
`600 Dulany Street
`Alexandria, VA 22314-5793
`
`
`Pursuant to 35 U.S.C. §§ 141(c) and 142 and 37 C.F.R. §§ 90.2(a) and 90.3,
`
`Patent Owner Alacritech, Inc. hereby appeals to the United States Court of Appeals
`
`for the Federal Circuit from the Patent Trial and Appeal Board’s Final Written
`
`Decision, entered on November 26, 2018 (Paper 81) (a copy of which is attached),
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`and from all underlying and related findings, orders, decisions, rulings, and opinions
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`that are adverse to Alacritech, Inc.
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`For the limited purpose of providing the Director with the information
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`requested in 37 C.F.R. § 90.2(a)(3)(ii), Alacritech, Inc. further indicates that the
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`issues on appeal may include, but are not limited to, (1) whether the Board erred in
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`determining the prior art rendered the challenged claims obvious, (2) whether the
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`Board erred in determining the prior art rendered Alacritech, Inc.’s proposed
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`substitute claims obvious, and (3) whether the Board erred in determining issues
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`regarding petitioners’ disclosure of real parties in interest.
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`Alacritech, Inc. further reserves the right to challenge any finding or
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`determination supporting or relating to the issues above, and to challenge other
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`issues decided adversely to Alacritech, Inc.
`
`
`
`1
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`
`
`Case No. IPR2017-01392
`U.S. Patent No. 7,337,241
`
`
`
`Pursuant to 37 C.F.R. § 90.2(a), Alacritech, Inc. is (1) filing a copy of this
`
`Notice of Appeal with the Director, (2) electronically filing a copy of this Notice
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`with the Federal Circuit, along with the requisite filing fee, and (3) filing this Notice
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`with the Board.
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`DATED: January 16, 2019
`
`
`
`
`
`
`
`
`
`Respectfully submitted,
`
`QUINN EMANUEL URQUHART &
`SULLIVAN, LLP
`
`By
`/s/ James M. Glass
`James M. Glass (Reg. No. 46,729)
`
`QUINN EMANUEL URQUHART &
`SULLIVAN, LLP
`51 Madison Avenue, 22nd Floor
`New York, NY 10010
`jimglass@quinnemanuel.com
`
`Attorney for Patent Owner - Alacritech,
`Inc.
`
`2
`
`
`
`Case No. IPR2017-01392
`U.S. Patent No. 7,337,241
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`
`
`CERTIFICATE OF SERVICE
`
`Pursuant to 37 C.F.R. § 90.2(a)(1), on January 16, 2019 the foregoing Notice
`
`of Appeal was filed electronically with the Board in accordance with 37 C.F.R. §
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`42.6(b)(1), and mailed to the Director via Priority Mail Express in accordance with
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`37 C.F.R. §§ 1.10 and 104.2 at the following address:
`
`Director of the U.S. Patent and Trademark Office
`c/o Office of the General Counsel
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
`Pursuant to 37 C.F.R. § 90.2(a)(2); Fed. R. App. P. 15; and Fed. Cir. R. 15,
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`25, and 52, on January 16, 2019 the foregoing Notice of Appeal was electronically
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`filed with the Court of Appeals for the Federal Circuit via CM/ECF with requisite
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`fees paid via pay.gov. Pursuant to Fed. Cir. R. 15(a)(1), one copy of this Notice of
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`Appeal is being filed by hand with the Clerk’s Office of the Federal Circuit on
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`January 16, 2019.
`
`Pursuant to 37 C.F.R. § 42.6(e) and the parties’ agreement to accept electronic
`
`service, on January 16, 2019 the foregoing Notice of Appeal was served via e-mail
`
`on the following attorneys for Petitioners:
`
`garland.stephens@weil.com
`sutton.ansley@weil.com
`anne.cappella@weil.com
`justin.constant@weil.com
`melissa.hotze@weil.com
`
`
`
`3
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`
`
`
`Case No. IPR2017-01392
`U.S. Patent No. 7,337,241
`
`adrian.percer@weil.com
`christopher.douglas@alston.com
`kirk.bradley@alston.com
`benjamin.weed.ptab@klgates.com
`erik.halverson@klgates.com
`david.xue@rimonlaw.com
`karinehk@rimonlaw.com
`
`DATED: January 16, 2019
`
`
`
`
`Respectfully submitted,
`
`By
`/s/ James M. Glass
`James M. Glass (Reg. No. 46,729)
`
`QUINN EMANUEL URQUHART &
`SULLIVAN, LLP
`51 Madison Avenue, 22nd Floor
`New York, NY 10010
`jimglass@quinnemanuel.com
`
`Attorney for Patent Owner - Alacritech,
`Inc.
`
`
`
`
`
`4
`
`
`
`Trials@uspto.gov
`571-272-7822
`
`Paper 81
`Entered: November 26, 2018
`
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`INTEL CORPORATION, CAVIUM, LLC,
`WISTRON, INC, and DELL INC.
`Petitioner,
`
`v.
`
`ALACRITECH, INC.,
`Patent Owner.
`____________
`
`Case IPR2017-013921
`Patent 7,337,241 B2
`____________
`
`
`
`Before STEPHEN C. SIU, DANIEL N. FISHMAN, and
`CHARLES J. BOUDREAU, Administrative Patent Judges.
`
`FISHMAN, Administrative Patent Judge.
`
`
`
`
`
`
`FINAL WRITTEN DECISION
`35 U.S.C. § 318(a) and 37 C.F.R. § 42.108
`
`
`
`1 Cavium, Inc., which filed a Petition in Case IPR2017-01728 (later renamed
`Cavium, LLC (Paper 76)), Wistron, Inc., which filed a Petition in Case
`IPR2018-00328, and Dell Inc., which filed a Petition in Case IPR2018-
`00372, have been joined as petitioners in this proceeding.
`
`
`
`IPR2017-01392
`Patent 7,337,241 B2
`
`I. INTRODUCTION
`Intel Corporation (“Petitioner” or “Intel”) filed a Corrected Petition
`(Paper 4, “Petition” or “Pet.”) requesting inter partes review of all claims
`(1–24) of U.S. Patent No. 7,337,241 B2 (“the ’241 patent,” Ex. 1001)
`pursuant to 35 U.S.C. §§ 311 et seq. Alacritech, Inc. (“Patent Owner”) filed
`a Preliminary Response. Paper 10 (“Prelim. Resp.”).
`On November 30, 2017, based on the record before us at that time, we
`instituted an inter partes review of all claims (1–24) and all grounds.
`Paper 11 (“Decision” or “Dec.”).
`Patent Owner filed a Corrected Response (Paper 34, “PO Resp.”) and
`Petitioner filed a Reply (Paper 45, “Reply”).
`Patent Owner also filed a Contingent Motion to Amend (Paper 25,
`“Motion” or “Mot.”) to which Petitioner filed an Opposition (Paper 40,
`“Opposition” or “Opp.”). Patent Owner then filed a Reply in support of its
`Motion (Paper 46, “PO Reply”) and Petitioner filed a Sur-Reply to Patent
`Owner’s Reply (Paper 54, “Sur-Reply”). Patent Owner’s Motion is
`contingent on any of the challenged claims being found to be unpatentable.
`Mot. 1. We address Patent Owner’s Motion to Amend below.
`Each party filed a respective Motion to Exclude certain evidence of
`the other party. Papers 58, 59. Each party filed a respective Opposition to
`the other party’s Motion to Exclude (Papers 61, 62) and a respective Reply
`in support of its Motion to Exclude (Papers 64, 65). We address these
`motions below.
`Upon consideration of the complete record, we are persuaded by a
`preponderance of the evidence that claims 1–24 are unpatentable.
`Furthermore, we deny Patent Owner’s Motion to Amend, deny Petitioner’s
`
`2
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`IPR2017-01392
`Patent 7,337,241 B2
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`Motion to Exclude, deny-in-part and dismiss-in-part Patent Owner’s Motion
`to Exclude, and we grant Patent Owner’s Motion to Seal.
`
`
`A. Related Matters
`We are informed that the ’241 patent is involved in the following
`litigations: Alacritech, Inc. v. CenturyLink, Inc., Case No. 2:16-cv-00693-
`JRG-RSP (E.D. Tex.); Alacritech, Inc. v. Wistron Corp., Case No. 2:16-cv-
`00692-JRG-RSP (E.D. Tex.); and Alacritech, Inc. v. Dell Inc., Case No.
`2:16-cv-00695-RWS-RSP (E.D. Tex.). Pet. 3; Paper 6, 1.
`
`
`B. The ’241 Patent
`The ’241 patent describes a system and method for accelerating data
`transfer between a network and storage unit. Ex. 1001, Abstract. An
`embodiment of the ’241 uses the Transmission Control Protocol (“TCP”)
`and Internet Protocol (“IP”). Id. at 3:8-10. Another transport protocol is
`User Datagram Protocol (“UDP”). In particular, the claimed invention of
`the ’241 patent relates to fast-path processing in which processing for
`headers of a layered network protocol (e.g., TCP/IP or UDP/IP) is offloaded
`from the host computer to an intelligent network interface. See id. at 5:18–
`38, Fig. 24. Specifically, the intelligent network interface card (“INIC”)
`includes accelerated processing features, “[t]he accelerated processing
`includes employing representative control instructions for a given message
`that allow data from the message to be processed via a fast-path which
`accesses message data directly at its source [in the host computer] or
`delivers it directly to its intended destination [in the host computer].” Id. at
`5:18–22.
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`3
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`Patent 7,337,241 B2
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`According to the ’241 patent, its invention is based on the “FreeBSD”
`TCP/IP protocol stack. Id. at 37:38–49. The FreeBSD protocol stack is a
`widely and freely distributed package of software source code that
`implements the TCP/IP (and other) protocols. “The bulk of the protocol
`stack is based on the FreeBSD TCP/IP protocol stack.” Id. at 48:13–15.
`“The base for the receive processing done by the INIC . . . is the fast-path or
`‘header prediction’ code in the FreeBSD release.” Id. at 74:56–59. To
`simplify the use of that software on the INIC, the ’241 patent discloses an
`embodiment that avoids handling of certain complexities in the TCP/IP
`protocols. Id. at 37:50–38:62. According to the ’241 patent, the
`embodiment results in two modes of operation—a slow path in which the
`INIC operates as a “typical dumb” network interface and a fast path for
`processing data that does not fall into one of the exception conditions
`excluded from its implementation. Id. at 38:63–39:2. “In the slow path
`case, network frames are handed to the system at the MAC layer and passed
`up through the host protocol stack like any other network frame. In the fast
`path case, network data is given to the host after the headers have been
`processed and stripped.” Id. at 39:2–7.
`
`
`C. Illustrative Claims
`Claims 1, 9, and 17 are the independent claims of the ’241 patent.
`Claims 1 and 9, reproduced below, are illustrative of the claimed subject
`matter:
`
`1. A method for network communication, the method
`comprising:
`
`4
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`receiving a plurality of packets from the network, each of
`the packets including a media access control layer header, a
`network layer header and a transport layer header;
`processing the packets by a first mechanism, so that for
`each packet the network layer header and the transport layer
`header are validated without an interrupt dividing the processing
`of the network layer header and the transport layer header;
`sorting the packets, dependent upon the processing, into
`first and second types of packets, so that the packets of the first
`type each contain data;
`sending, by the first mechanism, the data from each packet
`of the first type to a destination in memory allocated to an
`application without sending any of the media access control layer
`headers, network layer headers or transport layer headers to the
`destination.
`Id. at 98:32–49.
`
`9. A method for communicating information over a
`network, the method comprising:
`obtaining data from a source in memory allocated by a first
`processor;
`dividing the data into multiple segments;
`prepending a packet header to each of the segments by a
`second processor, thereby forming a packet corresponding to
`each segment, each packet header containing a media access
`control layer header, a network layer header and a transport layer
`header, wherein the network layer header is Internet Protocol
`(IP), the transport layer header is Transmission Control Protocol
`(TCP) and the media access control layer header, the network
`layer header and the transport layer header are prepended at one
`time as a sequence of bits during the prepending of each packet
`header; and
`transmitting the packets to the network.
`Id. at 99:19–35.
`
`
`5
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`D. Asserted Grounds Of Unpatentability
`Petitioner asserts that claims 1–24 are unpatentable based on the
`following grounds (Pet. 14–15):
`
`Claims challenged
`1–8, 18, 22, and 23
`
`9–17, 19–21, and 24
`
`Basis
`§ 103
`
`§ 103
`
`Reference(s)
`Erickson,2 Tanenbaum,3
`and Alteon4
`Erickson and Tanenbaum
`
`Petitioner additionally contends that the Specification does not
`provide adequate structural disclosure for certain terms recited in claims 1–
`5, 7, 8, 17, 20, and 23. See Pet. 26, 32–34, 53 n.8. Inter partes review
`proceedings are limited to patentability challenges based on prior art patents
`and printed publications under 35 U.S.C. §§ 102 and 103. See 35 U.S.C.
`§ 311(b); 37 C.F.R. § 42.104(b)(2). Accordingly, we are not authorized in
`inter partes review proceedings to address indefiniteness issues, which arise
`instead under 35 U.S.C. § 112, second paragraph.
`Petitioner relies on the testimony of Robert Horst Ph.D. (Exs. 1003,5
`1210, 1223) in support of its assertions. Patent Owner relies on the
`
`
`2 U.S. Patent No. 5,768,618 (“Erickson,” Ex. 1005).
`3 Andrew S. Tanenbaum, Computer Networks, Third Edition, 1996
`(“Tanenbaum,” Ex. 1006).
`4 Alteon Networks Inc., Gigabit Ethernet Technical Brief: Achieving End-to-
`End Performance, 1996 (“Alteon,” Ex. 1033).
`5 We note the apparent, harmless, typographic error in Exhibit 1003 in which
`most pages include a header referring to another patent (7,237,036 rather
`than the ’241 patent) and appear to refer to the Declaration as the “Lin
`Decl.” Ex. 1003, 6–103.
`
`6
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`Patent 7,337,241 B2
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`testimony of Kevin Almeroth Ph.D. (Exs. 2026, 2305) in support of its
`assertions.
`
`
`II. DISCUSSION
`A. Legal Principles
`1. Obviousness
`A patent claim is unpatentable under 35 U.S.C. § 103(a) if the
`differences between the claimed subject matter and the prior art are “such
`that the subject matter as a whole would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said
`subject matter pertains.” KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
`(2007). The question of obviousness is resolved on the basis of underlying
`factual determinations, including (1) the scope and content of the prior art;
`(2) any differences between the claimed subject matter and the prior art; (3)
`the level of skill in the art; and (4) objective evidence of nonobviousness,
`i.e., secondary considerations. Graham v. John Deere Co., 383 U.S. 1, 17–
`18 (1966).
`
`
`Level of Ordinary Skill in the Art
`2.
`Petitioner argues a person of ordinary skill in the art related to the
`’241 patent would have a Bachelor’s Degree in computer engineering,
`computer science, or electrical engineering, plus at least five years of
`experience in computer architecture, network design, network protocols, and
`software and hardware development. Pet. 38 (citing Ex. 1003 ¶ 18–19).
`Patent Owner’s definition of the person of ordinary skill is similar to
`Petitioner’s definition suggesting “several” years of experience rather than a
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`Patent 7,337,241 B2
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`specific number of years and argues “[a]ny differences between Petitioners’
`proposed level of ordinary skill and that proposed by Patent Owner would
`not have any bearing on the analysis presented in this Response.” PO Resp.
`8.
`
`We are persuaded by Petitioner’s definition of the level of ordinary
`skill in the art and we find this definition is commensurate with the level of
`ordinary skill in the art as reflected in the prior art. See Okajima v.
`Bourdeau, 261 F.3d 1350, 1355 (Fed. Cir. 2001) (“[T]he absence of specific
`findings on the level of skill in the art does not give rise to reversible error
`where the prior art itself reflects an appropriate level and a need for
`testimony is not shown.” (internal quotation marks omitted)); In re GPAC
`Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995).
`Therefore, we define the level of ordinary skill in the art, at the time
`of the ’241 patent, to include a Bachelor’s degree in computer engineering or
`computer science and at least five years of experience in network design or
`network protocols.
`
`3. Claim Construction
`In an inter partes review filed before November 13, 2018, as is the
`case here, we construe claim terms in an unexpired patent according to their
`broadest reasonable construction in light of the specification of the patent in
`which they appear. 37 C.F.R. § 42.100(b). Consistent with the broadest
`reasonable construction, claim terms are presumed to have their ordinary and
`customary meaning as understood by a person of ordinary skill in the art in
`the context of the entire patent disclosure. In re Translogic Tech., Inc., 504
`F.3d 1249, 1257 (Fed. Cir. 2007). Only terms that are in controversy need to
`be construed and only to the extent necessary to resolve the controversy.
`
`8
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`Patent 7,337,241 B2
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`See Wellman, Inc. v. Eastman Chem. Co., 642 F.3d 1355, 1361 (Fed. Cir.
`2011); Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803 (Fed.
`Cir. 1999).
`In our Decision on Institution, we determined that it was not necessary
`to provide an express interpretation of any claim terms. Dec. 5. In its
`Response, Patent Owner agrees that no construction is necessary. PO Resp.
`22–23. Petitioner’s Reply does not address any claim construction issues.
`Therefore, we discern no reasons to depart from our determination in our
`Decision on Institution that no express claim construction is necessary.
`
`
`B. Cited Prior Art References
`
`1. Overview Of Erickson (Ex. 1005)
`Erickson is directed to a “method of controlling an input/output (I/O)
`
`device connected to a computer to facilitate fast I/O data transfers.”
`Ex. 1005, Abstract.
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`Figure 3 of Erickson is reproduced below:
`
`
`Erickson’s Figure 3, reproduced above, depicts data flow in accordance with
`Erickson’s invention. As shown in Figure 3, slow application 306 uses
`normal stream processing 308 and pass-through driver 310 to send
`information to I/O device adapter 314 to commodity interface 322. Id. at
`4:53–61. Alternatively, fast applications 302 and 304 send information
`directly to I/O adapter 314 via “virtual hardware” 316 and 318 avoiding the
`overhead of the streams processing and pass-through driver. Id. at 4:61–5:3.
`In particular, Erickson discloses that I/O device adapter 314 and a user
`process on a host computer share access to a portion of the user’s virtual
`memory space on the host computer. Id. at 1:67–2:7. When applied in the
`context of network communications, I/O adapter 314 (i.e., a “network
`interface device”) and the user process pre-negotiate certain fields that will
`be common to all data transfers to be made—i.e., fields in the various
`headers used in layered network protocols such as TCP/IP or UDP/IP over
`an Ethernet medium. Id. at 6:42–7:4. To transmit a datagram, the user
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`process programs registers of the I/O adapter to identify the data to be
`transmitted, the registers and the identified data accessible through the
`shared virtual memory. Id. at 7:5–32. The I/O adapter then combines the
`identified data with the pre-negotiated fields of the various headers needed
`for network transmission, adjusts fields in the pre-negotiated header that
`vary for each datagram, and transmits the completed packet including the
`completed headers and the user-supplied data. Id. at 7:38–8:26.
`Erickson’s Figure 4 is reproduced below.
`
`
`Erickson’s Figure 4, reproduced above, depicts processes 402 and 404
`transmit and receive information from interconnect 410 through direct
`application interface (“DAI”) 408. Id. at 5:6–11. Information from
`interconnect 410 is routed directly to a process (402 or 404) through virtual
`hardware and register rather than through a traditional operating system
`interface 406. Id. at 5:11–15.
`
`11
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`
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`2. Overview Of Tanenbaum (Ex. 1006)
`Tanenbaum describes general principles, as well as detailed aspects,
`of data transmission in computer networks, including TCP/IP and UDP/IP
`protocols. See generally Ex. 1006.
`
`
`3. Alteon Reference (Ex. 1033)
`a. Printed Publication
`An inter partes review may only request review under 35 U.S.C.
`§§ 102 and 103 and only based on “prior art consisting of patents or printed
`publications.” 35 U.S.C. § 311(b); 37 C.F.R. § 42.104(b)(2). Before
`reaching the merits of Petitioner’s obviousness contentions regarding
`unpatentability, some of which are based, in part, on Alteon, we must
`determine as a threshold issue whether Alteon is a prior art printed
`publication under 35 U.S.C. § 311(b). It is Petitioner’s burden to prove that
`it is, as Petitioner bears the burden of proving unpatentability by a
`preponderance of the evidence. See 35 U.S.C. § 316(e).
`Petitioner argues “Alteon was published on or before January 26,
`1997 and is therefore at least § 102(a) prior art.” Pet. 40 (citing Ex. 1087
`(the “Butler Declaration”).6
`Patent Owner argues Petitioner has failed to meet its burden to show
`Alteon is available as a prior art printed publication in this preliminary
`proceeding. PO Resp. 27–31. Specifically, Patent Owner argues the
`
`
`6 This assertion appears to be in error because Mr. Butler’s Declaration
`identifies the archival date in www.archive.org as January 13, 1997. See
`Ex. 1087, 1 (¶ 5), 4.
`
`12
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`Petition fails to explain how a “crawler,” referenced in Mr. Butler’s
`Declaration, automatically located a copy of the Alteon technical brief
`document. Id. at 28–29. Patent Owner further argues the fact that a crawler
`can locate the Alteon technical brief does not explain how an ordinarily
`skilled artisan could similarly locate the reference by exercising reasonable
`diligence. Id. at 29 (citing Ex. 2026 ¶ 106). Thus, Patent Owner contends
`the Petition fails to explain how an interested person of ordinary skill would
`have located the Alteon document and notes with approval some weaknesses
`the Board identified in the Petition regarding sufficiency of the evidence
`relating to printed publication status of Alteon. Id. at 29–30 (citing Dec. 8–
`9). Patent Owner further contends Petitioner fails to even allege that Alteon
`was ever meaningfully indexed such that interested ordinarily skilled
`artisans would have been able to locate the reference. Id. at 30–31. Still
`further, Patent Owner contends that a “crawler” has far greater faculties to
`locate web pages than does a human and, thus, asserts that the fact that a
`crawler at archive.org can locate a web page does not evidence that an
`ordinarily skilled artisan would have been able to locate the web page by
`exercising reasonable diligence at the relevant time. Id. at 29 (citing
`Ex. 2026 ¶ 106).
`In its Reply, Petitioner initially points out that Patent Owner had cited
`Alteon during prosecution as evidence that it was publicly accessible to
`Patent Owner at the time of the ’241 patent. Reply 2 (citing Ex. 1002, 309–
`10). Furthermore, Petitioner argues Dr. Horst testifies that Alteon was
`accessible via a number of hyperlinks at www.alteon.com and testifies that
`search engines at the time of the ’241 patent, similar to archive.org, used
`
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`crawlers to locate web pages as potential search results for users. Id. at 3
`(citing Ex. 1223 ¶¶ 23–28).
`Our Decision on Institution also noted that it was unclear whether
`“Exhibit A” in Mr. Butler’s Declaration (Ex. 1087) was the same document
`as the Alteon reference filed as Exhibit 1033. Dec. 8–9. Dr. Horst further
`testifies that he examined the Alteon reference (Ex. 1033) and “Exhibit A”
`attached to Mr. Butler’s Declaration (Ex. 1087) and determined they were
`the same. Ex. 1210 ¶ 16.
`Patent Owner’s assertions comparing the capability of a human to
`search for web pages to that of a web crawler computer program are
`inapposite. Petitioner asserts,
`Moreover, like the Internet Archive, search engines also
`use crawlers to index web pages for searching. If the Internet
`Archive could find it, so could a search engine, such as Altavista.
`Ex. 1223, ¶¶ 24-25. A POSA would certainly have relied on
`search engines in 1997 to locate relevant art. Ex. 1223, ¶ 25.
`Reply 3.
`We agree. Search engines, such as Altavista, were operable at the
`time of the ’241 patent and at the time archive.org recorded a copy of the
`alteon.com web pages—including the URL that stored the technical writeup
`that is Exhibit 1033. Thus, we are persuaded by Mr. Butler’s Declaration
`that his attached “Exhibit A” was locatable by a web crawler for archive.org.
`We are further persuaded that Alteon was publicly accessible at the time of
`the ’241 patent’s priority date by Petitioner’s observation that Patent Owner
`cited Alteon during prosecution.
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`For at least the above reasons, we are persuaded by a preponderance
`of the evidence that Alteon was publicly accessible, and hence a printed
`publication, at the time of the ’241 patent.
`
`
`b. Overview Of Alteon
`Alteon describes general principles of operation of a high-speed
`Ethernet I/O adapter. See Ex. 1033, 5–7. In particular, Alteon discloses a
`problem of prior Ethernet I/O adapters that required multiple interrupts in
`the processing for each packet, thus, consuming resources of the host
`computer. See id. at 20. Alteon purports to address this problem using an
`intelligent network I/O adapter that “allows a single interrupt to be issued
`[(from the adapter to a host system)] for multiple data packets.” Id. at 22.
`
`
`C. Alleged Indefiniteness
`Claims 1–8 and 17–24 recite a “first mechanism” and/or a “second
`mechanism.” Petitioner argues “mechanism” is a nonce word that fails to
`convey sufficient structure and, thus, these terms should be construed under
`35 U.S.C. § 112(6) as means plus function elements. Pet. 26. Petitioner
`further argues the ’241 patent Specification fails to disclose any
`corresponding structure for the functions of these elements and, thus, these
`claims are invalid as indefinite under 35 U.S.C. § 112(2).7 Pet. 26–33.
`Indefiniteness, however, is not an issue for an inter partes review.
`
`7 Petitioner specifically identifies only claims 1–5, 7, 8, 17, 20, and 23 as
`indefinite under this reasoning. Pet. 26. However, claims 1 and 17 are
`independent claims from which all of claims 2–8 and 18–24 depend (directly
`or indirectly). The dependent claims incorporate all limitations of the claims
`from which they depend. Because Petitioner has not presented argument or
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`In our Decision on Institution, we determined that the apparent
`novelty of the claimed invention lies in the performance of the steps to
`exchange information between two structures—i.e., between any two
`“mechanisms” capable of performing the recited steps. Dec. 10–11. All
`claims of the ’241 patent are method claims and the method steps are
`agnostic regarding the particular type of mechanism involved in each step.
`Instead, the term “mechanism” bears weight in the claim only to the extent
`that certain recited processing of the method steps involve one or the other
`recited mechanism or involve both mechanisms. Patent Owner does not
`dispute that the prior art discloses “mechanisms.” Therefore, particular
`structural features/limitations of each mechanism are not dispositive with
`respect to our determination here of unpatentability.
`We are not persuaded claims 1–8 and 17–24 should be interpreted in
`accordance with 35 U.S.C. § 112(6) and we do not reach Petitioner’s
`assertions regarding indefiniteness under § 112.
`
`
`D. Obviousness Over Erickson, Tanenbaum, And Alteon
`Petitioner contends claims 1–8, 18, 22, and 23 are unpatentable under
`35 U.S.C. § 103(a) as obvious over the combination of Erickson,
`Tanenbaum, and Alteon and contends that claims 9–17, 19–21, and 24 are
`unpatentable under 35 U.S.C. § 103(a) as obvious over the combination of
`Erickson and Tanenbaum. See Pet. 49–92. In general, the combination of
`Erickson and Tanenbaum is relied upon to disclose fast-path processing for
`
`
`evidence that claims 6, 18, 19, 21, 22, and 24 recite any additional structure
`to exclude them from its argument of indefiniteness, Petitioner’s argument
`regarding indefiniteness applies to all of claims 1–8 and 17–24.
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`transmitting information to a network (i.e., claims 9–17, 19–21, and 24) and
`Alteon is added to the combination for those claims that include receiving
`transmissions from a network using fast-path processing (i.e., claims 1–8,
`18, 22, and 23) as well as claims that include limitations relating to
`interrupts (1–8 and 18).
`
`
`1. Independent Claim 1
`Independent method claim 1 is directed to receiving information from
`a network using fast-path processing. Petitioner argues Erickson discloses
`the step of “receiving a plurality of packets . . .” as receiving Ethernet
`packets having a physical (e.g., media access control or “MAC”) layer
`header, a network (e.g., “IP”) layer header, and a transport (e.g., “UDP” or
`“TCP”) layer header. Pet. 50–51 (citing Ex. 1005, Fig. 6, 6:48–56; Ex. 1003
`Appendix A-2). Petitioner notes that, although Erickson’s Figure 6 is
`specific to the UDP transport protocol, Erickson expressly discloses its
`invention is equally applicable to other protocols including the TCP
`transport protocol. Id. at 52 (Ex. 1005, 5:47–51).
`Petitioner argues the step of “processing the packets . . . [so] the
`network layer header and the transport layer header are validated without an
`interrupt dividing the processing of [the headers]” is disclosed by Erickson’s
`I/O adapter executing scripts that validate the network and transport layer
`headers by computing checksums for each such header. Id. at 53–54 (citing
`Ex. 1005, 4:18–23, 7:50–64, 8:10–25; Ex. 1003 Appendix A-5). Petitioner
`acknowledges Erickson does not disclose the “without an interrupt”
`limitation of claim 1 but asserts Alteon in the proposed combination
`discloses this limitation by teaching a single interrupt of a host system is
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`generated by an intelligent network interface for the processing of multiple
`packets. Id. at 54–55 (citing Ex. 1033, 15, 22, 23).
`Petitioner argues Erickson and Alteon are both concerned with
`reducing intervention processing by a host computer for each I/O operation
`and, therefore, contends the ordinarily skilled artisan would have been
`motivated to combine Alteon with Erickson because Alteon’s “single
`interrupt processing reduces the need for the host computer to insert itself
`into the process.” Id. at 48.
`The Petition next argues Erickson in combination with Tanenbaum
`discloses the step of “sorting the packets . . . into first and second types of
`packets, so that the packets of the first type each contain data.” Id. at 55–56
`(citing Ex. 1006, 584–85). Specifically, the Petition asserts Tanenbaum
`discloses checking if packets meet certain criteria for fast-path processing
`and, thus, sorts packets according to claim 1. Id.
`Petitioner argues Erickson incorporates an earlier version of
`Tanenbaum (1981 which Petitioner refers to as “Tanenbaum81”) and, thus,
`provides express motivation to combine Erickson with the teachings of the
`then-current version of Tanenbaum (1996 which Petitioner refers to as
`“Tananbaum96”). Id. at 44 (citing Ex. 1005, 4:34–43). Petitioner then
`argues the ordinarily skilled artisan would have been motivated to seek out
`the then-current version of Tanenbaum (e.g., Tanenbaum as published in
`1996 (Ex. 1006)) at the time of the ’241 patent priority. Id. Petitioner
`contends Tanenbaum and Erickson both relate to fast-path processing of
`packets and, although Erickson discloses its applicability to the UDP
`(transport) protocol (Ex. 1005, 5:47–51), Tanenbaum expressly discloses
`fast-path processing for TCP protocol. Id. at 45–47.
`
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`Petitioner contends the proposed combination also discloses the step
`of “sending . . . the data from each packet of the first type to a destination in
`m