`(10) Patent No.:
`a2) United States Patent
`Sharpetal.
`(45) Date of Patent:
`Feb. 24, 2009
`
`
`US007496689B2
`
`(56)
`
`wo
`
`(54) TCP/IP OFFLOAD DEVICE
`
`(75) Tnventors: Colin C. Sharp, Santa Cruz, CA (US);
`Clive M.Philbrick, San Jose, CA (US);
`Daryl D.Starr, Milpitas, CA (US);
`Stephen E. J. Blightman, San Jose, CA
`(US)
`(73) Assignee: Alacritech, Inc., San Jose, CA (US)
`(*) Notice:
`Subjectto any escraimer. the termors
`rec Wshbyb "930.d. yusted under
`S.C.
`154(b)
`by
`ays:
`(21) Appl. No.: 10/420,364
`:
`Filed:
`
`
`
`(2006.01)
`(2006.01)
`(2006.01)
`3006.01
`(2006.01)
`
`References Cited
`U.S. PATENT DOCUMENTS
`4,366,538 A
`12/1982 Johnson et al.
`............. 364/200
`(Continued)
`FOREIGN PATENT DOCUMENTS
`WO 98/19412
`5/1998
`(Continued)
`OTHER PUBLICATIONS
`Internet pages entitled “Hardware Assisted Protocol Processing”,
`(which Eugene Feinberisworking on), | page, printedNov. 25, 1998.
`(Continued)
`Primary Examiner—Ario Etienne
`Assistant Examiner—Philip J Chea
`p
`(74) Attorney, Agent, or Firm—Mark Lauer; Silicon Edge
`Apr. 22, 2003
`(22)
`Law
`G
`LLP
`awe
`Prior Publication Data
`(65)
`
`
`US 2004/0062245 Al—Apr. 1, 2004 (57) ABSTRACT
`,
`A TCP/IP offload network interface device (NID) is inte-
`Related U.S. Application Data
`grated with a processing device that executes a stack. The
`(60) Provisional application No. 60/374,788, filed on Apr.
`TCP/IP offload NID caneither be a full TCP/IP offload device
`22. 2002
`—
`or a partial TCP/IP offload device. Commontypesofpackets
`; are processed by the NID inafast-path such that the stack is,
`
`Int. Cl.
`(51)
`offloaded ofTCP andIP protocol processing tasks. A hash is
`GO6F 15/173
`made from the packet header and is pushed onto a queue. The
`GO6F 15/16
`hash is later popped off the queue andis used to identify an
`GO6F 12/00
`associated TCB number from a hash table. A mechanism
`HOAL 15/00
`caches hash buckets in SRAM andstores other hash buckets
`in DRAM. An “IN SRAM CAM”is used to determine
`whether the TCBassociated with the identified TCB number
`is cached in SRAM or whetherit must be moved from DRAM
`into the SRAM cache. A lock table and a “lock table CAM”
`mechanism is disclosed that facilitates multiple processors
`working on the protocol processing of a single packet.
`
`(52) US. Ch cece 709/250; 709/238; 711/108;
`370/463
`
`(58) Field of Classification Search ................. 709/238,
`709/250; 711/108; 370/463; 375/219
`See application file for complete search history.
`
`21 Claims, 72 Drawing Sheets
`
`|
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`| HOST BUS
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`LOCAL BUS
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`PROCESSOR THAT
`IMPLEMENTS
`PROTOCOL STACK
`
`INTEL Ex. 1258.001
`
`INTEL Ex. 1258.001
`
`
`
`US 7,496,689 B2
`
`Page 2
`
`U.S. PATENT DOCUMENTS
`
`4,589,063 A
`4,700,185 A
`4,991,133 A
`5,056,058 A
`5,058,110 A
`5,097,442 A
`5,163,131 A
`5,212,778 A
`5,280,477 A
`5,289,580 A
`5,303,344 A
`5,412,782 A
`5,418,912 A
`5,448,566 A
`5,485,455 A
`5,485,460 A
`5,485,579 A
`5,506,966 A
`5,511,169 A
`5,517,668 A
`5,524,250 A
`5,535,375 A
`5,548,730 A
`5,566,170 A
`5,574,919 A
`5,588,121 A
`5,590,328 A
`5,592,622 A
`5,598,410 A
`5,619,650 A
`5,629,933 A
`5,633,780 A
`5,634,099 A
`5,634,127 A
`5,642,482 A
`5,664,114 A
`5,671,355 A
`5,678,060 A
`5,682,534 A
`5,692,130 A
`5,699,317 A
`5,699,350 A
`5,701,434 A
`5,701,516 A
`5,727,142 A
`5,742,765 A
`5,749,095 A
`5,751,715 A
`5,752,078 A
`5,758,084 A
`5,758,089 A
`5,758,186 A
`5,758,194 A
`5,768,618 A
`5,771,349 A
`5,774,660 A
`5,778,013 A
`5,778,419 A
`5,790,804 A
`5,794,061 A
`5,802,258 A
`5,802,580 A
`5,809,328 A
`5,809,527 A
`5,812,775 A
`5,815,646 A
`5,828,835 A
`5,848,293 A
`5,872,919 A
`5,878,225 A
`5,892,903 A
`
`
`
`5/1986 Shahet al. oo... eee 710/8
`10/1987 Balph etal.
`..
`- 370/451
`2/1991 Davis etal.
`..
`. 364/900
`10/1991 Hirata etal.
`.
`. 709/230
`10/1991 Beach etal.
`.
`» 370/85.6
`3/1992 Wardetal.
`+. 365/78
`11/1992 Rowetal. .
`- 395/200
`..
`5/1993 Dally et al.
`- 395/400
`1/1994 Trapp .........
`++ 370/85.1
`weve 395/275
`2/1994 Latifetal.
`......
`
`4/1994 Yokoyamaetal. .
`. 395/200
`
`...
`5/1995 Hausman etal.
`- 395/250
`
`w+ 709/234
`5/1995 Christenson ...
`9/1995 Richteretal. ...
`+ 370/94.1
`1/1996 Dobbinsetal.
`.
`- 370/255
`
`1/1996 Schrier et al.
`we 703/227
`1/1996 Hitzetal.
`...
`. 395/200.12
`A996 Bath wescscecsseeseete
`sees 395/250
`4/1996 Suda ........
`we 395/280
`
`5/1996 Szwerinskietal.
`- 395/800
`
`....
`6/1996 Chesson etal.
`. 395/775
`7/1996 Eshel.........
`- 703/27
`
`.
`8/1996 Younget al.
`- 395/280
`....
`10/1996 Bakke etal.
`... 370/60
`
`11/1996 Netravali et al.
`wee 712/220
`
`- 395/200.15
`12/1996 Reddinetal.
`12/1996 Senoetal. oo... 395/675
`
`..
`1/1997 Isfeld et al.
`395/200.02
`ceeeeeeeeeeeeeee 370/469
`V/1997 Stone oo...
`
`4/1997 Bachet al.
`395/200.01
`5/1997 Delp etal.
`we STO/AIL
`5/1997 Cronin wee. eeceeeeeneee 361/220
`
`5/1997 Andrewsetal.
`395/200.07
`5/1997 Cloud etal.
`....
`w+ 395/680
`6/1997 Pardillos ........ w 395/200.2
`
`9/1997 Krech, Jr. etal.
`....... 395/200.64
`
`9/1997 Collins .............
`. 395/200.2
`
`10/1997 Yokoyamaetal. .
`- 709/212
`w+ 709/203
`..
`10/1997 Kapooretal.
`
`.. 395/200.12
`.
`11/1997 Shobu etal.
`
`........... 395/230.06
`12/1997 Sartore et al.
`
`12/1997 Kraslavsky «0... 370/254
`we 395/484
`12/1997 Nakagawa ..
`
`.
`12/1997 Cheng et al.
`. 395/842
`3/1998 Chen..........
`. 395/181
`
`4/1998 Wong etal.
`..
`w+ 709/230
`5/1998 Hagersten ...
`vee TLVIAL
`
`5/1998 Chan etal. ...
`- 370/455
`5/1998 Delpetal. wo 395/827
`5/1998 Silverstein et al.
`...... 395/200.58
`
`.......... 395/200.64
`5/1998 Gentry etal.
`5/1998 Hamilton et al. 0... 395/831
`5/1998 Kuzma oo... eeeeneee 395/886
`
`6/1998 Erickson et al. ......cs TLO/9
`6/1998 Picazo, Jr. etal. ...... 395/188.01
`6/1998 Brendel et al.
`......... 395/200.31
`
`ve T1A/807
`T1998 Jedwab..........
`............ 711/112
`7/1998 Hansen etal.
`8/1998 Osborne ..... ee 709/245
`
`- 395/800.01
`8/1998 Hansenetal.
`Q/1998 Chen... eeeeeeeee 395/182.08
`9/1998 McAlpice oe 711/149
`
`9/1998 Nogalesetal. ..
`- 395/825
`9/1998 Cooperet al. oo... TLL/133
`9/1998 Van Seeters et al.
`.... 395/200.43
`
`we 395/163
`9/1998 Purcell et al.
`...
`10/1998 Isfeld etal... 709/200
`12/1998 Gentry eeeceeececceee 710/5
`2/1999 Wakeland ....c.ceccecees 709/230
`3/1999 Bilansky etal. ........ 395/200.57
`AI1999 Klaus veececccscesescssseseees 709/227
`
`5,898,713 A
`4/1999 Melzeret al. o.seceeee 371/53
`5,913,028 A
`6/1999 Wangetal. .....
`. 395/200.33
`
`5,920,566 A
`.....cc0ccc00e- 370/401
`7/1999 Hendel et al.
`5,930,830 A
`7/1999 Mendelson etal.
`......... TALL
`5,931,918 A
`... 709/300
`8/1999 Rowetal. wo...
`
`5,935,205 A
`8/1999 Murayamaetal. .......... 709/216
`5,937,169 A
`8/1999 Connery etal.
`.......... 395/200.8
`5,941,969 A
`8/1999 Rametal.
`cece 710/128
`
`5,941,972 A
`8/1999 Hoeseetal. wees 710/129
`5,950,203 A
`9/1999 Stakuis et al. ow... 707/10
`5,987,022 A
`. 370/349
`11/1999 Geiger etal.
`...
`
`5,991,299 A
`11/1999 Radognaet al. ........e. 370/392
`5,996,013 A
`11/1999 Delpetal. cece 709/226
`5,996,024 A
`11/1999 Blumenau....
`.. 709/301
`
`6,005,849 A
`12/1999 Roachetal. wu. 370/276
`6,009,478 A
`12/1999 Panner etal. vo... 710/5
`6,009,504 A * 12/1999 Krick wo...
`.. 711/220
`
`1/2000 Lowe ....
`... 709/250
`6,016,513 A
`
`2/2000 Gentry etal.
`... 709/303
`6,021,446 A
`
`2/2000 Chen vececscscsssesesessssesees 714/2
`6,021,507 A
`ve 710/56
`6,026,452 A
`2/2000 Pitts ...
`
`..
`.. 370/401
`6,034,963 A
`3/2000 Minamiet al.
`3/2000 Anjuretal. vcs 707/10
`6,038,562 A
`
`3/2000 Flandersetal. ............. 370/401
`6,041,058 A
`
`we. 710/129
`3/2000 Hoese wesc.
`6,041,381 A
`
`
`.. 711/130
`6,044,438 A
`3/2000 Olnowich .
`6,047,323 A
`4/2000 Krause .....
`w. TLL/129
`6,047,356 A
`4/2000 Anderson et al.
`........... TLL/129
`
`6,049,528 A
`4/2000 Hendel et al.
`......
`s.. 370/235
`6,057,863 A
`5/2000 Olarig: wee
`we 345/520
`...
`... 370/537
`6,061,368 A
`5/2000 Hitzelberger
`
`
`we TLL
`6,065,096 A
`5/2000 Day etal.
`.......
`6,067,569 A
`5/2000 Khakietal.
`....
`w 709/224
`6,070,200 A
`5/2000 Gates et al.
`........ccccceeseee 710/20
`6,078,564 A
`6/2000 Lakshman etal.
`.......... 370/235
`
`6,078,733 A
`6/2000 Osborne ...........
`.. 709/250
`... 370/474
`6,097,734 A
`8/2000 Gotesman etal.
`..
`
`
`.. 709/321
`6,101,555 A
`8/2000 Gosheyetal. .....
`8/2000 Chang etal. 0.0... 359/123
`6,111,673 A
`6,115,615 A
`9/2000 Otaetal.
`........
`we 455/422..1
`6,122,670 A
`9/2000 Bennett et al.
`.......0.. 709/230
`6,141,701 A
`10/2000 Whitney ......
`710/5
`6,141,705 A
`10/2000 Anandetal. .
`710/15
`6,145,017 A
`11/2000 Ghaffari.
`....ceecccceee T10/5
`6,157,955 A
`12/2000 Naradetal.
`....
`. 709/228
`6,172,980 Bl
`1/2001 Flandersetal.
`.....0.0..... 370/401
`6,173,333 BL
`1/2001 Jolitz et al.
`.. 370/412
`6,181,705 Bl
`1/2001 Branstadetal. .
`6,202,105 Bl
`3/2001 Gatesetal. ...ccecec 710/20
`6,226,680 BL
`5/2001 Boucheretal.
`.
`... 709/230
`6,233,242 Bl
`5/2001 Mayeretal. ....
`... 370/392
`6,246,683 Bl
`6/2001 Connery etal.
`....
`... 370/392
`6,247,060 Bl
`6/2001 Boucheretal.
`............. 709/238
`6,279,051 Bl
`8/2001 Gates et al.
`cecccccccccccccccee 710/20
`6,289,023 Bl
`9/2001 Dowling etal.
`.
`... 370/419
`6,298,403 B1
`10/2001 Surietal.
`.......
`.. 710/100
`6,324,649 Bl
`11/2001 Eyresetal......
`.. 713/202
`6,334,153 B2
`12/2001 Boucheretal.
`.
`... 709/230
`6,343,360 Bl
`1/2002 Feinleib .....c.ceeccceeee 713/1
`6,345,301 Bl
`2/2002 Burns et al.
`.....
`... 709/230
`6,345,302 Bl
`2/2002 Bennett etal.
`..
`... 709/236
`6,356,951 Bl
`3/2002 Gentry etal.
`...
`... 709/250
`6,370,599 Bl
`4/2002 Anand et al.
`..........cccceee 710/15
`6,385,647 Bl
`5/2002 Wills etal.
`......
`.. 709/217
`6,389,468 Bl
`5/2002 Mulleretal. 0... 709/226
`6,389,479 B1
`5/2002 Boucher ....ecseccesees 709/243
`... 709/238
`6,393,487 B2
`5/2002 Boucher etal.
`.
`
`7/2002 Tillier cece eee 710/1
`6,421,742 Bl
`7/2002 Hoese etal. wc... 710/129
`6,421,753 Bl
`.. 709/224
`6,427,169 Bl
`7/2002. Elzur
`
`7/2002 Craft et al. w.eceece. 709/230
`6,427,171 Bl
`6,427,173 Bl
`7/2002 Boucheretal. oc... 709/238
`6,434,620 Bl
`8/2002 Boucheretal. wc... 709/230
`
`
`
`
`
`
`
`
`
`INTEL Ex. 1258.002
`
`INTEL Ex. 1258.002
`
`
`
`US 7,496,689 B2
`
`Page 3
`
`FOREIGN PATENT DOCUMENTS
`
`8/2002 Gentry, Jr oe eee 710/260
`6,434,651 Bl
`WO
`WO 00/13091
`3/2000
`..
`9/2002 Elzuretal.
`. 709/236
`6,449,656 Bl
`WO
`WO 01/04770
`1/2001
`
`9/2002 Mulleretal. oe. 709/250
`6,453,360 Bl
`WO
`WO 01/05107
`1/2001
`10/2002 Starretal. we. 711/104
`6,470,415 Bl
`WO
`WO 01/05116
`1/2001
`10/2002 Bellatonetal
`. 370/392
`6,473,425 Bl
`WO
`WO 01/05123
`1/2001
`
`11/2002 Mulleretal. 0... 370/389
`6,480,489 Bl
`WO
`WO 01/40960
`6/2001
`11/2002 Klausmeieretal. ...... 370/395.1
`6,487,202 Bl
`WO
`WO 01/59966
`8/2001
`
`11/2002 Dowling........
` we 712/244
`6,487,654 B2
`WO
`WO 01/86430
`11/2001
`12/2002 Teichetal. oo. .. 709/250
`6,490,631 Bl
`
`6,502,144 Bl=12/2002 Accarie oe eeeeeeeee 710/8 OTHER PUBLICATIONS
`.
`6,523,119 B2
`2/2003 Pavlin etal.
`. 713/192
`Zilog product Brief entitled “Z85C30 CMOS SCC Serial Commu-
`
`2/2003 Yang etal. oe 709/230
`6,526,446 Bl
`nication Controller’, Zilog Inc., 3 pages, 1997.
`6,570,884 Bl
`5/2003 Connery etal... 370/419
`Internet pages of Xpoint Technologies, Inc. entitled “Smart LAN
`.
`6,591,302 B2
`7/2003 Boucher etal.
`. 709/230
`Work Requests”, 5 pages, printed Dec. 19, 1997.
`
`7/2003 Johnson .........::sseeeeeeeeeees 710/3
`6,591,310 Bl
`Internet pages entitled: Asante and 1OOBASE-T Fast Ethernet. 7
`6,648,611 B2
`11/2003 Morseetal.
`........00... 417/310
`pages, printed May 27, 1997.
`6,650,640 Bl
`11/2003 Mulleret al.
`. 370/392
`Internet pages entitled: A Guide to the Paragon XP/S-A7
`
`
`. 359/124
`12/2003 Changetal. .
`6,657,757 Bl
`Supercomputer at Indiana University. 13 pages, printed Dec. 21,
`. 709/239
`6,658,480 B2
`12/2003 Boucheretal
`1998.
`
`1/2004 Teplitsky .......
`6,678,283 Bl
`. 370/463
`Richard Stevens, “TCP/IP Illustrated, vol. 1, The Protocols”, pp.
`1/2004 Calvignacet al.
`.
`. 714/776
`6,681,364 Bl
`325-326 (1994).
`
`. 709/250
`6,687,758 B2
`2/2004 Craft et al.
`...
`Internet pages entitled: Northridge/Southbridge vs. Intel Hub Archi-
`
`. 709/230
`6,697,868 B2
`2/2004 Craft etal.
`...
`tecture, 4 pages, printed Feb. 19, 2001.
`6/2004 Philbrick etal.
`. 709/224
`6,751,665 B2
`Gigabit Ethernet Technical Brief, Achieving End-to-End Perfor-
`
`.
`6,757,746 B2
`6/2004 Boucher etal.
`. 709/250
`mance. Alteon Networks,Inc., First Edition, Sep. 1996, 15 pages.
`7/2004 Johnson etal.
`.
`6,765,901 Bl
`. 370/352
`Internet pages directed to Technical Brief on Alteon Ethernet Gigabit
`...
`6,807,581 Bl
`10/2004 Starretal.
`. 709/250
`NICtechnology, www.alteon.com, 14 pages, printed Mar. 15, 1997.
`
`
`1/2005 Reddinget al
`6,842,896 Bl
`. TIT/AT2
`VIA Technologies,Inc. article entitled “WT8501 Apollo MVP4”, pp.
`6/2005 Edgar 0... cceeeereceeeee 707/10
`6,912,522 B2
`i-iv, 1-11, cover and copyright page, revision 1.3, Feb. 1, 2000.
`
`... 709/230
`6,938,092 B2
`8/2005 Burns......
`iReady NewsArchivesarticle entitled “iReady Rounding Out Man-
`
`...
`6,941,386 B2
`9/2005 Craft etal.
`. 709/250
`agement Team with Two Key Executives”, http://www.ireadyco.
`
`11/2005 Boucheret al
`6,965,941 B2
`. 709/230
`com/archives/keyexec.html, 2 pages, printed Nov. 28, 1998.
`...
`6,996,070 B2
`2/2006 Starretal.
`. 370/252
`“Toshiba Delivers First Chips to Make Consumer DevicesInternet-
`
`7,042,898 B2
`5/2006 Blightman etal
`. 370/463
`Ready Based On iReady’s Design,” Press Release Oct. 1998, 3 pages,
`7,076,568 B2
`7/2006 Philbrick etal.
`. 709/250
`printed Nov. 28, 1998.
`7,089,326 B2
`8/2006 Boucheretal.
`.
`. 709/242
`Internet pages from iReady Products, web sitehttp://www.ireadyco.
`.
`7,093,099 B2
`8/2006 Bodas etal.
`. 711/206
`com/products,html, 2 pages, downloaded Nov. 25, 1998.
`
`
`......
`7,124,205 B2
`10/2006 Craft etal.
`. 709/250
`iReady News Archives, Toshiba, iReady shipping Internet chip, 1
`11/2006 Blightman etal.
`.. 710/22
`7,133,940 B2
`page, printed Nov. 25, 1998.
`.
`. 709/250
`7,167,926 Bl
`1/2007 Boucheret al.
`Interprophetarticle entitled “Technology”, http://www.interprophet.
`
`. 709/250
`7,167,927 B2
`1/2007 Philbricket al.
`com/technology.html, 17 pages, printed Mar. 1, 2000.
`.
`. 709/250
`7,174,393 B2
`2/2007 Boucheretal.
`iReady Corporation, article entitled “The I-1000 Internet Tuner”, 2
`
`
`. 714/776
`7,185,266 B2
`2/2007 Blightman etal
`pages, date unknown.
`.
`7,191,241 B2
`3/2007 Boucher etal.
`. 709/230
`iReady article entitled “About Us Introduction”, Internet pages
`
`
`.
`7,191,318 B2
`3/2007 Tripathy et al.
`. 712/225
`fromhttp://www.iReadyco.com/about html, 3 pages, printed Nov.
`.
`7,237,036 B2
`6/2007 Boucheretal.
`. 709/245
`25, 1998.
`
`....
`. 712/210
`7,254,696 B2
`8/2007 Mittal etal.
`iReady NewsArchive article entitled “Revolutionary Approach to
`
`.
`10/2007 Boucheretal.
`. 709/250
`7,284,070 B2
`ConsumerElectronics Internet Connectivity Funded”, San Jose, CA,
`
`
`we. 370/328
`2001/0004354 Al
`6/2001 Jolitz .........
`Nov. 20, 1997. 2 pages, printed Nov. 2, 1998.
`2001/0025315 Al
`6/2001 Jolitz .........
`.-. 709/231
`iReady News Archivearticle entitled “Seiko Instruments Inc. (SID
`2001/0013059 Al
`8/2001 Dawsonetal. ..
`. 709/217
`Introduces World’s First Internet-Ready Intelligent LCD Modules
`
`2001/0014892 Al
`8/2001 Gaither etal.
`..
`. 707/200
`Based on iReady Technology,” Santa Clara, CA and Chiba, Japan,
`2001/0014954 Al
`8/2001 Purcell et al.
`w T1A4/4
`Oct. 26, 1998. 2 pages, printed Nov. 2, 1998.
`2001/0048681 Al
`12/2001 Bilic etal.
`...
`. 370/389
`NEWSwatcharticle entitled “iReady internet Tuner to Web Enable
`2001/0053148 Al
`12/2001 Bilicetal.
`...
`. 370/389
`Devices”, Tuesday, Nov. 5, 1996, printed Nov. 2, 1998, 2 pages.
`
`2002/0073223 Al
`6/2002 Damell etal. ...
`. 709/232
`EETimesarticle entitled “Tuner for Toshiba, Toshiba Taps iReady for
`2002/0112175 Al
`8/2002 Makofka etal.
`. 713/200
`Internet Tuner”, by David Lammers, 2 pages, printed Nov. 2, 1998.
`2003/0066011 Al
`4/2003 Oren... eee
`. 714/758
`“Comparison of Novell Netware and TCP/IP Protocol Architec-
`
`2003/0110344 Al
`6/2003 Szczepaneketal.
`. 711/100
`tures”, by J.S. Carbone, 19 pages, printed Apr. 10, 1998.
`2003/0165160 Al
`9/2003 Minami et al.
`..
`. 370/466
`Adaptec article entitled “AEA-7110C-a DuraSAN product”, 11
`2004/0054814 Al
`3/2004 McDaniel......
`. 709/250
`pages, printed Oct. 1, 2001.
`
`
`wee 713/168
`2004/0059926 Al
`3/2004 Angelo etal.
`iSCSI HBAarticle entitled “iSCSI and 2Gigabit fibre Channel Host
`2004/0153578 Al
`8/2004 Elzur ........
`... 709/230
`Bus Adapters from Emulex, QLogic, Adaptec, JNI’, 8 pages, printed
`.
`2004/0213290 Al
`10/2004 Johnson etal.
`..» 370/469
`Oct. 1, 2001.
`2004/0246974 Al
`12/2004 Gyugietal.
`......... 370/395.31
`iSCSI HBAarticle entitled “FCE-3210/6410 32 and 64-bit PCI-to-
`Fibre Channel HBA”, 6 pages, printed Oct. 1, 2001.
`ISCSI.com article entitled “iSCSI Storage”, 2 pages, printed Oct. 1,
`2001.
`“Two-Way TCP Traffic Over Rate Controlled Channels: Effects and
`Analysis”, by Kalampoukaset al., IEEE Transactions on Network-
`ing, vol. 6, No. 6, Dec. 1998, 17 pages.
`
`WO 98/50852
`WO 99/04343
`WO 99/65219
`
`WO
`WO
`WO
`
`11/1998
`1/1999
`12/1999
`
`INTEL Ex. 1258.003
`
`INTEL Ex. 1258.003
`
`
`
`US 7,496,689 B2
`Page 4
`
`TReady Newsarticle entitled “Toshiba Delivers First Chips to Make
`ConsumerDevices Internet-Ready Based on iReady Design”, Santa
`Clara, CA, and Tokyo, Japan, Oct. 14, 1998, printed Nov. 2, 1998, 3
`pages.
`Internet pages of InterProphet entitled “Frequently Asked Ques-
`tions”, by Lynne Jolitz, printed Jun. 14, 2000, 4 pages.
`“File System Design For An NFS File Server Appliance”, Article by
`D. Hitz, et al., 13 pages.
`Adaptec Press Release article entitled “Adaptec Announces
`EtherStorage Technology”, 2 pages, May 4, 2000, printed Jun. 14,
`2000.
`
`Adaptec article entitled “EtherStorage Frequently Asked Questions”,
`5 pages, printed Jul. 19, 2000.
`Adaptec article entitled “EtherStorage White Paper’, 7 pages, printed
`Jul. 19, 2000.
`CIBC World Markets article entitled “Computers; Storage”, by J.
`Berlinoet al., 9 pages, dated Aug. 7, 2000.
`Merrill Lynch article entitled “Storage Futures”, by S. Milunovich,
`22 pages, dated May 10, 2000.
`CBS Market Watcharticle entitled “Montreal Start-Up Battles Data
`Storage Bottleneck”, by S. Taylor, dated Mar. 5, 2000, 2 pages,
`printed Mar. 7, 2000.
`Internet-draft article entitled “SCSI/TCP (SCSI over TCP)”, by J.
`Satran et al., 38 pages, dated Feb. 2000, printed May 19, 2000.
`Internet pagesentitled Technical White Paper-XPoint’s Disk to LAN
`Acceleration Solution for Windows NT Server, printed Jun. 5, 1997,
`15 pages.
`Jato Technologies article entitled Network Accelerator Chip Archi-
`tecture, twelve-slide presentation, printed Aug. 19, 1998, 13 pages.
`EETimesarticle entitled Enterprise System Uses Flexible Spec,
`dated Aug. 10, 1998, printed Nov. 25, 1998, 3 pages.
`Internet pages entitled “Smart Ethernet Network Interface Cards”,
`which Berend Ozceri is developing, printed Nov. 25, 1998, 2 pages.
`Internet pages of Xaqti corporation entitled “GigaPower Protocol
`Processor Product Review,” printed Nov. 25, 1999, 4 pages.
`U.S. Appl. No. 60/283,896, Titled: CRC Calculations for Out of
`Order PUDs, filed Apr. 12, 2003, Inventor: Amit Oren, Assignee:
`Siliquent Technologies Ltd.
`Internet pages entitled “DART: Fast Application Level Networking
`via Data-Copy Avoidance,” by Robert J. Walsh, printed Jun. 3, 1999,
`25 pages.
`Andrew S. Tanenbaum, Computer Networks, Third Edition, 1996,
`ISBN 0-13-349945-6.
`
`Rice University article entitled “LRP: A Network Subsystem Archi-
`tecture for Server Systems”, by P. Druschel and G. Banga,14 pages.
`Internet RFC/STD/FYI/BCP Archives
`article with heading
`“RFC2140” entitled “TCP Control Block Interdependence”, web
`address http://www.faqs.org/ftp/rfc/pdf/rfc2140.txt-pdf, 11 pages,
`Apr. 1997.
`WindRiverarticle entitled “Tornado: ForIntelligent Network Accel-
`eration”, copyright Wind River Systems, 2001, 2 pages.
`WindRiver White Paper entitled “Complete TCP/IP Offload for
`High-Speed Ethernet Networks”, Copyright Wind River Systems,
`2002, 7 pages.
`Intel article entitled “Solving Server Bottlenecks with Intel Server
`Adapters”, Copyright Intel Corporation, 1999, 8 pages.
`
`Schwadereret al., IEEE Computer Society Press publication entitled,
`“XTP in VLSI Protocol Decomposition for ASIC Implementation”,
`from 15 Conference on Local Computer Networks, 5 pages, Sep.
`30-Oct. 3, 1990.
`Beach, Bob, IEEE Computer Society Press publication entitled,
`“UltraNet: An Architecture for Gigabit Networking”, from 15™ Con-
`ference on Local Computer Networks, 18 pages, Sep. 30-Oct. 3,
`1990.
`Chesson et al., IEEE Syposium Record entitled, “The Protocol
`Engine Chipset”, from Hot Chips II], 16 pages, Aug. 26-27, 1991.
`Maclean et al.,
`IEEE Global Telecommunications Conference,
`Globecom ’91, presentation entitled, “An Outboard. Processor for
`High Performance Implementation of Transport Layer Protocols”, 7
`pages, Dec. 2-5, 1991.
`Rosset al., IEEEarticle entitled “FX 1000: A high performancesingle
`chip Gigabit Ethernet NIC”, from Compcon ’97 Proceedings, 7
`pages, Feb. 23-26, 1997.
`Strayer et al., “Ch. 9: The Protocol Engine” from XTP: The Transfer
`Protocol, 12 pages, Jul. 1992.
`Publication entitled “Protocol Engine Handbook”, 44 pages, Oct.
`1990.
`Koufopavlou et al., IEEE Global Telecommunications Conference,
`Globecom ’92, presentation entitled, “Parallel TCP for High Perfor-
`mance Communication Subsystems”, 7 pages, Dec. 6-9, 1992.
`Lilienkampet al., Publication entitled “Proposed Host-Front End.
`Protocol”, 56 pages, Dec. 1984.
`Thla, Y.H. Publication entitled A Reduced Operational Protocol
`Engine (ROPE)for a multiple-layer bypass architecture, 16 pages.
`U.S. Appl. No. 60/053,240, Titled: TCP/IP Network Accelerator and
`Methodof Use,filed Jul. 18, 1997, Inventors: Jolitz et al., Assignee:
`InterProphet LLC.
`Thia, Y.H. Publication entitled “High-Speed OSI Protocol Bypass
`Algorithm with Window Flow Control”, Protocols for High Speed
`Networks, pp. 53-68, 1993.
`Form 10-K for Excelan,Inc., for the fiscal year ending Dec. 31, 1987
`(10 pages).
`Form 10-K for Excelan,Inc., for the fiscal year ending Dec. 31, 1988
`(10 pages).
`Internet pages entitled: Northridge/Southbridge vs. Intel Hub Archi-
`tecture, 4 pages, printed Feb. 19, 2001.
`Article from Rice University entitled “LRP: A New Network Sub-
`system Architecture for Server Systems”, by Peter Druschel and
`Gaurav Banga, 14 pages.
`Schwadereret al., IEEE Computer Society Press publication entitled,
`“XTP in VLSI Protocol Decomposition for ASIC Implementation”,
`from 15th Conference on Local Computer Networks, 5 pages, Sep.
`30-Oct. 3, 1990.
`Beach, Bob, IEEE Computer Society Press publication entitled,
`“UltraNet: An Architecture for Gigabit Networking”, from 15th Con-
`ference on Local Computer Networks, 18 pages, Sep. 30-Oct. 3,
`1990.
`Thia et al. Publication entitled “High-Speed OSI Protocol Bypass
`Algorithm with Window Flow Control,” Protocols for High Speed.
`Networks, pp. 53-68, 1993.
`Thia et al. Publication entitled “A Reduced Operational Protocol
`Engine (ROPE)for a multiple-layer bypass architecture,” Protocols
`for High Speed Networks, pp. 224-239, 1995.
`
`* cited by examiner
`
`INTEL Ex. 1258.004
`
`INTEL Ex. 1258.004
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 1 of 72
`
`US 7,496,689 B2
`
`==
`
`|
`
`I J
`
`1
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`po------7-7 ¢
`|
`SYSTEM
`T OTTE |
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`114.
`TABLE
`BUCKETS
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`105
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`IMPLEMENTS
`PROTOCOL STACK
`
`FIG. 1
`
`INTEL Ex. 1258.005
`
`INTEL Ex. 1258.005
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 2 of 72
`
`US 7,496,689 B2
`
`WYOWHSNI
`
`(SSIMLNAze)
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`
`INTEL Ex. 1258.006
`
`INTEL Ex. 1258.006
`
`
`
`
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 3 of 72
`
`US 7,496,689 B2
`
`START
`
`rc 200
`OBTAIN AVAILABLE "PROCESSOR CONTEXT"
`
`201
`
`POP RECEIVE DESCRIPTOR AND HASH OFF THE RECEIVE DESCRIPTOR
`
`QUEUE CHECK ATTENTION BIT, IF SET THEN GO TO SLOW-PATH(END)
`
`203
`
`
`
`¥
`IF ATTENTION BIT IS NOT SET, THEN START THE DMA OF
`
`THE HEADER FROM DRAM TO SRAM
`¥
`
`BITS[13:2}] OF THE HASH ARE THE HASH BUCKET NUMBER, CHECK THE
`CORRESPONDING HASH BUCKET STATUS BYTE TO SEE IF THE BUCKETIS IN
`
`SRAM (CACHE)
`v
`IF THE BUCKETIS IN CACHE, THEN WAIT FOR THE HEADER DMA TO
`
`COMPLETE
`
`r~ 204
`
`rn 205
`
`IF THE BUCKETIS NOT IN CACHE, THEN IDENTIFY A FREE HASH SLOT FROM
`Q_FREEHASHSLOTS AND DMA THE HASH BUCKET FROM DRAMINTO THE
`FREE SLOT IN SRAM, SET THE HASH BUCKET STATUS BYTE TO POINT TO THE
`NOW OCCUPIED SLOT
`
`206
`
`SEARCH THE HASH BUCKET(IN SRAM) FOR THE TCB NUMBER,USE BITS[1:0]
`OF THE HASH TO DETERMINE THE FIRST HASH ENTRY TO CHECK, CHECK
`
`CONSECUTIVE HASH ENTRIES IN THE BUCKET FROM THERE
`
`207
`
`208
`
`IF A MATCH IS NOT FOUND IN THE BUCKET, THEN GO TO SLOW-PATH(END)
`
`IF A MATCH IS FOUND IN THE BUCKET, THEN GET THE TCB NUMBER FROM
`THE HASH BUCKET ENTRY
`
`
`v
`210
`ATTEMPT TO LOCK THE INDICATED TCB BY SETTING THE TCB'S LOCK BIT
`
`209
`
`[
`
`FIG. 3A
`
`INTEL Ex. 1258.007
`
`INTEL Ex. 1258.007
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 4 of 72
`
`US 7,496,689 B2
`
`
`
`
`
`
`
`
`
`
`
`212
`
`214
`
`IF THE TCB IS LOCKED AS INDICATED BY THE LOCKBIT, THEN INSERT THE
`RUNNING PROCESSOR CONTEXTINTO THE TCB LOCK TABLE AND SUSPEND.
`WHEN THE TCB IS UNLOCKED BY THE CURRENT OWNER,A TCB LOCK TABLE
`CAM AND THE LOCK TABLE ARE USED TO IDENTIFY THE NEXT WAITING
`PROCESSOR CONTEXT. THIS PROCESSOR CONTEXTIS RESTARTED.
`
`
`
`
`
`ONCE THE PROCESSOR CONTEXT HAS LOCKED THE MATCHED TCB, THEN
`SEARCH THE INSRAM CAM FOR THE TCB SLOT NUMBER. IF THE TCB SLOT
`
`
`NUMBER IS IN THE INSRAM CAM, THEN THIS TCB 1S IN THE TCB SRAM
`
`CACHE.
`213 _
`
`
`
`IF THE TCB SLOT NUMBER IS FOUND IN THE INSRAM CAM, THEN DO FAST-
`
` PATH RECEIVE PROCESSING (END)
`
`
`
`IF THE TCB SLOT NUMBER IS NOT FOUND IN THE INSRAM CAM, THEN
`
`IDENTIFY ALRU SLOT IN THE TCB SRAM CACHE AND DMA THE TCB FROM
`DRAM INTO THE LRU SLOT
`
`
`PUT THE TCB SLOT NUMBER INTO THE SRAM CAM
`
`
`
`
`DO FAST-PATH RECEIVE. PROCESSING (END)
`
`FIG. 3B
`
`KEY TO FIG. 3
`
`FIG.3A
`
`FIG.3B
`
`FIG.3
`
`INTEL Ex. 1258.008
`
`INTEL Ex. 1258.008
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 5 of 72
`
`US 7,496,689 B2
`
`300
`~~ Le
`COMPUTER
`396
`
`NETWORK
`
`
`
`NETWORK
`INTERFACE
`
`
`
`
`
`CPU EXECUTES
`INSTRUCTIONS
`THAT IMPLEMENT
`PROTOCOL STACK
`
`30300
`
`301
`
`
` NETWORK
`
`
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`INTERFACE
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`CPU EXECUTES
`INSTRUCTIONS
`THAT IMPLEMENT
`PROTOCOL STACK
`
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`301
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`CPU EXECUTES
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`INTERFACE
`INSTRUCTIONS
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`DEVICE
`THAT IMPLEMENT
`|
`|
`PROTOCOL STACK
`
`
`LOCAL BUS
`
`| |
`
`HOST BUS |
`
`INTEL Ex. 1258.009
`
`I|
`
`NETWORK
`
`
`
`
`
`INTEL Ex. 1258.009
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 6 of 72
`
`US 7,496,689 B2
`
`
`
`HOST BUS
`510
`
`HOST
`
`
`
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`CPU EXECUTES
`BRIDGE
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`501
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`|
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`|
`NETWORK
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`
`
`INTEL Ex. 1258.010
`
`INTEL Ex. 1258.010
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 7 of 72
`
`US 7,496,689 B2
`
`rocco tro oe ee eeee eeeH
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`Reg File
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`
`INTEL Ex. 1258.011
`
`INTEL Ex. 1258.011
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 8 of 72
`
`US 7,496,689 B2
`
`Datapath Bandwidth
`
`(125MB/s/1000Basc) x 2 (full duplex) x 1 connections
`
`Average frame size
`Frame rate = 250MB/s / 512B
`
`Overhead / frame = (256B context read * 25%) + (96B header read) +
`(192B context write * 25%) + (64B misc.)
`
`Total bandwidth = (512B in) + (512B out) + (272B Cpu)
`
`Dram Bandwidth required = (1296B/frame) x (488,280 frames/s)
`
`Dram Bandwidth @ 150MHz = (64 bytes / 126.6ns)
`
`PCI Bandwidth required
`
`PC] Bandwidth available @ 33 MHz, 64b, average
`
`PCI Bandwidth available @ 66 MHz, 64b, average
`
`=
`
`=
`
`=
`
`=
`
`=
`
`=
`
`=
`
`=
`
`=
`
`=
`
`250 MB/s
`
`512B
`
`488,280 frames/s
`
`272B / frame
`
`1296B / frame
`
`632.8MB/s
`
`505MB/s
`
`250MB/s
`
`200MB/s
`
`450MB/s
`
`FIG. 11
`
`Cpu Bandwidth
`
`Required instructions / frame (per Clive)
`
`Ack frames per receive
`
`Average instructions/Rev = 250 + (220 * .5)
`Receive frame interval = 512B / 125MB/s
`
`=
`
`-
`
`=
`=
`
`Instructions / frame @ 100MHz = (4.27us/frame) / (1 5ns/instruction) =
`
`250 instructions/rcv
`
`220 instructions/ack
`
`i)
`
`360 instructions/frame
`
`4.267 us
`
`284 instructions/frame
`
`FIG. 12
`
`INTEL Ex. 1258.012
`
`INTEL Ex. 1258.012
`
`
`
`
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`Cillarenett]|tet]||SBRSSEBREEEPreSSSSeseasagsssSeSeeces
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`
`FIG. 13/1
`—
`
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`
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`PCL INTD_L
`
`_____/
`
`INTEL Ex. 1258.013
`
`I I I l
`
`PCLADI9
`
`PCL AD22
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`PCL_AD30
`PCL AD31
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`PCLAD33
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`PCI_AD43
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`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 9 of 72
`
`US 7,496,689 B2
`
`PIN ASSIGNMENTS
`BALL
`
` BALL|SIGNAL DESCRIPTION
`
`Y19
`
`a I
`
`—
`
`
`
`INTEL Ex. 1258.013
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 10 of 72
`
`US 7,496,689 B2
`
`BALL|SIGNAL DESCRIPTION
`
`
`
`
`
`
`
`
`
`
`
`
`
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`Hi7
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`UL0
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`
`
`[D9|EXTPWREN
`All
`
`
`
`
`CLK_SEL_0
`CLKSELI
`PWR_GOOD
`AUX_PWR_GOOD
`NAND_OUT
`
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`M10
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`PLL_VSS
`
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`|Bb|TSTisd|D6|VDDiCid
`
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`
`
`FIG. 13/2
`
`INTEL Ex. 1258.014
`
`INTEL Ex. 1258.014
`
`
`
`U.S. Patent
`
`
`
`
`
` —Ase}—fealealejen|alesfeatealaleafesloolefeafoeiast]stoolsaie)elaRioocl|RoelRinjoolaialosaiagininiaiaie
`
`
`
`
`
`
`
`
`
`Feb. 24, 2009
`
`==“A
`
`AL DESCRIPTION
`
`A_TXC
`A_CRS
`
`NKA_STAT
`A_TXD0
`A_TXD1
`
`A_TXD3
`
`A_TXER
`
`DIO
`
`M_DATA_0
`M_DATA_1
`M_DATA.2
`M_DATA_3
`M_DATA_4
`M_DATA_5
`M_DATA_6
`M_DATA_7
`M_ADDR_0
`M_ADDR_1
`M_ADDR
`M_ADDR_3
`M_ADDR_4
`M_ADDR_5
`M_ADDR_6
`
`M_ADDR_8
`M_ADDR_9
`M_ADDR_10
`M_ADDR_11
`M_ADDR_12
`
`M_ADDR_14
`M_ADDR_15
`RAM_CLK
`M_CKE
`
`M_RAS_L
`M_CAS_L
`
`Sheet 11 of 72
`
`
`
` —_pszSacEAESESepSessagesCASalaSicaaelq
`
`US 7,496,689 B2
`
`SIGNAL DESCRIPTION
`RAM_WE_L
`RAM_DQM
`EEPROM_SDI
`EEPROM_SDO
`EEPROM_CS
`EEPROM_CLK
`FSH_CD_L
`
`DIQSPOPOPY)OPOWOIOYRLYOJOOTO]LEOOPOYOWOPOPOOOWOOOJOJOEO
`
`
`
`FIG. 13/3
`
`INTEL Ex. 1258.015
`
`INTEL Ex. 1258.015
`
`
`
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 12 of 72
`
`US 7,496,689 B2
`
`ONiFETCHffArf (OAD
`=EfLOAD *
`CLK
`TTT
`lalCtl
`
`
`ASh ALU|FLAG i4 ite
`
`cul
`
`ee
`
`
`T-
`
`Istacn) Addr
`pc
`BASED
`
`
`Dis crx|REGS|ccs|REGs REG|Addr BASE aa
`
`
`
`DECODER[rsaMores
`SoBemmee
`FILE7imto__FLAG a San|DEBUG
`
`CTX ttcf SEL acu
`
`PC|STACK} Addr
`
`FIG. 14
`
`INTEL Ex. 1258.016
`
`INTEL Ex. 1258.016
`
`
`
`U.S. Patent
`
`Feb. 24, 2009
`
`Sheet 13 of 72
`
`US 7,496,689 B2
`
`INSTRUCTION-WORD FORMAT
`
`
`
`Jct 1,0=TstSel,0b0000000, 0b00, AluOp, OpdASel, OpdBSel, Literal
`
`
`
`
`
`
`
`Jef
`0b0000000,
`0b00,
`AluOp,
`OpdASel,
`OpdBSel,
`I'bl
`TstSel,
`Literal
`Jmp
`0b0000000
`0b01,
`AluOp,
`OpdASel,
`OpdBSel,
`1p0—sFigSel,
`—_Literal
`Jsr
`0b0000000
`0b10,
`AluOp,
`OpdASel,
`OpdBSel,
`1'bO
`FigSel,
`Literal
`
`Rts FigSel,—_Literal0b0000000 0b11, AluOp, OpdASel, OpdBSel, I'b1
`
`
`
`
`
`
`Rtt
`0b0000000
`0b01,
`AluOp,
`OpdASel,
`OpdBSel,
`Itbl
`TstSel,
`Literal
`Rtf
`0b0000000
`0b10,
`AluOp,
`OpdASel,
`OpdBSel,
`1b1
` TstSel,
`Literal
`Cont
`0b0000000
`0b] 1,
`AluOp,
`OpdASel,
`OpdBSel,
`I'bO
`FigSel,
`Literal
`Map
`MapAddr
`Obxx,
`Obxxxxx,
`ObXxxxxxxxx,
` Obxxxxxxxxx,
`I'bx
`Ohxx,
`Ohxxxx
`
`FIG. 15
`
`SEQUENCER BEHAVIOR
`PgmCtrl
`= {Instruction bits 48:47, Instruction bit 23};
`DbgAddr
`= DbgAddr + (Execute & DbgMa);
`InstrFetchAddr
`= DbgMd ? DbgAddr:InstrAddr;
`Pc
`= InstrAddr + (Execute & ~DbgMd);}
`
`if (MapEn & (MapAddr != 0b0000000)){
`InstrAddr = 0h8000 |(MapAddr << 3) | Pc[2:0]; }
`else if (PgmCtrl == Jct && TstSel)
`InstrAddr = Pe:(AluDst==Pc) ? AluOut:Literal;
`else if (PgmCtrl == Icf && ~TstSel)
`InstrAddr = Pc:(AluDst==Pc) ? AluOut:Literal;
`else if (PgmCtrl == Jmp)
`InstrAddr = (AluDst==Pc) ? AluOut:Literal;
`else if (PgmCtrl == Jsr) {
`InstrAddr = (AluDst==Pc) ? AluOut:Literal;
`Stack{StackPtr] = NextPc;
`StackPtr = StackPtr + 1; }
`{
`else if (PgmCtr] == Rtt && TstSel)
`InstrAddr = Stack[StackPtr - 1] ;
`StackPtr = StackPtr -1 ; }
`else if (PgmCtrl == Rtf && ~TstSel) {
`InstrAddr = Stack{StackPtr — 1];
`StackPtr = StackPtr -1 ; }
`else if (PgmCtrl == Rts) {
`InstrAddr = Stack[S