3,044,909
`w. SHOCKLEY
`July 17, 1962
`SEMICONDUC‘I‘IVE WAFER AND METHOD OF MAKING THE SAME
`
`Filed Oct. 23, 1958
`
`2 Sheets—Sheet 1
`
`F15. I.
`
`
`
`WILL 1AM SHoCKL E Y
`INVENTOR.
`
`y/Z/M ‘ivéuiw
`ATTO/Q NE Y5
`
`SAMSUNG EXHIBIT 1042
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`SAMSUNG EXHIBIT 1042
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`

`3,044,909
`w. SHOCKLEY
`JUIY 17, 1962
`SEMICONDUCTIVE WAFER AND METHOD OF MAKING THE SAME
`
`Filed Oct. 25, 1958
`
`2 Sheets—Sheet 2
`
`
`
`FIE. .70.
`
`
`
`I/V/L L [AM SHOCKLEY
`INVENTOR.
`
`BY (7% ‘5/
`A 770 BNEYS
`
`SAMSUNG EXHIBIT 1042
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`SAMSUNG EXHIBIT 1042
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`

`United States Patent Gffice
`
`3,044,909
`Patented July 1 7, 1962
`
`1
`
`3,044,909
`SEMICONDUCTIVE WAFER AND METHOD OF
`MAKING THE SAME
`Wiliiam Shockley, 23466 Corta Via, Los Altos, Calif.
`Filed Oct. 23, 1958, Ser. No. 769,227
`7 Claims.
`(Cl. 148—15)
`
`This invention relates to a scmiconductive wafer and
`method for making the same.
`It is a general object of the present invention to provide
`a semiconductive wafer suitable for the fabrication of
`high frequency devices.
`It is another object of the present invention to provide
`a wafer of semiconductive material which includes closely
`spaced holes extending therethrough.
`It is a further object of the present invention to pro-
`vide a method for forming a wafer of the above charac—
`ter.
`These and other objects of the invention will become
`more clearly apparent from the following description
`when taken in conjunction with the accompanying draw-
`ing.
`7
`Referring to the drawing:
`FIGURE 1 is a perspective View of a wafer of semi-
`conductive material including a grain or twin boundary;
`FIGURE 2. shows the wafer of FIGURE 1 after it has
`been subjected to a prolonged etching operation;
`FIGURE 3 shows a field eifect or unipolar transistor
`formed by diffusing impurities into the wafer of FIG-
`URE 1;
`FIGURE 4 is a perspective View ofone end of the de-
`vice of FIGURE 3;
`semiconductive device
`FIGURE 5
`shows another
`formed from a wafer of semiconductive material formed
`in accordance with the present invention;
`FIGURE 6 shows a seed suitable for growing a crystal
`including a grain boundary;
`FIGURE 7 is a perspective View showing another seed
`structure;
`FIGURE 8 is a side elevational View of the seed of
`FIGURE 7;
`FIGURE 9 is a plan view of the seed of FIGURE 7;
`FIGURE 10 Show a modification of the seed of FIG-
`URE 7; and
`FIGURE 11 shows another seed suitable for growing
`a crystal including a twin boundary.
`The Wafer 11, FIGURE 1, includes a grain or twin
`boundary 12. A plurality of wafers 11 can be made by
`dicing a grown crystal having one or more boundaries
`12. Crystals including grain or twin boundaries may be
`formed by properly secding the crystal during the grow-
`ing process. For example, a seed havingtwo or more
`properly cut and oriented parts may be employed. Meth—
`ods of growing crystals including grain or twin boundaries
`will be presently described.
`The wafer 11 including a boundary 12 is placed in an
`etching solution. The etchant will act more rapidly
`along the dislocations located at the boundary. Thus,
`when the wafer is allowed to remain in the etching solu-
`tion for a prolonged period of time, deep pits will be
`formed along the dislocations. After sufiicient time has
`elapsed the pits will join to form holes which extend
`through the wafer. The spacing of the holes is controlled
`by the spacing of the dislocations which, in turn, can be
`controlled in the crystal growing process. The holes
`may be spaced as close as a few microns apart. Com-
`mon etches for this purpose may consist of combinations
`of hydrochloric and nitric acids. Many other common
`combinations of active acids and bases are suitable for
`carrying out the etching operation. Electrolytic etching
`may also be employed.
`The holes have been represented as being of uniform
`
`,
`2
`In most etch-
`diameter as they passed through the slice.
`ing operations, the holes will be somewhat enlarged at the
`ends and narrower in the center of the region.
`It is evi-
`dent that this will affect design considerations in calculat—
`ing the actual size of the channels in a field effect struc-
`ture like FIGURE 3, to be presently described, or the
`distribution of thickness in the base layer of the junction
`configuration of FIGURE 5, to be presently described.
`However,
`this variation does not aftect‘in a significant
`way the basic behavior of the device.
`‘
`‘
`Thus, a wafer is formed which includes a plurality of
`spaced holes extending through the same. Each of these
`holes is encircled by 2. Burgers circuit which has non-
`vanishing “Burgers vector.” For a description of Burg-
`ers circuits and vectors, see chapter 2 of Imperfections in
`Nearly Perfect Crystals, a symposium sponsored by the
`Committee on Solids. Division of Physical Sciences, Na-.
`tional Research Council, W. Shockley, Chairman Edi-
`torialCommittee. Published by John Wiley & Sons, Inc.,
`copyright 1952.
`The wafer, FIGURE 2, is suited admirably for forming
`devices for high frequency operation. For example, the
`p-type Wafer, FIGURE 1, may be subjected to a diffusion
`operation in which donors are diifused into the wafer.
`The diffusion of donors Will form an n-type layer ofrsub-
`stantially uniform depth on the surfaces of the wafer
`and along the surface of the holes. Subsequently the
`layers on the surface of the wafer may be removed by
`mechanical or chemical means except for a band 20 con
`necting the holes to leave a wafer of the type shown in
`FIGURES 3 and 4.
`By controlling the diffusion, the layers 16 at the holes
`may be made to approach one another within any desired
`small distance W. A relatively narrow and short chan-
`nel exists between the side 17 and 18 of the wafer. The
`length is
`represented by the distance L. The layers
`formed in the holes extend to the surfaCes of the “wafer.
`Electrical connection can be made to these layers from
`one or both ends. Conductive material may be intro-
`duced into the holes to make competent electrical con-
`tact along the inner exposed surface of the holes. Suit-
`able ohmic contacts can be made to the regions 17 and
`13 to form, for example, connections 21 and 22.\\-.The
`device may be operated as a field effect transistor in which
`the space charge layer in the channel is varied to control
`the [low of carriers from the source connection 21 to the
`drain connection 22. The relatively short narrow chan-
`nel provides a device suitable for high frequency opera-
`tion.
`Referring to FIGURE 5, another device constructed
`from a wafer of material in accordance with the inven-
`tion is illustrated. The device illustrated in FIGURE 5
`is made from a starting block of n-type material rather
`than p-type to illustrate the flexibility of the process.
`In
`the device of FIGURE 5, the diffusion is controlled to
`produce layers 16a. which join to form a continuous base
`layer of opposite conductivity type separating the two
`regions 26 and 27. Thus, emitter and collector junctions
`24 and 26 are formed. The base is relatively thin pro-
`viding high frequency operation; yet it is easy to make
`connection to the same. For example, contacts may be
`made to the base layer by introducing conductive material
`into the holes.
`'
`Crystals having boundaries with dislocations are often
`grown due to thermal strains. However, it is preferable
`to provide a controlled method for growing crystals
`having small angle boundaries.
`FIGURE 6 represents a single crystal seed suitable for g » 7
`[growing a crystal including a small angle boundary. The
`a
`seed 31 is cut from a perfect crystal of semiconductive 4
`‘-
`material so that the Various faces are properly oriented ’
`for seeding. The crystal is cut 32 so as to leave connec-
`
`’
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`10
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`15
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`20
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`25
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`30
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`35
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`40
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`45
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`50
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`55
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`60
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`65
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`7O
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`j;
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`.,..
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`3
`tions at relatively high and relatively low temperature
`points whereby a relative rotation of the two parts is
`produced due to thermal stress. The seed is stressed due
`to the temperature gradients which are set up as it is
`lowered into the melt. The lOWer portions 33 and 34 on
`either side of the groove are moved with respect to one
`another and the orientation of the, lower surface is
`changed. When the crystal is grown a grain boundary
`will be formed along the region defined by the groove due
`to the difference in crystal orientation on the two sides
`of the groove.
`FIGURES 7—9 represent another type of crystal seed
`structure which may be used for precise control of seed
`orientation.
`In this case, a structure is cut from a single
`crystal and has a region 36 in which differential expan-
`sion may be produced by a heater 37 so as to produce
`a controlled misorientation of the two seeds 38 and 39
`which extend down from the region 36. The principle
`involved is illustrated clearly in FIGURE 9 which rep-
`resents a plan View of the crystal. One leg of this frame 2
`is heated, causing it to expand, which results in a twisting
`of the two sides 41 and 42 separating the coldest part
`from the hottest part of the frame. From the theory
`of elasticity, it is possible to design frames so as to con-
`trol arbitrarily small angles of misfit and thus produce
`grain boundaries having large spacings between the dis-
`locations. FIGURE 9 illustrates an exaggerated case in
`which it is seen that the vertical seeds 38 and 39 which
`touch the melt are tipped through an angle represented
`by 0 on the diagram.
`FIGURE 10 represents a modification of the arrange-
`ment which brings the ends of the two seeds closer to-
`gether, where they dip into the melt.
`In FIGURE 11 a seed 46 is cut from a block of semi—
`conductive material which includes a twin boundary 47.
`A longitudinal groove 48 may be cut along the twin
`boundary as previously described, or the crystal may be
`subjected to stresses in any of the other manners de—
`scribed. The grown crystal will have a misaligned twin
`boundary. A crystal including a misaligned twin bound-
`ary is probably more stable than one having a grain
`boundary. The dislocations will
`tend to lie along the
`twin boundary.
`Thus, there is provided a novel wafer and method of
`making the same. The wafer is suitable for making high
`fi'equency devices.
`I claim:
`1. A method of making a junction semiconductive de-
`vice which comprises the steps of forming a wafer of
`semiconductive material of one conductivity type having
`first and second spaced surfaces with a plurality of holes
`extending through the wafer from one surface to the
`other, each of said holes being surrounded by a Burgers
`circuit having a non-vanishing Burgers vector, diffusing,
`semiconductive material of opposite conductivity type
`into the wafer along the inside surface of said holes to
`form a layer of opposite conductivity type defining each
`of said holes, and making ohmic contact to said wafer on
`opposite sides of Said holes and making ohmic contact
`to said layers.
`2. A wafer of semiconductive material of one con-
`
`10Dr
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`3,044,909
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`Cr
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`4
`ductivity type having first and second spaced surfaces, a
`boundary formed in said wafer and extending from one
`surface to the other, a plurality of spaced holes along the
`boundary and extending through the wafer from one
`surface to the other, each of said holes surrounded by 3
`Burgers circuit having a non—vanishing Burgers vector,
`and a layer of semiconductive material of opposite con—
`ductivity type surrounding said holes and forming a. junc-
`tion with the material of said one conductivity type.
`3. A semiconductive device comprising a‘block of ma-
`terial of one conductivity type having first and second
`spaced surfaces, a boundary formed in said water and
`extending from one surface to the other, a plurality of
`spaced holes lying along the boundary and extending
`through the wafer from one surface to the other, each
`of said holes surrounded by 3. Burgers circuit having a
`non-vanishing Burgers vector, 9. layer of semiconductive
`material of opposite conductivity type surrounding said
`holes and forming a junction with the material of said one
`conductivity type, the layers of adjacent holes extending
`toward one another to form a channel therebetween, con-
`tacts making ohmic connections to said block on op-
`posite sides of said boundary anda contact making ohmic
`contact to said layers of opposite conductivity type.
`4. A semiconductive device as in claim 3 wherein the
`adjacent layers are contiguous.
`5. A semiconductive device as in claim 3 wherein said
`layer of opposite conductivity type is formed by diffusion
`from the surface of the holes into the wafer.
`6. The method of making a junction semiconductive
`device which comprises the steps of growing a crystal
`having a boundary including a plurality of spaced disloca-
`tions surrounded by a Burgers circuit having a non-van-
`ishing Burgers vector, forming a wafer from said crystal
`which has first and second spaced surfaces with the bound-
`ary extending from one surface to the other, subjecting
`the wafer to an etchant whereby the material is prefer-
`ably removed at the dislocations to form closely spaced
`holes extending from one surface to the other, each hole
`surrounded by a Burgers circuit having a non-vanishing
`Burgers vector, diffusing semiconductive material of op-
`posite conductivity type into said wafer from the surface
`of the holes to form a layer of opposite conductivity type
`defining each of said holes and forming a junction with
`the wafer, and making ohmic contact to the wafer on op
`posite sides of said closely spaced holes and making ohmic
`contact to said layer of opposite conductivity type.
`7. A semiconductive device as in claim 6 wherein ad-
`jacent layers of opposite conductivity type are contiguous.
`
`References Cited in the file of this patent
`UNITED STATES PATENTS
`
`2,705,767
`2,748,041
`2,869,054
`
`Hall __________________ Apr. 5, 1955
`Leverenz ______________ May 29, 1956
`Tucker _______________- Jan. 13, 1959
`OTHER REFERENCES
`
`60
`
`Ellis: Journal of Applied Physics, vol. 26, Number 9,
`1955, pages 1140—6.
`Karstensen: Journal of Electronics and Control, vol. 3,
`pages 305—307, September 1957.
`
`.,'.
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