`
`
`
`Nader Bagherzadeh, Ph.D.
`
`
`
`Expertise
`
`
` Digital Signal Processing
`Architectures
` Processor Architectures (VLIW,
`Superscalar)
` VLSI Design
` Computer Networks & Digital
`Telecommunication
`
`
` Computer Graphics
` Memory System Architecture
` DRAM, SRAM, EEPROM, and
`Flash memory
` Automotive Computing
` Software Analysis
`
`
`
`Contact Information:
`Cell:
`
`(949) 400 5167
`Office:
`(949) 824 8720
`Email:
`nader@uci.edu
`Office Address:
`EH 4209
`Electrical Engineering and Computer Science Department
`University of California, Irvine
`Irvine, CA 92697
`
`Education
`
`Year
`1987
`1979
`1977
`
`College/University
`The University of Texas at Austin
`The University of Texas at Austin
`The University of Texas at Austin
`
`Degree
`Ph.D., Computer Engineering
`MS, Electrical Engineering
`BS (with honors), Electrical
`Engineering
`
`Employment History
`
`From:
`To:
`
`
`1987
`Present
`Position:
`
`
`
`University of California at Irvine
`Irvine, CA
`2003- Present: Professor, Department of Electrical Engineering and
`Computer Science
`1998-2002: Professor and Chair, ECE/EECS Department
`1993-1997: Associate Professor, ECE Department
`1987-1992: Assistant Professor, ECE Department
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 1
`
`LG Ex. 1008, pg 1
`
`LG Ex. 1008
`LG v. ATI
`IPR2017-01225
`
`
`
`Consultant Curriculum Vitae
`
`
`1980
`AT&T Bell Labs
`Holmdel, NJ
`1984
`Position: Member of Technical Staff, No.5 ESS Hardware/Software T1Line Interface
`Design
`
`
`
`From:
`To:
`
`
`
`Awards and Honors
`
`1973-77
`1984
`
`2002
`
`2002
`
`2014
`
`2014
`
`2015
`
`
`Consulting History
`
`From:
`To:
`
`
`From:
`To:
`
`
`From:
`To:
`
`
`Litigation Support Experience
`
`Date:
`
`
`
`
`
`
`
`
`
`
`
`
`
`Dean's honor roll for six semesters; UT Austin
`Outstanding achievement award; AT&T Bell Labs
`Best Paper award in IEEE Transactions on VLSI Design
`Best Student Paper award in the proceedings of ASPDAC'02
`Khwarizmi International Award
`IEEE Fellow
`Professor of the Year for the EECS Department, UCI
`
`2006
`2008
`Duties:
`
`2006
`2008
`Duties:
`
`STEC
`Irvine, CA
`Flash memory CODEC design and evaluation
`
`Tialinx
`Newport Beach, CA
`Radar DSP board design and evaluation
`
`2000
`2005
`Duties:
`
`Morpho Technologies
`Irvine, CA
`Co-Founder; DSP design for communication and multimedia systems
`
`2016
`Holland & Knight LLP
`Continental Automotive vs. Hamaton
`Case
`Expert Witness for Hamaton
`Project:
`Ongoing
`Status:
`Contact: Aaron Bradford,
` (303) 809 9388
`
`Latham & Watkins LLP
`No. 337-TA-984; Advanced Silicon Technologies, LLC v.
`NVIDIA Corporation, Case No. 1:15-01177 (D. Del.)
`Expert Witness for NVIDIA
`Project:
`Settled
`Status:
`Contact: Alan M. Billharz
`
`2016
`Case
`
`Date:
`
`
`
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 2
`
`LG Ex. 1008, pg 2
`
`
`
`
`
`Date:
`
`
`2016
`Case
`
`
`
`
`
`Project:
`Status:
`Contact:
`
`Consultant Curriculum Vitae
`
`
`555 Eleventh Street, NW
`Suite 1000
`Washington, D.C. 20004-1304
`Direct Dial: +1.202.637.2219
`Fax: +1.202.637.2201
`Email: alan.billharz@lw.com
`
`Baker & Hostetler LLP
`Technology Properties Limited LLC v. Hewlett-Packard Co.
`Case No. 4:14-cv-03643-CW; BakerHostetler; Reference No. 105430.000001
`Expert Witness for HP
`Settled
`T. Cy Walker,
`Washington Square, Suite 1100
`1050 Connecticut Ave, N.W.
`Washington, DC 20036-5304
`(202) 861 1688
`cwalker@bakerlaw.com
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`2015
`Knobbe Martens Olson & Bear LLP
`Shoutpoint vs. Broadnet Teleservices
`Case
`Expert Witness for Shoutpoint
`Project:
`Settled
`Status:
`Contact: Michelle Armond, 2040 Main Street, 14th Floor
`Irvine, CA 92614; Michelle.Armond@knobbe.com
`(949) 721 7671
`
`2015
`King & Spalding LLP
`Goodman vs. SMART Modular Technologies, Inc.
`Case
`Expert Witness for Smart Modular Technologies;
`Project:
`In progress
`Status:
`Contact: Michael Heafey, 601 S. California Ave., Palo Alto, CA 94304;
`MHeafey@kslaw.com; Tel: (650) 422 6700
`
`2015
`Duane Morris LLP
`GoPro, LG, Nokia, Sony and Samsung vs. Vstream
`Case
`IPR, Expert Witness for GoPro
`Project:
`Settled
`Status:
`Contact: Karineh Khachatourian, 2475 Hanover Street
`Palo Alto, CA 94304-1194; karinehk@duanemorris.com
`(650) 847 4145
`
`Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
`Sony vs. LongRun Technologies, LLC
`Breach of Intellectual Property License Action, Expert Witness for Sony,
`testified in front of the Arbitral Tribunal of The Japan Commercial
`
`2015
`Case
`Project:
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 3
`
`LG Ex. 1008, pg 3
`
`
`
`Consultant Curriculum Vitae
`
`
`Arbitration Association in Tokyo, Japan, September 2015
`Tribunal reached a decision
`Status:
`Contact: Anita Bhushan, 3500 SunTrust Plaza, 303 Peachtree St, N.E.
`Atlanta, GA 30308-3201; anita.bhushan@finnegan.com
`(404) 653 6450
`
`2014
`Knobbe Martens Olson & Bear LLP
`Skyworks vs. Kinetic Technologies
`Case
`Expert Witness for Skyworks
`Project:
`Closed
`Status:
`Contact: Michelle Armond, 2040 Main Street, 14th Floor
`Irvine, CA 92614; Michelle.Armond@knobbe.com
`(949) 721 7671
`
`Mayer Brown LLP
`Inter Partes Review LG Electronics vs. AMD
`Expert Witness for LG; deposed twice (August 2015) and (September
`2015)
`In progress;
`Status:
`Contact: Michael Maas, 1999 K Street, N.W.
`Washington, D.C. 20006; (202) 263-3138; mmaas@mayerbrown.com
`
`2014
`Case
`Project:
`
`2014
`Case
`
`King & Spalding LLP
`Inter Partes Review Microsoft Mobile Oy
`Superinterconnect Technologies LLC
`Expert Witness for Microsoft and Nokia
`Project:
`Settled
`Status:
`Contact: Anup Shah, 100 North Tryon Street, Suite 3900
`Charlotte, NC 28202; (704) 503-2559; ashah@kslaw.com
`
`and Nokia vs.
`
`2014
`Case
`
`Project:
`
`Status:
`Contact:
`
`WilmerHale
`Bridgestone Americas Tire Operations v. Schrader-Bridgeport and TRW
`Automotive Holdings
`Expert Witness for Bridgestone Tire; deposed (March 2015); Jury Trial
`Testimony at the US District Court in Delaware, Judge Gregory Sleet,
`(June 2015)
`Completed
`Tara Elliott, 1875 Pennsylvania Avenue, NW
`Washington, DC 20006; (202) 663 6748
`
`2014
`King & Spalding LLP
`Inter Partes Review of NetList Patents
`Case
`Expert Witness for Smart Modular Technologies; deposed (May 2015)
`Project:
`In progress
`Status:
`Contact: Michael Heafey, 601 S. California Ave., Palo Alto, CA 94304;
`MHeafey@kslaw.com; Tel: (650) 422 6700
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 4
`
`LG Ex. 1008, pg 4
`
`
`
`Consultant Curriculum Vitae
`
`
`2014
`Case
`
`Project:
`Status:
`Contact:
`
`2013
`Case
`Project:
`Status:
`Contact:
`
`Quinn Emanuel Urquhart & Sullivan, LLP
`PalmChip Corporation vs. Ralink Technology Corporation (MediaTek
`Inc.)
`Expert Witness for MediaTek
`Closed in favor of my client
`Robert Kang, 50 California Street, 22nd Floor, San Francisco, CA 94111;
`Tel: (415) 875 6318
`
`WilmerHale
`Broadcom vs. U.S. Ethernet Innovations
`Expert Witness for Broadcom; Patents;
`Settled
`John Hobgood, 60 State Street, Boston, MA 02109; 617 526 6658
`
`2012
`Case
`Project:
`
`Orrick
`Smart Module vs. Netlist
`Expert Witness for Smart Modular; Netlist infringement on Smart Module
`LRDIMM patents (‘295); deposed, and provided invalidity and other
`reports
`Closed
`Status:
`Contact: Michael Heafey, Menlo Park, CA.; 650 614-7417
`
`2012
`Leopold Law
`Lower Fees vs. Bankrate
`Case
`Expert Witness for Lower Fees
`Project:
`Settled
`Status:
`Contact: Greg Weiss, Palm Beach Gardens, FL.; 877.515.7955
`
`2012
`Case
`Project:
`
`2011
`Case
`Project:
`
`Fish and Richardson
`RIM ITC vs. GPH
`Expert Witness for RIM; I was deposed for this case, and provided
`invalidity and non-infringement reports
`Settled
`Status:
`Contact: W. Peter Guarnieri, Washington D.C.; 202.626.7701
`
`Horwitz, Horwitz, and Paradis
`Class vs. Toyota
`Expert Witness for the Class; Reviewing SCM code; provided expert
`report and rebuttal report; was deposed for this case on March 7, 2013
`In progress
`Paul Paradis, NY, NY; (212) 986 4500
`
`Steptoe and Johnson LLP
`Google vs. Oracle
`Expert Witness for Google; Oracle Sparc products infringing on Google
`
`Status:
`Contact:
`
`2011
`Case
`Project:
`
`
`
`Date:
`
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 5
`
`LG Ex. 1008, pg 5
`
`
`
`Consultant Curriculum Vitae
`
`
`Status:
`Contact:
`
`patents
`No action
`Paul Gennari, Washington, D.C.; (202) 429-6413
`
`2011
`Case
`Project:
`
`Status:
`Contact:
`
`2011
`Case
`Project:
`
`Freitas, Tseng, and Kaufman LLP
`Nanya ITC vs Elpida
`Expert Witness for Nanya; I was deposed for this case; I also testified at
`the ITC court (Dec 2012).
`Completed
`Jason Angell, Redwood Shores, CA; (650) 730 5526
`
`ORC International
`Consulting to client law firm
`Evaluating flash internals and UID information – consulting assignment
`performed analysis for client law firm. Assisted in review of case
`documents submitted by another expert
`Foreign litigation (completed)
`Status:
`Contact: Denys Badziuk; Kiev, Ukraine
`
`2011
`Case
`Project:
`Status:
`Contact:
`
`2011
`Case
`Project:
`
`Status:
`Contact:
`
`Orrick
`Netlist - DRAM module Patent(s)
`Expert Witness; Reexamination of several DRAM module patents
`Completed
`Jason Yu; Menlo Park, CA; (650) 614-7363
`
`Milberg
`Class v Nvidia
`Expert Witness for the Class; Laptop and Tablet Replacement -
`Reviewing the replacement proposal
`Finalized
`Jeff Westerman; Los Angeles, CA; (213) 617-1200
`
`2008
`Case
`
`Orrick
`Rambus Inc v Samsung Electronic Co LTD & Nanya Technology
`Corporation, et al.
`Patent infringement analysis made and deposition given on behalf of the
`defendant Nanya
`Contact: Vickie Feeman; (650) 614-7620
`
`Project:
`
`2004
`Client Confidential
`1T-SRAM Technology Evaluation
`Case
`Project: M&A of the company by an investor group
`Status:
`Completed
`
`2003
`Case
`
`Bright & Lorig
`Microprocessor bus arbitration
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`Date:
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 6
`
`LG Ex. 1008, pg 6
`
`
`
`Consultant Curriculum Vitae
`
`
`Project:
`
`Status:
`
`2002
`Case
`Project:
`
`Status:
`
`2000
`Case
`Project:
`
`Status:
`Contact:
`
`1999
`Case
`Project:
`
`Status:
`
`Patent infringement where I served as an expert witness, the case was
`settled (to the best of my knowledge)
`Settled
`
`Carr Korein & Tillery
`Microprocessor Study
`Performance of the architecture evaluation and analysis. Final status not
`disclosed.
`Undisclosed
`
`McDermott, Will & Emery
`DRAM Charge Pump Design
`Patent infringement case where I served as an expert witness to evaluate
`patents related to DRAM design, also I gave tutorial lectures to attorneys
`in charge for this case which I think finally settled.
`Settled
`Fay Morisseau; Orange County, CA; (949) 757 7115
`
`McDermott, Will, and Emery
`Medical Pump
`Patent infringement and trade secrets where I served as an expert witness,
`and gave a deposition regarding my findings. The software design and
`system integration associated with the original medical pump was the
`focus of this case. (deposed)
`Settled
`
`P. Suhler, N. Bagherzadeh, M. Malek, and N. Iscoe, "Software authorization
`systems," IEEE Software, pp. 34-41, September 1986.
`
`A. Guzman, E. Krall, P. McGehearty, and N. Bagherzadeh, "Performance of symbolic
`applications on a parallel architecture,"
`International Journal of Parallel
`Programming, vol. 16, no.3, pp. 183-214, 1987.
`
`Y. Moon, N. Bagherzadeh, and J. Sklansky, "A macropipelined multicomputer
`architecture for image analysis," Journal of the Optical Society of America, pp. 951-
`962, 1989.
`
`D. Blough and N. Bagherzadeh, "Near-optimal message routing and broadcasting in
`faulty hypercubes," International Journal of Parallel Programming, vol. 19, no. 5,
`pp. 405-423, 1990.
`
`Publications
`
`Journals Refereed
`
`j1
`
`
`
`
`
`
`Date:
`
`
`
`
`
`Date:
`
`
`
`
`
`
`Date:
`
`
`
`
`
`
`
`
`j2
`
`
`j3
`
`
`j4
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 7
`
`LG Ex. 1008, pg 7
`
`
`
`Consultant Curriculum Vitae
`
`
`N. Bagherzadeh, S. Heng, and C. Wu, "A parallel asynchronous garbage collection
`algorithm for distributed systems," IEEE Transactions on Knowledge and Data
`Engineering, vol. 3, no. 1, pp. 100-107, March 1991.
`
`A. Kavianpour and N. Bagherzadeh, "Application of three-valued logic for distributed
`termination detection,"
`International Journal of Computers and Electrical
`Engineering, vol. 17, no. 2, pp. 65-74, 1991.
`
`A. Kavianpour and N. Bagherzadeh, "Finding circular shapes in an image on a
`pyramid architecture," Pattern Recognition Letters, vol. 13, no. 12, pp. 843-848,
`December 1992.
`
`N. Bagherzadeh and K. Hawk, "Parallel implementation of the auction algorithm on
`the Intel hypercube," Journal of Computer and Software Engineering, vol. 1, no. 1,
`pp. 17-32, 1993.
`
`A. Abnous, C. Christensen, J. Gray, J. Lenell, A. Naylor, and N. Bagherzadeh,
`"Design and implementation of the
`'Tiny RISC' microprocessor," Journal of
`Microprocessors and Microsystems, vol. 16, no. 4, pp.187-193, 1992.
`
`A. Abnous and N. Bagherzadeh, "Pipelining and bypassing in a VLIW processor,"
`IEEE Transactions on Parallel and Distributed Systems, vol. 5, no. 6, pp. 658-664,
`June 1994.
`
`A. Kavianpour and N. Bagherzadeh, "A systematic approach for mapping application
`tasks in hypercubes," IEEE Transactions on Computers, vol. 42, no. 6, pp. 742-746,
`June 1993.
`
`A. Kavianpour and N. Bagherzadeh, "Parallel algorithms for line detection on a
`pyramid architecture," International Journal of Pattern Recognition and Artificial
`Intelligence, Vol. 8, no.1, pp. 337-349, 1994.
`
`C. Bowen and N. Bagherzadeh, "Image processing applications in C++ on a
`hypercube multicomputer," International Journal of Computers and Electrical
`Engineering, vol. 19, no. 5, pp. 351-364,1993.
`
`A. Kavianpour, S. Shoari, and N. Bagherzadeh, "A new approach for circle detection
`on multiprocessors," Journal of Parallel and Distributed Computing, vol. 20, no. 2,
`pp. 256-260, February 1994.
`
`S. Latifi and N. Bagherzadeh, "Incomplete star: An incrementally scalable network
`based on the star graph," IEEE Transactions on Parallel and Distributed Systems,
`vol. 5, no. 1, pp. 97-102, January 1994.
`
`
`
`j5
`
`
`j6
`
`
`j7
`
`
`j8
`
`
`j9
`
`
`j10
`
`
`j11
`
`
`j12
`
`
`j13
`
`
`j14
`
`
`j15
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 8
`
`LG Ex. 1008, pg 8
`
`
`
`Consultant Curriculum Vitae
`
`
`N. Bagherzadeh, N. Nassif, and S. Latifi, "A routing and broadcasting scheme on
`faulty star graphs," IEEE Transactions on Computers, Vol 42, no. 11, pp 1398-1403,
`November 1993.
`
`J. Gray, A. Naylor, A. Abnous, and N. Bagherzadeh, "VIPER: a VLIW integer
`microprocessor," IEEE Journal of Solid States and Circuits, Vol. 28, no. 12, pp
`1377-1383, December 1993.
`
`J. Lenell and N. Bagherzadeh, "A performance comparison of several superscalar
`processor models with a VLIW processor," Journal of Microprocessors and
`Microsystems, Vol 18, no. 3, pp 232-242, 1994.
`
`A. Kavianpour, N. Bagherzadeh, and S. Shoari, “Finding elliptical shapes in an image
`using a pyramid architecture, ” International Journal of Computers and Electrical
`Engineering, vol. 21, no. 1, pp. 69-75, Jan 1995.
`
`S. Latifi, M. M. de Azevedo, and N. Bagherzadeh, “A star-based I/O-bounded
`network for massively parallel systems,” IEE Proceedings-Computers and Digital
`Techniques, Vol. 142, No. 1, January 1995.
`
`issues of a superscalar
`S. Wallace and N. Bagherzadeh, “Performance
`microprocessor,” Microprocessors and Microsystems, Vol. 19, No. 4, pp 187-199
`(1995).
`
`A. Abnous and N. Bagherzadeh, “Architectural design and analysis of a VLIW
`processor,” International Journal of Computers and Electrical Engineering, Vol 21,
`No. 2, pp 119-142 (1995).
`
`T. Kato and N. Bagherzadeh, “A novel superscalar architecture using scheduling
`patterns and performance analysis,” The Transactions of the Institute of Electronics,
`Information, and Communication Engineers D-I, Vol.J78-D-I, No. 9, pp 809-819
`(1995).
`
`N. Bagherzadeh and M. Dowd, “Computation in faulty stars,” IEEE Transactions on
`Reliability, Vol 44, No. 1, pp 114-119 (1995).
`
`N. Bagherzadeh, M. Dowd, and S. Latifi, “A well-behaved enumeration of star
`graphs,” IEEE Transactions on Parallel and Distributed Systems, Vol 6, No. 5, pp
`531-535, May (1995).
`
`
`j21 M. M. de Azevedo, N. Bagherzadeh, and S. Latifi, “Broadcasting algorithms for the
`star-connected cycles interconnection network,” Journal of Parallel and Distributed
`Computing, 25, 209-222 (1995).
`
`
`j16
`
`
`j17
`
`
`j18
`
`
`j19
`
`
`j20
`
`
`j22
`
`
`j23
`
`
`j24
`
`
`j25
`
`
`j26
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 9
`
`LG Ex. 1008, pg 9
`
`
`
`Consultant Curriculum Vitae
`
`
`
`j27 M. M. de Azevedo, N. Bagherzadeh, M. Dowd, and S. Latifi, “Some topological
`properties of star connected cycles,” Information Processing Letters, 58, pp 81-85
`(1996).
`
`
`j28
`
`
`j29
`
`
`j30
`
`
`j31
`
`
`j32
`
`
`j33
`
`
`j34
`
`
`j35
`
`N. Bagherzadeh, M. Dowd, and N. Nassif, “Embedding an arbitrary binary tree into
`the star graph,” IEEE Transactions on Computers, Vol 45, No. 4, pp 475-481 (1996).
`
`N. Bagherzadeh and M. Dowd, “Problems on routing bounded distance assignments
`in hypercubes,” Computer Systems-Science and Engineering, Vol 11, No. 4, pp 221-
`226, July (1996).
`
`S. Latifi and N. Bagherzadeh, “On cluster-star graph and its properties,” Computer
`Systems-Science and Engineering, Vol 11, No. 3, pp 145-149, May (1996).
`
`S. Shoari and N. Bagherzadeh, “Computation of the fast fourier transform on the star-
`connected cycle networks,” International Journal of Computers and Electrical
`Engineering, Vol 22, No. 4, pp 235-246 (1996).
`
`N. Nassif and N. Bagherzadeh, “A grid embedding into the star graph for image
`analysis solutions,” Information Processing Letters, Vol. 60, No. 5, pp 255-260
`(1996).
`
`S. Latifi, N. Bagherzadeh, and R. Gajjala, “Fault-tolerant embedding of linear arrays
`and rings in the star graph,” International Journal of Computers and Electrical
`Engineering, Vol 23, No. 2, pp 95-107 (1997).
`
`S. Latifi and N. Bagherzadeh, “On embedding rings into a star-related network,”
`Information Sciences, Vol. 99, No. 1-2, pp 21-35 (1997)
`
`S. Shoari, N. Bagherzadeh, T. Milner, and J. S. Nelson, “Moment algorithms for
`blood vessel detection in infrared images of laser-heated skin,” International Journal
`of Computers and Electrical Engineering, Vol 23, No. 5, January (1998).
`
`
`j36 M. M. de Azevedo, N. Bagherzadeh, M. Dowd, and S. Latifi, “Average distance and
`routing algorithms
`in
`the
`star-connected cycles
`interconnection network,”
`International Journal of Science and Technology-Special Issue of Computer in
`Scientia Iranica, Vol. 3, No. 4, (1997).
`
`
`j37
`
`N. Bagherzadeh, M. Dowd, and S. Latifi, “Faster Column Operations in Star
`Networks,” Telecommunication Systems, Vol. 10, Nos. 1, 2 (1998).
`
`
`j38 M. M. de Azevedo, N. Bagherzadeh, and S. Latifi, “Low expansion packings and
`embeddings of hypercubes into star graphs: a performance-oriented approach,” IEEE
`Transactions on Parallel and Distributed Systems, Vol. 9, No. 3, (1998).
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 10
`
`LG Ex. 1008, pg 10
`
`
`
`
`j39
`
`
`j40
`
`
`j41
`
`
`j42
`
`Consultant Curriculum Vitae
`
`
`S. Shoari, N. Bagherzadeh, D. Goodman, T.E. Milner, D. J. Smithies, and J.S.
`Nelson, “A parallel algorithm for pulsed laser infrared tomography,” Pattern
`Recognition Letters, 19 (1998).
`
`S. Wallace and N. Bagherzadeh, “A scalable register file architecture for superscalar
`processors,” Microprocessors and Microsystems, Vol. 22, No. 1, (1998).
`
`S. Wallace and N. Bagherzadeh, “Modeled and measured instruction fetching
`performance for superscalar microprocessors,” IEEE Transactions on Parallel and
`Distributed Systems, Vol. 9, No. 6, (1998).
`
`N. Nassif and N. Bagherzadeh, “Image component labeling on the star graph using
`divide and conquer,” IEE Proceedings-Computers and Digital Techniques, Vol. 145,
`No. 1, (1998).
`
`
`j43 M. Lee, G. Lu, H. Singh, N. Bagherzadeh, F. Kurdahi, E. Filho, and V. Castro Alves,
`“MorphoSys A Reconfigurable Computing Chip,” IEEE Circuits and Systems
`Newsletter, Vol. 10, No 1, March/April 1999.
`
`
`
`j44 M. Lee, H. Singh, G. Lu, N. Bagherzadeh, F. Kurdahi, E. Filho, and V. Castro Alves,
`“Design and
`Implementation of
`the MorphoSys Reconfigurable Computing
`Processor,” Journal of Signal Processing Systems for Signal, Image, and Video
`technology, Vol. 24, No. 2/3, pp. 147-164, March 2000.
`
`
`j45
`
`
`j46
`
`
`j47
`
`
`j48
`
`
`
`H. Singh, M. Lee, G. Lu, F. Kurdahi, N. Bagherzadeh, and E. Filho, “MorphoSys: An
`Integrated Reconfigurable System for Data-Parallel and Computation-Intensive
`Applications,” IEEE Transactions on Computers, Vol. 49, No. 5, pp. 465-481 (2000).
`
`R. Maestre, F. Kurdahi, M. Fernandez, R. Hermida, N. Bagherzadeh, and H. Singh,
`“Kernel scheduling
`techniques
`for efficient solution of space exploration
`in
`reconfigurable computing,” EUROMICRO Journal of Systems Architecture on
`Modern Methods and Tools in Digital System Design, 2000.
`
`R. Maestre, F. Kurdahi, M. Fernandez, R. Hermida, N. Bagherzadeh, and H. Singh,
`“A Formal Approach to Context Scheduling for Multi-context Reconfigurable
`Architectures,” IEEE Transactions on VLSI Design-Special Issue on Reconfigurable
`Computing, Vol. 9, Issue 1, pp. 173-185, Feb 2001.
`
`R. Maestre, F. Kurdahi, M. Fernandez, R. Hermida, N. Bagherzadeh, and H. Singh,
`“A Framework for Reconfigurable Computing: Task Scheduling and Context
`Management,” IEEE Transactions on VLSI Design-Special Issue on System Level
`Design, Vol. 9, Issue 6, pp. 858-873, Dec 2001 (Best Paper Award).
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 11
`
`LG Ex. 1008, pg 11
`
`
`
`
`j52 M. Sanchez-Elez, H. Du, N. Tabrizi, Y. Lung, N. Bagherzadeh, and M. Fernandez,
`“Algorithm Optimizations and Mapping Scheme for Interactive Ray Tracing on a
`Reconfigurable Architecture,” Computers & Graphics, 2003
`
`
`j49
`
`
`j50
`
`
`j51
`
`
`j53
`
`
`j54
`
`
`j55
`
`
`j56
`
`
`j57
`
`
`j58
`
`
`j59
`
`Consultant Curriculum Vitae
`
`
`P. Chou, J. Liu, D. Li, and N. Bagherzadeh, “IMPACCT: Methodology and Tools for
`Power-Aware Embedded Systems,” Kluwer Design Automation of Embedded
`Systems, pp. 205-232, October 2002.
`
`J. Liu, P. Chou, and N. Bagherzadeh, “Power-Aware Task Motion for Enhancing
`Dynamic Range of Embedded Systems with Renewable Energy Sources in
`Proceedings of the Workshop on Power Aware Computer Systems,” in Lecture Notes
`in Computer Science (LNCS), Springer-Verlag, pp. 84--99. 2002.
`
`R. Maestre, F. Kurdahi, M. Fernandez, R. Hermida, N. Bagherzadeh, and H. Singh,
`“A Framework for Reconfigurable Computing: Task Scheduling and Context
`Management-a Summary,” Circuits and Systems Magazine, IEEE, Vol. 2, Issue 4, pp.
`48-51, 2002.
`
`G. Venkataramani, W. Najjar, F. Kurdahi, N. Bagherzadeh, W. Bohm and J.
`Hammes, “Automatic Compilation to a Coarse-grained Reconfigurable System-on-
`Chip,” ACM Trans. on Embedded Computing Systems, November 2003.
`
`B. Gorjiara, N. Bagherzadeh, and P. Chou, “Ultra-fast and Efficient Algorithm for
`Energy Optimization by Gradient-based Stochastic Voltage and Task Scheduling,”
`ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume
`12 , Issue 4 (September 2007)
`
`J. Bahn, S. Lee, and N. Bagherzadeh, “Design of a Router for Network-on-Chip,”
`International Journal of High Performance Systems Architecture, 2007 - Vol. 1, No.2
`pp. 98 - 105
`
`A. Niktash, H. Parizi, and N. Bagherzadeh, “A Reconfigurable Processor for Forward
`Error Correction,” ARCS 2007, LNCS 4415, pp. 1-13, 2007
`
`J. Bahn and N. Bagherzadeh, “Design of Simulation and Analytical Models for a 2D-
`meshed Asymmetric Adaptive Router,” Computers & Digital Techniques, IET,
`Volume 2, Issue 1, January 2008 Page(s):63 - 73
`
`F. Rivera, M. Sanchez-Elez, R. Hermida, and N. Bagherzadeh, “Scheduling
`methodology for conditional execution of kernels onto multicontext reconfigurable
`architectures,” Computers & Digital Techniques, IET, Volume 2, Issue 3, May 2008
`Page(s):199 - 213
`
`J. Bahn, S. Lee, Y. Yang, J. Yang, and N. Bagherzadeh, “On Design and Application
`Mapping of a Network-on-Chip (NoC) Architecture,” Parallel Processing Letters
`(PPL), Volume: 18, Issue: 2 (June 2008), pp. 239 - 255
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 12
`
`LG Ex. 1008, pg 12
`
`
`
`Consultant Curriculum Vitae
`
`
`N. Tabrizi and N. Bagherzadeh, “An ASIC Design and Formal Analysis of a Novel
`Pipelined and Parallel Sorting Accelerator,” Integration, The VLSI Journal, Volume
`41, Issue 1 (January 2008), Pages 65-75
`
`S. Lee, J. Bahn, Y. Yang, and N. Bagherzadeh, “A Generic Network Interface
`architecture for a Networked Processor Array (NePA),” ARCS 2008, LNCS 4934, pp.
`247–260, 2008
`
`J. Bahn, J. Yang, W. Hu, and N. Bagherzadeh, “Parallel FFT Algorithms on Network-
`on-Chips,” Journal of Circuits, Systems, and Computers 18(2): 255-269, 2009.
`
`F. Bagci, F. Kluge, T. Ungerer, and N. Bagherzadeh, “Optimisations for LocSens - an
`Indoor Location Tracking System Using Wireless Sensors,” International Journal of
`Sensor Networks (IJSNET), Vol. 6, Nos. 3/4, 2009.
`
`
`
`j60
`
`
`j61
`
`
`j62
`
`
`j63
`
`
`j64
`
`J. Bahn and N. Bagherzadeh, “On-Chip Interconnection Network with an Efficient
`Parallel Buffer
`Structure and Generic Traffic,” Scientia Iranica, Computer Science & Engineering
`and Electrical Engineering. Vol. 16, No. 2, pp. 104-118, 2009.
`
`j65 M. Sanchez-Elez, N. Bagherzadeh, and R. Hermida, “A Framework for Low Energy
`Data Management in Reconfigurable Multi-Context Architectures,” Journal of
`Systems Architecture, 2009, Pages 127-139
`
`
`j66
`
`
`j67
`
`
`j68
`
`
`j69
`
`
`j70
`
`
`j71
`
`
`
`S. Lee and N. Bagherzadeh, “A Variable Frequency Link for a Power-Aware
`Network-on-Chip (NoC)),” INTEGRATION, the VLSI Journal, 42 (2009) 479–485
`
`S. Lee and N. Bagherzadeh, “A High Level Power Model for Network-on-Chip
`(NoC) Router,” Computers and Electrical Engineering, 35 (2009) 837–845
`
`Y. Yang, J. Bahn, S. Lee, J. Yang, and N. Bagherzadeh, “Parallel Processing for
`Block Ciphers on a Fault Tolerant Networked Processor Array,” International
`Journal of High Performance Systems Architecture, Vol. 2, Nos. 3/4, 2010
`
`J. Yang, S. Lee, C. Chen, and N. Bagherzadeh, “Ray Tracing on a Networked
`Processor Array,” International Journal of Electronics, 2010, 97(10):1193-1205
`
`F. Bagci, T. Ungerer, and N. Bagherzadeh, “Multi-level Security in Wireless Sensor
`Networks,” International Journal on Advances in Software, Vol. 4, No. 6, 2010.
`
`C. Wang, W. Hu, S. Lee, and N. Bagherzadeh, “Area and Power-Efficient Innovative
`Congestion-Aware Network-on-Chip,” Journal of Systems Architecture, Volume 57
`Issue 1, Pages 24-38, January, 2011
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 13
`
`LG Ex. 1008, pg 13
`
`
`
`Consultant Curriculum Vitae
`
`
`A. Hatanaka and N. Bagherzadeh, “A Scheduling Approach for Distributed Resource
`Architectures with Scarce Communication Resources,” Int. J. High Performance
`Systems Architecture, Vol. 3, No. 1, Pages 12-22, 2011
`
`C. Wang and N. Bagherzadeh, “High-throughput Differentiated Service Provision
`Router Architecture for Wireless Network-on-Chip,” Int. J. High Performance
`Systems Architecture, Vol. 4, No. 1, Pages 38-56, 2012
`
`F. Bolanos, J. Aedo, F. Rivera, and N. Bagherzadeh, “Mapping and Scheduling in
`Heterogeneous NoC through Population-Based Incremental Learning,” Journal of
`Universal Computer Science, vol. 18, no. 7 (2012), 901-916
`
`A. Hatanaka and N. Bagherzadeh, “A Software Pipelining Algorithm of Streaming
`Applications with Low Buffer Requirements,” Transactions D: Computer Science &
`Engineering and Electrical Engineering, Vol. 19, No. 3, Pages 627-634, 2012
`
`H. Abdullah, H. A. Elsadek, H. E. ElDeeb, and N. Bagherzadeh, “Fractional
`Derivatives Based Scheme for FDTD Modeling of nth-Order Cole–Cole Dispersive
`Media,” IEEE Antennas and Wireless Propagation Letters, Vol. 11, Pages 281-284,
`2012
`
`A. Alhussien, C. Wang, and N. Bagherzadeh, “Design and Evaluation of a High
`Throughput Robust Router for Network-on-Chip,” IET Computers & Digital
`Technique, Vol. 6, Issue. 3, pp. 173–179, 2012
`
`C. Wang, W. Hu, and N. Bagherzadeh, “A Load-Balanced Congestion-Aware
`Wireless Network-on-Chip Design for Multi-Core Platforms,” Microprocessors and
`Microsystems, Vol. 36, Issue. 7, pp. 555-570, 2012
`
`S. Azampanah, A. Khademzadeh, N. Bagherzadeh, M. Janidarmian, and R. Shojaee
`“Contention-Aware Selection Strategy for Application-Specific Network-on-Chip,”
`IET Computers & Digital Technique, Vol. 7, Issue. 3, pp. 105-114, 2013
`
`F. Bolanos, F. Rivera, J.E. Aedo, and N. Bagherzadeh, “From UML Specifications to
`Mapping and Scheduling of Tasks into a NoC, with Reliability Considerations,”
`Journal of Systems Architecture, Vol. 59, Issue 7, pp. 429-440, 2013
`
`X. Wang, M. Yang, Y. Jiang, M. Palesi, P. Liu, T. Mak, and N. Bagherzadeh,
`“Efficient Multicast Schemes for 3-D Networks-on-Chip,” Journal of Systems
`Architecture, Vol. 59, Issue 9, pp. 693-708, 2013
`
`
`j75 W. Hu, C. Chen, J. Bahn, and N. Bagherzadeh, “Parallel Low-Density Parity Check
`Decoding on a Network-on-Chip-Based Multiprocessor Platform,” IET Computers &
`Digital Techniques, Vol. 6, Issue. 2, pp. 86–94, 2012
`
`
`j72
`
`
`j73
`
`
`j74
`
`
`j76
`
`
`j77
`
`
`j78
`
`
`j79
`
`
`j80
`
`
`j81
`
`
`j82
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 14
`
`LG Ex. 1008, pg 14
`
`
`
`Consultant Curriculum Vitae
`
`
`A. Alhussien, F. Verbeek, B. van Gastel, N. Bagherzadeh, and J. Schmaltz, “Fully
`Reliable Dynamic Routing Logic for a Fault-Tolerant NoC Architecture,” Journal of
`Integrated Circuits and Systems, Vol. 8, Issue. 1, pp. 43-53, 2013
`
`C. Wang, W. Hu, and N. Bagherzadeh, “Scalable Load Balancing Congestion-Aware
`Network-on-Chip Router Architecture,” Journal of Computer and System Sciences,
`Vol. 79, Issue. 4, pp. 421-439, 2013
`
`A. Demiriz, N. Bagherzadeh, and A. Alhussein, “Using Constraint Programming for
`the Design of Network-on-Chip Architectures,” Computing (Springer), DOI
`10.1007/s00607-013-0359-4, 2013
`
`C. Wang and N. Bagherzadeh, “Design and Evaluation of a High Throughput QoS-
`Aware and Congestion-Aware Router Architecture
`for Network-on-Chip,”
`Microprocessors and Microsystems, Vol. 38, Issue. 4, pp. 304-315, 2014
`
`A. Del Barrio, N. Bagherzadeh, and R. Hermida, “Ultra-Low-Power Adder Stage
`Design for Exascale Floating Point Units,” ACM Transactions on Embedded
`Computing Systems(TECS), Vol. 13, Issue. 3, Article No. 105, March 2014
`
`R. Mirzaee, K. Navi, and N. Bagherzadeh, “High-Efficient Circuits for Ternary
`Addition,” VLSI Design, Volume 2014, Article ID 534587, pp.1-15, 2014
`
`S. Angizi, E. Alkaldy, N. Bagherzadeh, and K. Navi, “Novel Robust Single Layer
`Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with
`Quantum-Dot Cellular Automata,” Journal of Low Power Electronics, Vol. 10, No. 2,
`pp. 259-271, 2014
`
`A. Demiriz, N. Bagherzadeh, and O. Ozturk, “Voltage Island Based Heterogeneous
`NoC Design Through Constraint Programming,” Computers and Electrical
`Engineering (Elsevier), 40 (2014) 307-316
`
`
`j91 W. Hu, C. Wang, and N. Bagherzadeh, “Design and Analysis of a Mesh-Based
`Wireless Network-on-Chip,” Journal of Supercomputing
`(Springer), DOI
`10.1007/s11227-014-1341-4, 22 November, 2014
`
`
`j83
`
`
`j84
`
`
`j85
`
`
`j86
`
`
`j87
`
`
`j88
`
`
`j89
`
`
`j90
`
`
`j92
`
`F. Sharifi, M. H. Moaiyeri, K. Navi, and N. Bagherzadeh, “Quaternary Full Adder
`Cells Based on Carbon Nanotube FETs,” Journal of Computer. Electronics
`(Springer), DOI 10.1007/s10825-015-0714-0, 2015
`
`
`j93 M. Khayambashi, P. Yaghini, A. Eghbal, and N. Bagherzadeh, “Analytical Reliability
`Analysis of 3D NoC under TSV Failure,” ACM Journal on Emerging Technologies in
`Computing Systems, Vol. 11, No. 4, Article 43, April 2015
`
`
`
`Resume of Nader Bagherzadeh, Ph.D.
`
`
`
`
`
`
`
`
`Page 15
`
`LG Ex. 1008, pg 15
`
`
`
`
`j94
`
`
`j95
`
`
`j96
`
`
`j97
`
`
`j98
`
`
`j99
`
`
`j100
`
`
`j101
`
`Consultant Curriculum Vitae
`
`
`H. Karkhaneh, J-M. Liu, A. Ghorbani, and N. Bagherzadeh, “Fiber Dispersion Effects
`in Injection-Locked Optical OFDM Systems,” Optical and Quantum Electronics
`(Springer), DOI 10.1007/s11082-015-0197-z (2015)
`
`A. Eghbal, P. Yaghini, N. Bagherzadeh, and M. Khayambashi “Analytical Fault
`Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip,” IEEE
`Transactions on Computers, DOI 10.1109/TC.2015.2401016, 2015
`
`A. Demiriz, N. Bagherzadeh,