`
`I, Naoko UNO, c/o Sakai International Patent Office, SF, Toranomon Mitsui Building 8-1,
`
`Kasumigaseki 3-chome, Chiyoda-ku, Tokyo, 100-0013, Japan, do hereby certify that I am fluent in the
`
`English and Japanese languages and a competent translator thereof, and that to the best of my
`
`knowledge and belief the following is a true and correct translation of the accompanying Non-English
`
`Language Japanese Patent Application Laid-Open Publication No. JPOS-243191 A.
`
`I certify under penalty of perjury under the laws of the United States that the foregoing is true
`and correct.
`
`Executed this 20th day of January, 2017.
`
`Signature:_~_,e:_..o.
`_,::__ ___ _,.~c:......-'-----
`:c._ _
`
`Naoko Uno
`
`Tokyo Electron Limited
`EXHIBIT 1010
`IPR Petition for
`U.S. Patent No. RE40,264
`
`Page 1 of 5
`
`
`
`(19) JAPAN PATENT OFFICE (JP)
`
`(12) PATENT APPLICATION
`LAID-OPEN PUBLICATION (A)
`
`(51) Int.Cl5
`H01L 21/302
`C23F 4/00
`//H05H 1/46
`
`IDENTIFICATION CODE: JPO REFERENCE NUMBER F1
`C 7353-4M
`A 8414-4K
` 9014-2G
`
` (11) PUBLICATION NUMBER
`JP 05-243191 A
`(43) DATE OF PUBLICATION
` 21. 09. 1993 (H5)
`
`TECHNICAL INDICATIONS
`
`Request for Examination: Not Filed
`Number of Claims: 1 (4 pages total)
`
`(71) Applicant: 000004237
`NEC Corporation
`7-1, Shiba 5-chome,
`Minato-ku, Tokyo
`
`(72) Inventor:
`
`Akira OKADA
`c/o NEC Corporation
`7-1, Shiba 5-chome,
`Minato-ku, Tokyo
`
`(74) Representative: Patent Attorney
`Ataru SUGANO
`
`(21) Application Number: 04-75199
`
`(22) Date of Filing: 26. 02. 1992 (H4)
`
`(54) [Title of the Invention] DRY ETCHING DEVICE
`
`(57) [ABSTRACT]
`[PURPOSE] To enable the shape control by the
`temperature control of a semiconductor substrate due to the
`importance of the control of the etching shape of a material
`to be etched in dry etching.
`
`[CONSTITUTION] A plurality of coolant supply paths 22,
`23, and 24 are provided in an electrode 31 on which a
`semiconductor substrate 32 is installed, and the control is
`performed using each of controllers 1, 2, and 3, coolant
`baths 10, 11, and 12, temperature monitors 28, 29, and 30,
`and the likes. Therefore, the control of an etching depth
`direction such as a through-hole can be performed.
`
`Page 2 of 5
`
`
`
`[Claim(s)]
`[Claim 1] A dry etching device which generates plasma of a
`process gas introduced into a vacuum processing chamber by
`applying high-frequency power and etches a material to be etched
`on a semiconductor substrate using the plasma, the dry etching
`device comprising:
` a plurality of coolant supply paths provided in an inner portion
`of an electrode on which the semiconductor substrate is mounted;
` a plurality of coolant baths supplying coolant to the coolant
`supply paths; and
` a temperature control device controlling individually the
`temperature of each coolant bath.
`[Detailed Description of the Invention]
`[0001]
`[Industrial Applicability] The present invention relates to
`semiconductor producing equipment, and particularly, to a
`temperature control system of a dry etching device, the
`temperature control system performing the temperature control of
`an electrode on which a semiconductor substrate is installed.
`[0002]
`[Description of the Prior Art] Fig. 3 is a view illustrating a
`temperature control system of a dry etching device of the related
`art. A controller 1 controls a coolant bath 10 via a signal cable 7
`so that a monitoring temperature sent from a temperature
`monitor 28 via a signal cable 4 is the same as a preset
`temperature.
`[0003] The coolant bath 10 controls the temperature of the
`coolant in the coolant bath 10 in accordance with the preset
`temperature sent from the controller 1 via the signal cable 7.
`[0004] The coolant in the coolant bath 10 is sent into an electrode
`31 by a pump 13 via a coolant supply path 22 and a valve 16.
`Then, the coolant changes the temperatures so that the
`monitoring temperature output from the temperature monitor 28
`to the controller 1 via the signal cable 4 is the same as the preset
`temperature of the controller 1. Next, the coolant returns the
`coolant bath 10 via a coolant supply path 25 and a valve 19.
`[0005] The temperature control system of the dry etching device
`of this type of the related art has only one set of the coolant bath
`10, the coolant supply paths 22 and 25, and the temperature
`monitor 28 as described above, and thus the temperature control
`of the electrode 31 on which the semiconductor substrate 32 is
`mounted is focused on only one place. Reference numeral 33
`indicates an upper electrode and reference numeral 34 indicates a
`vacuum processing chamber.
`[0006]
`[Problem to be solved by the invention] The dry etching device of
`this type has only one set of coolant bath and temperature
`monitor in the temperature control system. This does not cause
`much problem in keeping the temperature of the semiconductor
`substrate 32 within a certain temperature range. However, the
`temperature control cannot be sufficiently performed when the
`temperature difference in a surface of the semiconductor
`substrate 32 is tried to be kept within 1 to 2 degrees.
`[0007] Meanwhile, the etching shape of a material to be etched
`on the semiconductor substrate 32 is dependent on the
`temperature distribution in the surface of the semiconductor
`substrate 32. Therefore, there is a problem in that, when the
`temperature control cannot be properly performed in the surface,
`the etching shape becomes uneven in the surface of the
`semiconductor substrate 32.
`
`
`
`[0008] Fig. 4 is a cross-sectional view of a Si oxide film on a
`semiconductor substrate subjected to etching in a dry etching
`device having a temperature control system of the related art.
`The preset temperature of an electrode is -20℃. Fig. 4(a) is a
`cross-sectional view of a central portion of the semiconductor
`substrate and Fig. 4(b) is a cross-sectional view of a peripheral
`portion. Reference numeral 40 indicates a semiconductor
`substrate, 41 indicates a Si oxide film, 42 indicates a
`photoresist, and 43 indicates a reaction product.
`[0009] Since the semiconductor substrate is exposed to plasma
`during etching, the semiconductor substrate is heated to equal
`to or more than the preset temperature of the electrode.
`Particularly, the cooling efficiency of the peripheral portion of
`the semiconductor substrate is lower than that of the central
`portion, and thus the peripheral portion is heated to a higher
`temperature. Therefore, when the temperature control is
`performed so that the peripheral portion is cooled as much as
`needed, the central portion tends to be cooled excessively. Fig.
`2(b) is a view illustrating the temperature distribution of the
`semiconductor substrate. When the temperature of the
`peripheral portion is set to 70℃, the temperature of the central
`portion is lower by about 10℃ to 30℃.
`[0010] When forming a contact hole as illustrated in Fig. 4, for
`example, excess reaction products are attached to, compared to
`the peripheral portion, the central portion cooled excessively.
`This reaction product hinders the progress of etching. As a
`result, etching is stopped in the middle thereof, and thus etching
`is insufficiently performed compared to the peripheral portion.
`Particularly, when a fine contact hole of a VLSI, the size of the
`hole being 0.5 μm or less, is formed, this problem becomes
`critical.
`[0011] An object of the present invention is to provide a dry
`etching device capable of controlling the etching shape by
`temperature control of a semiconductor substrate.
`[0012] [Means for solving problem] In order to achieve the
`object described above, according to the present invention,
`there is provided a dry etching device which generates plasma
`of a process gas introduced into a vacuum processing chamber
`by applying high-frequency power and etches a material to be
`etched on a semiconductor substrate using the plasma, the dry
`etching device including a plurality of coolant supply paths
`provided in an inner portion of an electrode on which the
`semiconductor substrate is mounted, a plurality of coolant baths
`supplying coolant to the coolant supply paths, and a
`temperature control device controlling individually the
`temperature of each coolant bath.
`[0013] [Function] A plurality of coolant supply paths are
`provided in an inner portion of an electrode on which a
`semiconductor substrate is mounted and temperature-adjusted
`coolant is supplied to the coolant supply paths.
`[0014] [Embodiment] Hereinafter, an embodiment of the
`present invention will be described with reference to drawings.
`Fig. 1 is a view illustrating the configuration of an embodiment
`of the present invention.
`[0015] In Fig. 1, coolant supply paths 22, 23, 24, 25, 26, and 27
`are provided in an inner portion of an electrode 31 on which a
`semiconductor substrate 32 is mounted, in concentric circles
`from the center of the semiconductor substrate 32.
`[0016] A controller 1 controls a coolant bath 10 via a signal
`cable 7 so that the monitoring temperature sent from a
`temperature monitor 28 via a signal cable 4 is the same as the
`preset temperature.
`
`Page 3 of 5
`
`
`
`[0017] The coolant bath 10 controls the temperature of the
`coolant in the coolant bath 10 in accordance with the preset
`temperature sent from the controller 1 via the signal cable 7.
`[0018] The coolant in the coolant bath 10 is sent into the
`electrode 31 by a pump 13 via the coolant supply path 22 and a
`valve 16. Then, the coolant changes the temperature so that the
`monitoring temperature output from the temperature monitor 28
`to the controller 1 via the signal cable 4 is the same as the preset
`temperature of the controller 1. Next, the coolant returns the
`coolant bath 10 via the coolant supply path 25 and a valve 19.
`[0019] These are similar in controllers 2 and 3, signal cables 8
`and 9, coolant baths 11 and 12, pumps 14 and 15, valves 17, 18,
`20, and 21, coolant supply paths 23, 24, 26, and 27, and
`temperature monitors 29 and 30.
`[0020] As illustrated in Fig. 2(a), the temperature distribution of
`the semiconductor substrate is uniform when the temperature
`control is performed by this embodiment.
`[0021]
`[Effect of the invention] As described above, the present
`invention has a plurality of coolant supply paths in an inner
`portion of an electrode on which a semiconductor substrate is
`mounted, a plurality of coolant baths supplying coolant to the
`coolant supply paths, and a temperature control device
`controlling individually the temperature of each coolant bath, and
`thus the temperature distribution in the semiconductor substrate
`can be controlled to be uniform.
`[0022] Therefore, the etching-shape distribution of a material to
`be etched on the semiconductor substrate, the etching-shape
`distribution being dependent on the temperature, can be
`controlled to be uniform.
`[0023] Particularly, when a contact hole of a VLSI is formed,
`significant effects can be achieved in forming a contact hole
`having a small diameter and a large depth in a small-margin part.
`Practically, it is confirmed that, when the temperature
`distribution of a semiconductor substrate is kept within 5% of the
`temperature range, contact holes of 0.5 μm can be etched with
`the proper distribution in a surface.
`
`[Brief Description of the Drawings]
`[Fig. 1] Fig. 1 is a view illustrating an embodiment of the
`present invention.
`[Fig. 2] Fig. 2(a) is a view illustrating the temperature
`distribution of a semiconductor substrate at the time of using a
`temperature control system of the present invention and Fig.
`2(b) is a view illustrating the temperature distribution of a
`semiconductor substrate at the time of using a temperature
`control system of the related art.
`[Fig. 3] Fig. 3 is a view illustrating an example of the related
`art.
`[Fig. 4] Fig. 4 illustrates a material to be etched on the
`semiconductor substrate, the material being subjected to etching
`using the temperature control system of the related art, in which
`Fig. 4(a) is a cross-sectional view of a central portion of the
`semiconductor substrate and Fig. 4(b) is a cross-sectional view
`of a peripheral portion.
`[Reference Signs List]
`1, 2, 3: controller
`4, 5, 6: signal cable
`7, 8, 9: signal cable
`10, 11, 12: cooling bath
`13, 14, 15: pump
`16, 17, 18: valve
`19, 20, 21: valve
`22, 23, 24: coolant supply path
`25, 26, 27: coolant supply path
`28, 29, 30: temperature monitor
`31: electrode
`32: semiconductor substrate
`33: upper electrode
`34: vacuum processing chamber
`40: semiconductor substrate
`41: Si oxide film
`42: photoresist
`43: reaction product
`
`Page 4 of 5
`
`
`
`1,2,3:CONTROLLER
`
`4,5,6:SIGNI\L CABLE
`7,8,9 :SlGNI\L CABLE
`
`10, ll, 12 :COOLING BA'IH
`
`13, 14, 15: PUMP
`16, 17, 18 :VALVE
`19,20,21:VI\LVE
`
`22,23,24:COOLANr SUPPLY ?AT!!
`25,26,27 :COOLANr SUPPLY PATH
`
`28,29,30 :TEMPERATURE MONITOR
`JJ 31: ELECTRODE
`J,f. 32: S£MIC0NDUCTOR SUBSTRATE
`33:UPPER ELECTRODE
`
`34:VACUUM PROCESSI~G CHAMBER
`
`l.11-- - - - -- -- --
`
`4-
`-<i __ / '
`
`[FIG . 1 )
`
`J
`
`2S
`
`I 2(.
`f z7
`
`FIG . 2]
`
`~
`
`§] § ~
`
`§
`
`(4.)
`
`JZ
`
`7~C
`
`(b)
`
`(FIG. 4]
`
`40: SEMICONDUCTOR
`
`SUBSTRATE
`
`41: Si OXIDE FILM
`
`42 : PHOTORESIST
`
`43: REACTION PROOOCT
`
`~\\\\\\--di)
`
`(a)
`
`--.....4,
`
`U,J
`
`Page 5 of 5
`
`