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`Global Foundaries US v. Godo Kaisha
`Global Ex. 1003
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`Page 1 of 6
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`

`

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`By
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`Page 2 of 6
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`Page 2 of 6
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`

`

`
`1
`MOS DEVICE WITH A METAL-SILICIDE GATE
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`3,617,824
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`lative layers formed in contact with each other over the sub-
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`strate should have excellent adhesive property, heat- and
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`shock- resisting property, adaptability to photomask-etching
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`process, and stability against various electrical conditions to
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`which the substrate is subjected in processing. According to
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`the common process of manufacturing the LS1 device, the al-
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`kaline (mostly sodium) ions, which enter into the insulative
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`film (silicon dioxide layer) in the process of evaporation or
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`sputtering metal layer to form the conductive layer over the
`insulative film, adversely affect the electrical stability of boun-
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`dary layers between the silicon substrate and the oxide film.
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`The deterioration in the boundary layer adversely affects the
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`reliability of the LSI device the same as the MOS-type device.
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`Also,
`in the conventional structure of the LS1 device,
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`neither aluminum nor molybdenum is satisfactory to form the
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`layer, because the former easily deteriorate in the
`metal
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`process of forming thereover the oxide insulative layer and the
`latter is insufficient in its adhesive and contacting property.
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`For these reasons, it has been difficult to provide the LS1
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`devices of high reliability, which satisfy the above-mentioned
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`requirements.
`An object of the present invention is therefore, to provide a
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`highly stable and highly reliable semiconductor device satisfy-
`ing all of the requirements mentioned above.
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`SUMMARY OF THE INVENTION
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`BACKGROUND OF THE INVENTION
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`This invention relates to a semiconductor device having a
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`semiconductor substrate, an insulator film formed over one
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`major surface of the substrate, and a conductive layer
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`deposited on the insulator film.
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`Recently it has been necessary to develop semiconductor
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`for producing highly reliable and effective
`techniques
`semiconductor devices, which are miniaturized modified for
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`higher frequency use, and subjected to the large-scale integra-
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`tion. To provide the desired high reliability, a sufficiently heat-
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`resistive and stable ohmic contact, PN junction, Schottky bar-
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`rier and/or conductive layer should be unfailingly produced.
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`For this purpose,
`is important to stabilize the contact
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`between semiconductor element and insulating film; insulator
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`film and conductive film; and conductive film and lead wire.
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`From this point of view, the conductor used for ohmic contact
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`should satisfy the following requirements:
`I. Good adherence and low contact resistance to the
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`semiconductor silicon (Si).
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`2. Good adherence to the insulating film such as silicon
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`dioxide (SiO,) or silicon nitride (Si,N,).
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`3. Adaptability to the photomask-etching process.
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`4. Availability to provide stable bonding to gold (Au) which
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`is used for the lead wire.
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`Conventionally, aluminum (Al) is the most commonly used
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`metal for the ohmic contact of a semiconductor device. How-
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`ever, there are two rather severe problems associated with the
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`use of aluminum though it satisfies requirements (1) through
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`(a). One of them is caused by the fact that an aluminum layer
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`forms a high-resistance alloy with the gold lead wire, which
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`adversely effects the ohmic contact. Therefore, aluminum is
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`not sufficiently suited for use in a highly reliable ohmic con-
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`tact.
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`Recently, a method of "forming an ohmic contact has been
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`developed which avoid those problems in the use of alu-
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`minum. The process contains the following steps: After heat
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`treatment, a platinum silicide is formed in the boundary layer
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`on the silicon substrate. The nonreacted part of platinum is
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`removed therefrom by chemical treatment and, then titanium
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`(Ti) and platinum are sputtered thereon and gold is deposited
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`thereto by electrolytic plating.
`is possible to provide a
`it
`According to this method,
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`semiconductor device which has highly stable and reliable
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`ohmic contacts as compared with the method using aluminum.
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`However, this method is inevitably complicated and it is rather
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`difficult to realize a mass-production system.
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`On the other hand,
`in order to obtain a semiconductor
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`device having a Schottky barrier, the metallic film should have
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`such property that (1') it is easily and well bonded to silicon
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`and is capable of forming a stable rectifying layer. Also, the
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`metallic film should satisfy the foregoing requirements (2)
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`through (4).
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`Molybdenum (Mo), palladium (Pd) or the like satisfies the
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`requirement ( I ’) but does not meet (2). In view of the forego-
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`ing, there is no material available which can perfectly satisfy
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`the requirements (1) through (4) or (1') through (4) in the
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`case of ohmic contact or Schottky barrier respectively. as long
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`as a simple metal substance is used therein. For this reason,
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`the highly stable ohmic contact or Schottky barrier has hither-
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`to been formed by only resorting to the multilayer technique.
`A similar problem arises in the case of the MOS-type
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`semiconductor device which has the metal-insulator-semicon-
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`ductor layer structure.
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`Such structure additionally dominates the characteristic
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`and reliability of the device by the electrical stability of the in-
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`terior state between the semiconductor substrate and insulator
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`formed on the substrate.
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`Similarly, inthe field of the large-scale integration (LSI),
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`the multilevel technique has been adopted to provide the in-
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`terconnection among the elements in the substrate. In the
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`multilevel interconnection structure, the conductive and insu-
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`According to this invention, a semiconductor device obtains
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`in which a silicide film of 3d, 4d and 5d transition metal such
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`as iron (Fe), cobalt (Co), nickel (Ni), molybdenum (Mo),
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`palladium (Pd), platinum (Pt), or the like, is used as a conduc-
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`tive means in place of the conventional simple metal and
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`whose structure is semiconductor-insulator-silicide.
`In the
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`present invention, it is found that the silicide of transition
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`metal forms an excellent ohmic or Schottky barrier contact
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`between itself and silicon and has good adherence to silicon,
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`silicon dioxide, silicon nitride and so on. Also the silicide has
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`the low resistivity and adaptability to photomask etching, and
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`it does not cause a deterioration in the electrical characteristic
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`of the insulator film in the forming process of silicide onto the
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`insulator.
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`Therefore the semiconductor device is thus characterized in
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`that the silicide forms good contact to semiconductor, the sili-
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`cide-insulator-semiconductor characteristics is extremely sta-
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`ble and the manufacturing process is simple. This the present
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`invention is applicable to planar-type semiconductors, field ef-
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`fect semiconductors of the insulated gate type, and large-scale
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`integrated circuits having a multilevel interconnection struc-
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`ture.
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`The present invention will be explained in particular con-
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`junction with the accompanying drawings.
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`FIG. I is a longitudinal cross-sectional view illustrating the
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`first embodiment of this invention;
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`FIG. 2 is a longitudinal cross-sectional view illustrating a
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`modification of the first embodiment shown in Fig. 1;
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`FIG. 3 is a longitudinal cross-sectional view illustrating the
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`second embodiment of this invention;
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`FIG. 4 is a graph showing capacitance vs. applied voltage
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`characteristic of the device of Fig. 3;
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`FIG. 5 is a longitudinal cross-sectional view of the third em-
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`bodiment of this invention;
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`FIGS. 6(A) through 6(C) show the multilevel structure of
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`an integrated circuit to which the present invention is applied;
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`and
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`FIG. 7 is a partial cross-sectional view illustrating the fourth
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`embodiment of this invention.
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`In the simple PP junction diode shown in FIG. 1, which is a
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`first embodiment this invention, as insulating film 12 is formed
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`over an n-type single crystal silicon substrate 11, by thermally
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`growing silicon dioxide. Through a small circular hole prear-
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`ranged at said insulating film 12, a P-type impurity is diffused
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`so that the diffused region 13 of P-type conduction is formed
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`in the substrate 11. To establish a favorable ohmic contact
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`Page 3 of 6
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`Page 3 of 6
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`

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`3,617,824
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`3
`onto the P-type diffusion region 13, a cobalt silicide 14 is
`deposited on the entire surface including the insulating film 12
`of silicon dioxide by vacuum evaporation of cathode-sputter-
`ing to about 2,000 Angstrom thickness. Then, a stable con-
`ductive metal film l5, such as a gold or platinum film,
`is
`deposited thereon. to about 5,000 Angstrom thickness. After
`this deposition of metal film, said metal film [S and transition
`metal silicide film 14 are etched into a specific shape by the
`photomask-etching process. In the foregoing manner, the in-
`vention provides a highly stable and highly reliable semicon-
`ductor device through a simple process. In this embodiment,
`the specific resistance of the ohmic contact formed between
`cobalt silicide 14 and p-type region 13 whose specific resistivi-
`ty is 2X10“ ohm-cm is less than about 4><l0"’ ohm-cm ’. This
`specific contact resistance is very small compared with the
`specific contact resistance, (i.e., 3.7><l0'5 ohm-cm.’ of the
`conventional device. Even when the P-type region 13 is
`replaced by an n-type silicon of specific resistivity 1x10" ohm-
`cm. and platinum silicide (PtSi) is used as the transition metal
`silicide 14, a favorable ohmic contact of the specific contact
`resistance 6><l0“ ohm-cm.’ is obtained. it is to be noted that
`the ohmic contact obtained according to this invention is sta-
`ble from the thermal as well as the mechanical point of view.
`The same effect as stated above can be obtained from this
`embodiment even if modified to a certain extent. More par-
`ticularly, referring to FIG. 2, the heat treatment may be ac-
`complished after depositing the transition metal silicide 14.
`Alternatively a stable conduction metal film 15, such as a
`platinum or gold film may be added thereto via a metallic film
`21 of titanium or chromium (Cr), after depositing a transition
`metal silicide 14. In FIG. 2 the same reference numerals are
`used to designate the same elements as in Fig. 1.
`Still another example related to the Schottky barrier diode
`will be explained below.
`Referring again to Figure 1, the semiconductor substrate 11
`and region 13 are of N-type silicon whose specific resistivities
`are respectively 2X10” ohm-cm. and 0.8 ohm-cm. A silicon
`dioxide film I2 is thermally grown on the surface of each of
`the regions 11 and 13. A circular hole is provided in the oxide
`file I2, to expose the surface of silicon. The exposed surface is
`cleaned by chemical treatment. After this process, a transition
`metal silicide 14, such as cobalt silicide, is evaporated thereon
`to about 2.000 thickness under a super high vacuum condi-
`tion. Further, an electrode 15 is deposited onto the silicide 14.
`The resultant metal layers are then formed into a specific
`shape through a photoetching process. The characteristic of
`the Schottlty barrier diode are tabulated below, in comparison
`with those of a conventional diode having molybdenum (Mo).
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`4
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`sistance of 10 ohm-cm after oxidation in dry oxygen at l,l50°
`C. for 2 hours. The oxide film on the lower side of the sub-
`strate II is removed by chemical process. and on the upper
`side of the silicon oxide film 12 there is deposited a metal sili-
`cide 14, c.g., cobalt silicide. by evaporation at a high vacuum
`to a thickness of about 2,000 A., and then a suitable metal 15
`is vaporized thereon. After the deposition of the metal film 15.
`the metal film I5 and cobalt silicide film 14 are shaped into a
`predetermined configurations by photomask etching. The sil-
`icon substrate II is cut to a suitable size. and lead wires 31, 32
`are connected, respectively, to the lower side of the silicon
`piece and to the metal film 15.
`The capacity-voltage characteristics of the diode structure
`of the cobalt silicide-silicon dioxide-silicon thus fonned are
`shown in Fig. 4. The capacity-voltage characteristic of the
`diode just formed is represented by the curve a in the figure,
`while the capacity-voltage characteristic of the diode after the
`heat treatment in air at 250° C. for 30 minutes with the appli-
`cation of an electric field of 3XlU'6 V/cm. with the metal
`maintained positive and the silicon negative is represented by
`the curve b.
`When calculated from the curve a of FIG. 4, the surface
`charged carrier density of the resulting diode is about 5Xl0"/
`cm.’ and, as can be seen from the curve [7 of FIG. 2, the sur-
`face-charged carrier density remains substantially unchanged
`even with a heat treatment with the voltage applied. it will be
`thus apparent that a diode having surface states between sil-
`icon and silicon dioxide can be obtained.
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`Fig. 5 shows a field effect transistor of MOS type, a form of
`semiconductor device obtained in accordance with the
`present invention. Within a P~type silicon substrate 11 there is
`formed an N’-type region source 51 and drain 52. Holes are
`then made at predetermined points of the silicon dioxide film
`12. Next, cobalt silicide 14 and a simple metal
`I5 are
`deposited by evaporation on the surface, and a source elec-
`trode 53, gate electrode 54, and drain electrode 55 are etched
`to the desired shapes by photomask etching. In such field ef-
`fect transistors of the MOS type, the stability of surface states
`of the silicon substrate the gate electrode has a direct bearing
`upon the reliabliity of the operating characteristics. The
`transistor of this embodiment has such stable surface states
`that the transistor functions most satisfactorily without varia-
`tion of the operating characteristics.
`With the embodiments of FIGS. 3 and 5, it is feasible for the
`gate electrode to be formed of silicide. to maintain the surface
`stability of the gate insulator.
`Referring to FIGS. 6(A) through (C) and Fig. 7, the fourth
`embodiment of this invention has a multilevel interconnection
`structure.
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`5
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`10
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`I5
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`20
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`25
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`30
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`35
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`40
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`45
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`50
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`Fig. 6A shows an integrated circuit substrate in which cir-
`cuit components such as transistors, diodes. and resistors is
`formed and interconnected with a composite conductive film
`such as silicide-metal-silicide. On the surface of the semicon-
`ductor, an insulating film of silicon dioxide and/or another in-
`sulator is deposited by a chemical reaction or sputtering.
`Apertures are formed in the insulator layer in the desired pat-
`tern for photomask etching use, as shown in FIG. (58. Next, a
`metal silicide and a low-resistance metal are deposited on the
`insulator and through apertures provide multilevel intercon-
`nection among the circuits as shown in FIG. 6C.
`A partial sectional view of the resulting integrated circuit '70
`is shown in FIG. 7. Referring to FIG. 7, a silicon substrate 1 I is
`coated by silicon dioxide 12. In the substrate 11, transistors.
`diodes and resistors are formed. Interconnection among the
`elements is achieved by films of a metal silicide ‘ll, ‘72 and a
`As is evidently shown in the table, the Schottky diode of this
`low-resistance metal 73 which altogether form a triple layer.
`invention is highly efficient and its production process can be
`The entire surface of the integrated circuit substrate. except
`simplified and. further. the heat-resisting property is markedly
`improved owing to the use of said silicide.
`for the through-holes, is covered by an insulating film 74.
`Through the apertures,
`the upper level
`interconnections
`Fig. 3 is a sectional view showing a second embodiment of
`this invention. whose structure is a MOS diode obtained in ac-
`formed by a metal silicide 75 and a low-resistance metal 76
`are connected to the underlying circuits.
`cordance with the present invention.
`Referring to Fig. 3, a silicon dioxide film 12 is formed on the
`According to this embodiment, integrated circuits of high
`surface of an N-type silicon substrate 11 having a specific re- 75 degree of integration are obtained. and the multilevel inter-
`
`Metal which form:
`Schottky barrier
`(specific resist-
`mice of N-type
`silicon: 0.8 ohm-cm.)
`(contact area:
`1.9x I0" ct-n.')
`
`Height
`of
`barrier
`ev.
`
`Current
`value
`when for-
`word vol-
`rage is
`I voll
`(ampere)
`
`Current
`value
`when in-
`verse vol-
`Iago is
`4 volts
`(ampere)
`
`Peak
`withstand
`voltage '
`(volt)
`
`lfl
`l6Xl0"
`soxio-=
`0.65
`Cosi
`I8
`30x10"
`88x10"
`0.58
`Fesi
`20
`lsxlo"
`'Il!><lo"
`0.73
`Pdsl
`25
`IOXIO"
`10x10"
` 82
`PtSi
`I5
`loxlo"
`68x10"
`0.65
`Mo
`
`
`55
`
`60
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`65
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`70
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`\Page 4 of 6
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`tion is made only by way of example and not as a limitation to
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`the scope of the invention.
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`Claims for Patent
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`1. In a field effect semiconductor device of MOS type hav-
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`ing a semiconductor substrate, the improvement comprising a
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`layer of metal silicide means deposited on an insulative layer
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`lying on the surface of the semiconductor substrate, said
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`means forming a stable capacitance-voltage said metal silicide
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`being selected characteristic from the group consisting of
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`platinum silicide, cobalt silicide and palladium silicide.
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`2. The improvement as claimed in claim 1, wherein said
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`metal silicide is cobalt silicide and wherein a layer of metal of
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`low electrical resistance covers the metal silicide layer.
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`3. The improvement as claimed in claim 1, wherein two im-
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`purity-diffused regions having the opposite conductivity type
`to said substrate are formed in said substrate in such a relation
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`that the portion of the surface of said semiconductor substrate
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`lying under said metal silicide layer may be interposed
`between said two regions, and electrical leadout members are
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`applied to each of said regions said metal silicide layer.
`*
`#
`*
`Ii!
`It
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`3,617,824
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`5
`connection attained in accordance with the invention is highly
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`reliable because it is extremely stabilized thermally and elec-
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`trically.
`The metal silicide to be used in the invention is not limited
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`to what has been shown in the described embodiments but any
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`metal silicide may be used so long as such a silicide is chemi-
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`cally stable, low in specific resistance, and satisfactory as re-
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`gards its bonding property toward silicon and insulating film.
`Various experiments have been conducted and it was found
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`that the following transition metals silicide are especially
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`favorable for the purpose of this invention:
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`3&7 Transition Metal Silicide
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`titanium silicides (Ti_.,Si,,_ TiSi,) vanadium silicides
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`(V5Si:,_ VSi2), chromium silicides (Cr,,Si, CrSi, CrSi2),
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`manganese silicides (Mn,,Si3_ MnSi, Mn.,Si,), iron silicides
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`(FeSi, FeSi,) cobalt silicides (Co2Si, CoSi, CoSi2),
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`nickel silicides (NiSi,, Ni,Si, NiSi).
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`4d or 5d Transition Metal Silicide
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`palladium silicides (Pd,Si, PdSi), platinum silicides (Pt,Si,
`PtSi).
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`While the invention has been explained in connection with
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`specific embodiments, it is to be understood that this explana-
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`UNITED STATES PATENT OFFICE
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`
`CERTIFICATE OF CORRECTION
`
`
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`
`
`Patent No.
`
`
`3,517,824
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`Dated
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`November 2! 1271
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`Inventor(s)
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`Daizaburo Shinoda, et a1
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`It is certified that error appears in the above—identified patent
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`and that said Letters Patent are hereby corrected as shown below:
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`Column 6, line 8, after "Volta e" should read
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`-— characteristic --5 line 9, after
`selected" cancel
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`"characteristic"; line 12, after "layer or" should read
`—-a --; line 21, after "regions" should read -- and -—.
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`Signed and sealed this 10th day of October 1972.
`
`
`
`(SEAL)
`Attest:
`
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`
`EDWARD M.FLETCHER,JR.
`
`
`Attesting Officer
`
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`
`ROBERT GOTTSCHALK
`
`Commissioner of Patents
`
`
`
`OR” P°“°5° ”°'69)
`
`USCOMM-DC 00375-poo
`f! U 5 GOVERNMENT PRCNTING OFFICE . I!!! 0-166-J34.
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`Page 6 of 6
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`Page 6 of 6
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