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US006147009A
`6,147,009
`(11) Patent Number:
`[1
`United States Patent
`Grill et al.
`[45] Date of Patent:
`Nov. 14, 2000
`
`
`[75]
`
`[54] HYDROGENATED OXIDIZED SILICON
`CARBON MATERIAL
`Inventors: Alfred Grill, White Plains;
`Christopher Vincent Jahnes, Monsey;
`Vishnubhai Vitthalbhai Patel,
`Yorktown Heights, all of N.Y.; Laurent
`Claude Perraud,Paris, France
`
`[73] Assignee:
`
`International Business Machines
`Corporation, Armonk, N.Y.
`
`21]
`[21]
`[22]
`
`Appl. No.: 09/107,567
`aah
`ae
`Ave,
`Filed:
`Jun. 29, 1998
`
`[SL]
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`ee 2 '427/255.6
`Field of Search oo...ee 427/489, 492,
`427/497, 503, 509, 515, 577, 578, 579,
`249.15, 255.37, 255.6; 438/780, 781, 789
`
`[58]
`
`[56]
`
`A
`Betesnres Sites
`U.S. PATENT DOCUMENTS
`.
`4/1989 Heinecke et al. .
`3/1992 Brochet et al.
`.
`427/480
`2/1996 Hu etal
`.. 438/763
`......
`9/1996 Maedaet al.
`
`(FS
`..
`9/1996 Cohen et al.
`«1 fP99F) Theda sci csssiscsassssstpnssdssesursiaernsns 427/579
`
`4,824,690
`2

`§,093,153
`5494712
`5,554,570
`5,559,637
`SSSOS,741
`
`5,618,619
`......0........e 428/334
`4/1997 Petrmichl et al.
`5,789,320
`8/1998 Andricacos et al. oo... 438/678
`POREION PATENT DOCUMENTS
`19654737
`7/1997 Germany.
`60-111480
`6/1985
`Japan .
`.
`VATE
`a
`OTRER PUBLICATIONS
`Luther et al, Planar Copper—Polyimide Back End Of The
`Line Interconnections For ULSI Devices, Jun. 8-9 1993,
`VMIC Conference, 1993 ISMIC-102/93/0015, pp. 15-21,
`especially p. 16.
`
`Primary Examiner—Timothy Meeks
`Attorney, Agent, or Firm—Randy Tung; Robert Trepp
`
`[57]
`ABSTRACT
`A low dielectric constant, thermally stable hydrogenated
`oxidized silicon carbon film which can be used as an
`interconnect dielectric in [C chips is disclosed. Also dis-
`closed is a method for fabricating a thermally stable hydro-
`genated oxidized silicon carbon low dielectric constant film
`utilizing a plasma enhanced chemical vapor deposition
`technique. Electronic devices containing insulating layers of
`thermally stable hydrogenated oxidized silicon carbon low
`dielectric constant materials that are prepared by the method
`are further disclosed. ‘To enable the fabrication of thermally
`z
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`#455
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`teneris
`stable hydrogenated oxidized silicon carbon low dielectric
`*
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`constant
`film, specific precursor materials having a
`ring
`Sttucture are preferred.
`
`15 Claims, 4 Drawing Sheets
`
`IP Bridge Exhibit 2007
`GlobalFoundries v. IP Bridge
`IPR2017-00923
`Page 00001
`
`IP Bridge Exhibit 2007
`GlobalFoundries v. IP Bridge
`IPR2017-00923
`Page 00001
`
`

`

`U.S. Patent
`
`Nov. 14, 2000
`
`Sheet 1 of4
`
`6,147,009
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`0.20
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`ABSORBANCE
`
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`
`Si-O-Si 1030 ——>
`
`
`Si-H 2240
`Si-C 1271
`
`
`
`C-H 2965
`
`Si-H 2170
`
`4000
`
`3500
`
`3000
`
`2000
`2500
`WAVE NUMBERS(cm°’)
`
`1500
`
`1000
`
`FIG. 2
`
`IPR2017-00923 Page 00002
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`IPR2017-00923 Page 00002
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`

`

`U.S. Patent
`
`Nov. 14, 2000
`
`Sheet 2 of 4
`
`6,147,009
`
`0.20
`
`ABSORBANCE
`
`So —_— wn
`
`0.10
`
`0.05
`
`Si-O-Si 1100
`
`Si-O 1025
`
`0.00
`
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`
`1250 1200=1150 1100 1050 1000 950
`
`WAVE NUMBERS(cm)
`
`
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`FIG. 3
`
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`10°18
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`4000
`
`6000
`
`8000
`FILM THICKNESS(A)
`
`10000
`
`12000
`
`FIG. 4
`
`IPR2017-00923 Page 00003
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`IPR2017-00923 Page 00003
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`

`

`U.S. Patent
`
`Novy. 14, 2000
`
`Sheet 3 of 4
`
`6,147,009
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`IPR2017-00923 Page 00004
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`IPR2017-00923 Page 00004
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`
`
`
`
`
`

`

`U.S. Patent
`
`Nov. 14, 2000
`
`Sheet 4 of 4
`
`6,147,009
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`IPR2017-00923 Page 00005
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`IPR2017-00923 Page 00005
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`

`

`6,147,009
`
`1
`HYDROGENATED OXIDIZED SILICON
`CARBON MATERIAL
`
`FIELD OF THE INVENTION
`
`The present invention generally relates to a new hydro-
`genated oxidized silicon carbon (SiCOH) low dielectric
`constant material which is thermally stable to at least 350°
`C. and a method for fabricating films of this material and
`electronic devices containing such films and more
`particularly, relates to a low dielectric constant, thermally
`stable hydrogenated oxidized silicon carbon (SiCOH) film
`for use as an intralevel or interlevel dielectric, cap material,
`or hard mask/polish stop in a ULSI back-end-of-the-line
`(BEOL) wiring structure, electronic structures containing
`the films and a method for fabrication such films and
`structures,
`
`BACKGROUNDOF THE INVENTION
`
`The continuous shrinking in dimensions of electronic
`devices utilized in ULSI circuits in recent years has resulted
`in increasing the resistance of the BEOL metalization as well
`as Increasing the capacitance ofthe intralayer and interlayer.
`This combined effect increases signal delays in ULSI elec-
`tronic devices. In order to improve the switching perfor-
`mance of future ULSI circuits, low dielectric constant (k)
`insulators and particularly those with k significantly lower
`than that of silicon oxide are needed to reduce the capaci-
`tances. Dielectric materials that have low k values have been
`commercially available, for instance, one of such materials
`is polytetrafluoroethylene (PTFE) with a k value of 2.0.
`However, these dielectric materials are not thermally stable
`when exposed to temperatures above 300~350° C. which
`renders them useless during integration of these dielectrics
`in ULSI chips which require a thermal stability of at least
`400° C.
`
`The low-k materials that have been considered for appli-
`cations in ULSI devices include polymers containing Si, C,
`O, such as methylsiloxane, methylsesquioxanes, and other
`organic and inorganic polymers. For instance, materials
`described in a paper “Properties of new low dielectric
`constant spin-on silicon oxide based dielectrics” by
`N.Hacker et al., published in Mat. Res. Soc. Symp. Proc.,
`vol. 476 (1997) p25 appear to satisfy the thermal stability
`requirement, even though someofthese materials propagate
`cracks easily when reaching thicknesses needed for integra-
`tion in the interconnect structure when films are prepared by
`a spin-on technique. Furthermore, the precursor materials
`are high cost and prohibitive for use in mass production. In
`contrast to this, most of the fabrication steps of VLSI and
`ULSI chips are carried out by plasma enhanced chemical or
`physical vapor deposition techniques. The ability to fabri-
`cate a low-k material by a PECVD technique using readily
`available processing equipment will thus simplify its inte-
`gration in the manufacturing process and create less haz-
`ardous waste.
`
`It is therefore an object of the present invention to provide
`a low dielectric constant material of hydrogenated oxidized
`silicon carbon which is thermally stable to at least 350° C.
`and exhibits very low crack propagation.
`It is another object of the present invention to provide a
`method for fabricating a low dielectric constant and ther-
`mally stable hydrogenated oxidized silicon carbon film.
`It is a further object of the present invention to provide a
`method for fabricating a low dielectric constant, thermally
`stable hydrogenated oxidized silicon carbon film from a
`precursor which contains Si, C, O and H and which may
`have a ring structure.
`
`2
`invention to
`It is another further object of the present
`provide a method for fabricating a low dielectric constant,
`thermally stable hydrogenated oxidized silicon carbon film
`from a precursor mixture which contains atoms of Si, C, O,
`and H.
`
`It is still another further object ofthe present invention to
`provide a method for fabricating a low dielectric constant,
`thermally stable hydrogenated oxidized silicon carbon film
`in a parallel plate plasma enhanced chemical vapor deposi-
`tion chamber.
`
`10
`
`It is yet another object of the present invention to provide
`a method for fabricating a low dielectric constant, thermally
`stable hydrogenatedoxidized silicon carbon film for use in
`electronic structures as an intralevel or interlevel dielectric
`in a BEOL interconnect structure.
`
`It is still another further object ofthe present invention to
`provide a method for fabricating a thermally stable hydro-
`genated oxidized silicon carbon film oflow dielectric con-
`stant capable of surviving a process temperature of at least
`350° C, for four hours.
`
`20
`
`It is yet another further object of the present invention to
`provide a low dielectric constant, thermally stable hydroge-
`nated oxidized silicon carbon film that has low internal
`stresses and a dielectric constant of not higher than 3.6.
`It is still another further object of the present invention to
`provide an electronic structure incorporating layers of insu-
`lating materials as intralevel or interlevel dielectrics in a
`BEOL wiring structure in whichat least one of the layers of
`insulating materials comprise hydrogenated oxidized silicon
`carbon films.
`
`It is yet another further object of the present invention to
`provide an electronic structure which has layers of hydro-
`genated oxidized silicon carbon films as intralevel or inter-
`level dielectrics in a BEOL wiring structure which contains
`at least one dielectric cap layer formedof different materials
`for use as a reactive ion etching mask, a polish stop or a
`diffusion barrier.
`
`It is still another further object of the present invention to
`provide an electronic structure with intralevel or interlevel
`dielectrics in a BEOL wiring structure which hasat least one
`layer of hydrogenated oxidized silicon carbon films as
`reactive ion etching mask, a polish stop ora diffusion barrier.
`
`SUMMARYOF THE INVENTION
`
`In accordance with the present invention, a novel hydro-
`genated oxidized silicon carbon (SiCOH) low dielectric
`constant material that is thermally stable to at least 350° C.
`is provided. The present invention further provides a method
`for fabricating a thermally stable, low dielectric constant
`hydrogenated oxidized silicon carbon film by reacting a
`precursor gas containing atoms of Si, C, O, and H in a
`parallel plate plasma enhanced chemical vapor deposition
`chamber. The present
`invention still further provides an
`electronic structure that has layers ofinsulating materials as
`intralevel or interlevel dielectrics used in a BEOL wiring
`structure wherein the insulating material can be a hydroge-
`nated oxidized silicon carbon film.
`
`In a preferred embodiment, a method for fabricating a
`thermally stable hydrogenated oxidized silicon carbon film
`can be carried out by the operating stepsof first providing a
`parallel plate plasma enhanced chemical vapor deposition
`chamber, positioning an electronic structure in the chamber,
`flowing a precursor gas containing atoms of Si, C, O, and H
`into the chamber, depositing a hydrogenated oxidized silicon
`carbon film on the substrate, and optionally heattreating the
`
`oeun
`
`40
`
`a a
`
`60
`
`IPR2017-00923 Page 00006
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`

`

`6,147,009
`
`3
`film at a temperature not less than 300° C. for a time period
`of at least 0.5 hour, The method may further include the step
`of providing a parallel plate reactor which has a conductive
`area of a substrate chuck between about 300 cm? and about
`700 cm*, and a gap betweenthe substrate and a top electrode
`between about 1 cm and about 10 cm. ARF poweris applied
`to one of the electrodes at a frequency between about 12
`MHZ and about 15 MHZ. The substrate may be positioned
`on the powered electrode or on the grounded electrode. An
`optional heat treating step may further be conducted at a
`temperature not higher than 300° C. for a first time period
`andthen at a temperature not lower than 380° C. for a second
`time period, the second time period is longer than the first
`time period. The second time period may beat least 10 folds
`of the first time period.
`The precursor utilized can be selected from molecules
`with
`ring
`structures
`such
`as
`1,3,5,7-
`tetramethyleyclotetrasiloxane (TMCTS, or C,H,,0,Si,),
`tetraethylcyclotetrasiloxane (CgH,,0,S1,), or decamethyl-
`cyclopentasiloxane (C,H,,0,Si,). However, other precur-
`sors comprising Si, C, O, and H containing gases may also
`be used. Such precursors may be selected from the group of
`methylsilanes, such as tetramethylsilane (Si(CH,),) or tri-
`methylsilane (SiH(CH,);)), with or without the addition of
`oxygen to the feed gas. The precursor can be delivered
`directly as a gas to the reactor delivered as a liquid vaporized
`directly within the reactor, or transported by an inert carrier
`gas such as helium or argon. The precursor mixture may
`further contain elements such as nitrogen, fluorine or ger-
`manium.
`
`The deposition step for the hydrogenated oxidized silicon
`carbon low dielectric constant film may further include the
`steps of setting the substrate temperature at between about
`25° C. and about 400° C., setting the RF power density at
`between about 0.02 W/cm? and about 1.0 W/cm”,setting the
`precursor flow rate at between about 5 seem and about 200
`sccm, setting the to chamber pressure at between about 50
`mlorr and about 3 Torr, and setting a substrate DC bias at
`between about 0 VDC and about -400 VDC. The deposition
`process can be conducted in a parallel plate type plasma
`enhanced chemical vapor deposition chamber.
`The present invention is further directed to an electronic
`structure which has layers of insulating materials as intra-
`level or interlevel dielectrics in a BEOL interconnect struc-
`ture which includes a pre-processed semiconducting sub-
`strate that hasa first region of metal embedded ina first layer
`of insulating material, a first region of conductor embedded
`in a second layer of insulating material which comprises
`SiCOH, said second layer of insulating material being in
`intimate contact with said first layer of insulating material,
`said first region of conductor being in electrical communi-
`cation with said first region of metal, and a second region of
`conductor being in electrical communication with said first
`region of conductor and being embeddedin a third layer of
`insulating material comprises SiCOH,said third layer of
`insulating material being in intimate contact with said sec-
`ond layer of insulating material. The electronic structure
`may further
`include a dielectric cap layer situated
`in-between the first
`layer of insulating material and the
`secondlayer of insulating material, and may further include
`a dielectric cap layer situated in-between the second layer of
`insulating material and the third layer of insulating material.
`The electronic structure may further include a first dielectric
`cap layer between the second layer of insulating material
`and the third layer of insulating material, and a second
`dielectric cap layer on top of the third layer of insulating
`material.
`
`4
`The dielectric cap material can be selected from silicon
`oxide, silicon nitride, silicon oxinitride, refractory metal
`silicon nitride with the refractory metal being Ta, Zr, Hf or
`W, silicon carbide, silicon carbo-oxide, and their hydroge-
`nated compounds. The first and the second dielectric cap
`layer may be selected from the same group of diclectric
`materials. The first
`layer of insulating material may be
`silicon oxide or silicon nitride or doped varieties of these
`materials, such as PSG or BPSG. The electronic structure
`may further include a diffusion barrier layer of a dielectric
`material deposited on at least one of the second and third
`layer of insulating material. The electronic structure may
`further include a dielectric layer on top of the second layer
`of insulating material for use as a RIE hard mask/polish stop
`layer and a dielectric diffusion barrier layer on top of the
`dielectric RIE hard mask/polish-stop layer. The electronic
`structure may further include a first dielectric RIE hard
`mask/polish-stop layer on top of the second layer of insu-
`lating material, a first dielectric RIE diffusion barrier layer
`on top of the first dielectric polish-stop layer, a second
`dielectric RIE hard mask/polish-stop layer on top of the third
`layer of insulating material, and a second dielectric diffusion
`barrier layer on top of the second dielectric polish-stop layer.
`The electronic structure may further include a dielectric cap
`layer of same materials as mentioned above between an
`interlevel dielectric of SiCOH and an intralevel dielectric of
`SiCOH.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`These and other objects, features and advantages of the
`present invention will become apparent from the following
`detailed description and the appended drawings in which:
`FIG, 1 is a cross-sectional view of the present invention
`parallel plate chemical vapor deposition chamber.
`FIG. 2 is a graph illustrating a FTIR spectrum obtained on
`a SiCOH film prepared by the present invention method.
`FIG. 3 is a graph illustrating a FTIR spectrum of a SiCOH
`film of the present invention showing a deconvolution of a
`Si—O—Si peak into Si—O—Si and Si—O peaks.
`FIG. 4 is a graph illustrating the dependence of crack
`growth velocity data obtained in water on film thicknesses
`for the present invention SiCOH films and typical Si based
`spin-on dielectric films.
`FIG. 5 isa graphillustrating the dielectric constants of the
`present
`invention SiCOH films prepared under various
`PECVDprocessing conditions.
`FIG. 6 is an enlarged cross-sectional view of a present
`invention electronic device having an intralevel dielectric
`layer and an interlevel dielectric layer of SiCOH.
`FIG, 7 is an enlarged, cross-sectional view ofthe present
`invention electronic structure of FIG. 6 having an additional
`diffusion barrier dielectric cap layer on top of the SiCOH
`film.
`
`20
`
`40
`
`FIG. 8 is an enlarged, cross-sectional view ofthe present
`invention electronic structure of FIG. 7 having an additional
`RIE hard mask/polish stop dielectric cap layer and a dielec-
`tric cap diffusion barrier layer on top of the polish-stop layer.
`FIG. 9 is an enlarged, cross-sectional view ofthe present
`invention electronic structure of FIG. 8 having additional
`RIE hard mask/polish stop dielectric layers on top ofthe
`interlevel SiCOH film.
`
`60
`
`DETAILED DESCRIPTION OF THE
`PREFERRED AND ALTERNATE
`EMBODIMENTS
`
`invention discloses a novel hydrogenated
`The present
`oxidizedsilicon carbon material (SiCOH) comprising Si, C,
`
`IPR2017-00923 Page 00007
`
`IPR2017-00923 Page 00007
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`

`

`6,147,009
`
`5
`O and H in a covalently bonded network which is thermally
`stable to at least 350° C, and having a dielectric constant of
`not more than 3.6, The present invention further discloses a
`method for fabricating SiCOH films in a parallel plate
`plasma enhanced chemical vapor deposition chamber. A
`precursor gas containing Si, O, C and H and optionally
`containing molecules which have a ring structure can be
`used for forming the SiCOHfilm. The SiCOH low dielectric
`constant film can further be heat treated at a temperature not
`less than 300° C.for at least 0.5 hour to improveits thermal
`stability.
`The present invention therefore discloses a method for
`preparing thermally stable SiCOH films that have low
`dielectric constant, ¢.g., lower than 3.6, which are suitable
`for integration in a BEOL wiringstructure. The films can be
`prepared by choosing a suitable precursor and a specific
`combination of processing parameters as described below.
`Referring initially to FIG. 1 wherein a simplified view of
`a PECVD reactor 10 for processing 200 mm wafers is
`shown. The gas precursors are introduced into reactor 10
`through the gas distribution plate (GDP) 14, which is
`separated from the substrate chuck 12 by a gap and are
`pumped out through a pumping port 18. The RF power 20
`is connected to the substrate chuck 12 andtransmittedto the
`substrate 22. For practical purposes, all other parts of the
`reactor are grounded. The substrate 22 thus acquires a
`negative bias, whose value is dependent on the reactor
`geometry and plasma parameters. In a different embodiment,
`the RF power 20 can be connected to the GDP 14, which is
`electrically insulated from the chamber, and the substrate
`chuck 12 is grounded. In another embodiment, more than
`one electrical power supply can be used. For instance, two
`power supplies can operate at the same RF frequency, or one
`may operate at a low frequency and oneat a high. frequency.
`The two power supplies may be connected both to same
`electrode or to separate electrodes. In another embodiment
`the RF power supply can be pulsed on and off during
`deposition. Process variables controlled during deposition of
`the low-k films are RF power, precursor mixture and flow
`rate, pressure in reactor, and substrate temperature. Follow-
`ing are several examples of deposition of low-k films from
`a precursor of TMCTS. In these examples,
`the precursor
`vapors Were transported into the reactor by using He as a
`carrier gas. After deposition, the films were heat treated at
`400° C. to stabilize their properties.
`EXAMPLE1
`
`In this implementation example, a plasma was operated in
`a continuous mode during film deposition. The pressure in
`the reactor was maintained at 300 mTorr. The substrate was
`
`positioned on the powered electrode to which a RF power of
`25 W was applied at a frequency of 13.56 MHZ. The
`substrate acquired a self negative bias of -75 VDC. The film
`thus deposited had a dielectric constant of k=4.0 in
`as-deposited condition. After stabilization anneal, the film
`has a dielectric constant of k=3.55.
`
`EXAMPLE2
`
`In this implementation example, the plasma was operated
`in a continuous mode during film deposition. The pressure in
`the reactor was maintained at 400 mTorr. The substrate was
`positioned on the powered electrode to which a RF power of
`7 W was applied at a frequency of 13.56 MHZ. The substrate
`acquired a self negative bias of -25 VDC. The film depos-
`ited has a dielectric constant of k=3.33 in as-deposited
`condition. After stabilization anneal, the film has a dielectric
`constant of k=2.95.
`
`6
`EXAMPLE3
`
`In this implementation example, the plasma was operated
`in a pulsed mode during film deposition, i.e., with a plasma-
`on time of 18 ms and a plasma-off time of 182 msper cycle.
`The pressure in the reactor was maintained at 300 mTorr.
`The substrate was positioned on the powered electrode to
`which a RF power of 9 W was applied at a frequency of
`13.56 MHZ. The substrate acquired a self negative bias of
`-9 to 0 VDC. The film thus deposited has a dielectric
`constant of k=3.4 in as-deposited condition. After stabiliza-
`tion anneal, the film has a dielectric constant of k=2.96.
`
`EXAMPLE4
`
`In this implementation example, a different precursor of
`tetramethylsilane was used with the plasma operated in
`continuous mode during film deposition. The pressure in the
`reactor was maintained at 200 mTorr. The substrate was
`positioned on the powered electrode to which a RF power of
`9 W was applied at a frequency of 13.56 MHZ. The substrate
`acquired a self negative bias of -200 VDC. The film thus
`deposited has a dielectric constant of k=3.6 in as-deposited
`condition. After stabilization anneal, the film has a dielectric
`constant of k=2.86.
`
`20
`
`40
`
`invention novel material composition
`The present
`includes atoms of Si, C, O and H. A suitable concentration
`range can be advantageously selected from between about 5
`and about 40 atomic percent of Si; between about 5 and
`about 45 atomic percent of C; between about O and about 50
`atomic percent of O; and between about LO and about 55
`atomic percent of H. It should be noted that when the atomic
`percent of O is 0, a composition of SiCH is produced which
`has properties similar to that of SiCOH and therefore, may
`also be suitably usedas a present invention composition. For
`instance, Example 4 describes a film of SiCH with no
`oxygen. The SiCH film may be deposited by flowing a
`precursor gas containing Si, C and H into a plasma enhanced
`chemical vapor deposition chamber. The present invention
`material composition may further include at least one ele-
`ment such as F, N or Ge while producing similarly desirable
`results of the present invention.
`The films deposited as described above are characterized
`by FTIR spectrum similar to the one shown in FIG. 2. The
`spectrum has absorption peaks corresponding to C—H
`bonds at 2965 em~! and 2910 cm=?, Si—H bonds at 2240
`em? and 2170 cm7!, Si—C bonds at 1271 cm@? and
`Si—O—Si bonds at 1030 cm™!. The relative intensities of
`these peaks can change with changing deposition conditions.
`The peak at 1030 cm~ can be deconvolutedin two peaksat
`1100 em? and 1025 em™" asillustrated in FIG. 3. The latter
`peak is at the same position as in the TMCTS precursor,
`indicating some preservation of the precursor ring structure
`in the deposited film, The ratio of the area of the 100 cm™!
`peak to that of the 1025 cmpeak increases from 0.2 to
`more than 1.1 with decreasing value of the dielectric con-
`stant from 4 to 2.95.
`
`60
`
`FIG. 4 presents a comparison of the crack growth velocity
`in water of the present SiCOH films with those of low-
`dielectric constant polymeric films containing similar ele-
`ments. The dotted line indicates the resolution limit of the
`measuring tool. FIG. 5 presents the dielectric constants of
`present SiCOH films prepared in different plasma condi-
`tions.
`
`Other gases such as Ar, H,, and N. can be used as carrier
`gases. If the precursor has sufficient vapor pressure no
`carrier gas may be needed. An alternative way to transport
`a liquid precursor to the plasma reactor is by use of a liquid
`
`IPR2017-00923 Page 00008
`
`IPR2017-00923 Page 00008
`
`

`

`6,147,009
`
`8
`conductor layer 40. The second region of conductor 50 is in
`electrical communication with the first region of conductor
`40 and is embeddedin the second layer of SiCOH insulator
`44. The second layer of SiCOH film ts in intimate contact
`with the first layer of insulating material 38. In this specific
`example, the first layer of insulating material 38 of SiCOH
`is an intralevel dielectric material, while the secondlayer of
`insulating material, ie.,
`the StCOHfilm 44 is both an
`intralevel and an interlevel dielectric. Based on the low
`dielectric constant of the SiCOH film, superior insulating
`property can be achieved by thefirst insulating layer 38 and
`the second insulating layer 44.
`FIG. 7 shows a present invention electronic device 60
`similar to that of electronic device 30 shown in FIG. 6, but
`with an additional dielectric cap layer 62 deposited between
`the first insulating material layer 38 and the second insulat-
`ing material layer 44. The dielectric cap layer 62 can be
`suitably formed of a material such as silicon oxide, silicon
`nitride, silicon oxinitride, refractory metal silicon nitride
`with the refractory metal being Ta, Zr, Hf or W, silicon
`carbide, silicon carbo-oxide (SiCO), and their hydrogenated
`compounds. The additional dielectric cap layer 62 functions
`as a diffusion barrier layer for preventing diffusion of the
`first conductor layer 40 into the second insulating material
`layer 44 or into the lower layers, especially into layers 34
`and 32.
`
`20
`
`7
`delivery system. Nitrogen, hydrogen, germanium, or fluo-
`rine containing gases can be added to the gas mixture in the
`reactor if needed to modify the low-k film properties. The
`SiCOH films may thus contain atoms such as Ge, N and PF.
`If required the deposited SiCOH films may further be
`stabilized before undergoing further integration processing
`to either evaporate the residual volatile contents and to
`dimensionally stabilize the films or just dimensionally sta-
`bilize the films. The stabilization process can be carried out
`in a furnace annealing step at between 300° C. and 400° C.
`for a time period between about 0.5 and about 4 hours. The
`stabilization process can also be performed in a
`rapid
`thermal annealing process at temperatures above 300° C.
`The dielectric constant of the SiCOH films obtained accord-
`ing to the present invention novel process are not higher than
`3.6. The thermal stability of the SiCOH films obtained
`according to the present invention processis up to at least a
`temperature of 350° C.
`invention
`The SiCOH films obtained by the present
`process are characterized by dielectric constants of k<3.6,
`and are thermally stable for process integration in a BEOL
`interconnect structure which is normally processed at tem-
`peratures of up to 400° C. Furthermore, these SiCOH films
`have extremely low crack propagation velocities in water,
`i.e., below 107° m/s and may even be below 10-1! m/s. In
`contrast, polymeric dielectric films are characterized by
`crack propagation velocities in water of 10~° m/s to 107° m/s
`at similar thicknesses between 700 nm and 1300 nm. The
`
`present invention novel material and process can therefore
`be easily adapted in producing SiCOH films as intralevel
`and interlevel dielectrics in BEOL processes for logic and
`memory devices.
`The electronic devices formed by the present invention
`novel method are shown in FIGS. 6~9. It should be noted
`that the devices shown in FIGS. 6~9 are merely illustration
`examples ofthe present invention method while an infinite
`number of other devices may also be formedby the present
`invention novel method.
`
`Another alternate embodiment of the present invention
`electronic device 70 is shown in FIG. 8. In the electronic
`device 70, two additional dielectric cap layers 72 and 74
`which act as a RIE mask and CMP (chemical mechanical
`polishing) polish stop layer are used. Thefirst dielectric cap
`layer 72 is deposited on top ofthe first insulating material
`(SiCOH)layer 38 and used as a RIE mask. The function of
`the seconddielectric layer 74 is to provide an end point for
`the CMP process utilized in planarizing the first conductor
`layer 40. The polish stop layer 74 can be deposited ofa
`suitable dielectric material such as silicon oxide, silicon
`nitride, silicon oxinitride, refractory metal silicon nitride
`with the refractory metal being Ta, Zr, Hf or W, silicon
`In FIG. 6, an electronic device 30 is shown which is built
`carbide, silicon carbo-oxide (SiCO), and their hydrogenated
`compounds. The top surface of the dielectric layer 72 is at
`on a silicon substrate 32. On top of the silicon substrate 32,
`
`an insulating material layer 34 is first formed withafirst the same level as the first conductor layer 40. A second
`dielectric layer 74 can be added on top of the second
`region of metal 36 embedded therein. After a CMP process
`is conducted on the first region of metal 36, a hydrogenated
`insulating material (SiCOH)layer 44 for the same purposes.
`oxidized silicon carbon film such as a SiCOH film 38 is
`Still another alternate embodiment of the present inven-
`tion electronic device 80 is shown in FIG. 9. In this alternate
`deposited on top ofthe first layer ofinsulating material 34
`and the first region of metal 36. The first layer of insulating
`embodiment, an additional layer of dielectric 82 is deposited
`material 34 may be suitably formed ofsilicon oxide, silicon
`and thus dividing the second insulating material layer 44
`nitride, doped varieties of these materials, or any other
`into two separate layers 84 and 86. The intralevel and
`suitable insulating materials. The SiCOH film 38 is then ;
`interlevel dielectric layer 44 formed of SiCOH, shown in
`patterned in a photolithography process and a conductor
`FIG. 8, is therefore divided into an interlayer dielectric layer
`layer 40 is deposited therein. After a CMP process on the
`84 and an intralevel dielectric layer 86 at the boundary
`between via 92 and interconnect 94. An additional diffusion
`first conductor layer 40 is carried out, a second layer of
`SiCOH film 44 is deposited by a plasma enhanced chemical
`barrier layer 96 is further deposited on top of the upper
`vapor deposition process overlying the first SiCOH film 38
`dielectric layer 74. The additional benefits provided by this
`alternate embodiment electronic structure 80 is that dielec-
`and the first conductor layer 40. The conductorlayer 40 may
`be deposited of a metallic material or a nonmetallic con-
`tric layer 82 acts as an RIE etch stop providing superior
`ductive material. For instance, a metallic material of alumi-
`interconnect depth control.
`num or copper, or a nonmetallic material of nitride or
`Still other alternate embodiments may include an elec-
`polysilicon. The first conductor 40 is in electrical commu-
`tronic structure which has layers of insulating material as
`nication with the first region of metal 36.
`intralevel or interlevel dielectrics in a wiring structure that
`A-second region of conductor 50 is then formed after a
`includes a pre-processed semiconducting substrate which
`has a first region of metal embedded in a first
`layer of
`photolithographic process on second SiCOHfilm layer 44 is
`conducted followed by a deposition process for the second
`insulati

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