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`United States Patent [11] 3,617,824 .
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`(72]
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`[32] Priority
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`[33]
`[31]
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`Inventors Daizaburo Shinoda;
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`Masaoki Ishikawa; Hiroki Muta; Shizuo
`haan Nobuo Kawamura,all of Tokyo,
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`[21] Appl. No. 743,900
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`[22] Filed
`July 10, 1968
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`[45] Patented Nov. 2, 1971
`{73} Assignee Nippon Electric Company, Limited
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`Tokyo, Japan
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`July 12, 1965
`Japan
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`42/79,658
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`[56]
`References Cited
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`
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`UNITED STATES PATENTS
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`3,381,182
`4/1968 Thorton...
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`3,287,612 11/1966 Lepselter..
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`vee
`9/1968 Lehman...
`3,402,081
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`
`.
` Polinsky 0...ese
`3,336,661
`8/1967
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`3,460,003
`8/1969 Hampikian
`ee eenereerress
`aa
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`
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`3/1969 Ruggerio.seaeseeecensenevaseees
`3,434,020
`
`
`
`
`Primary Examiner—John W. Huckert
`
`
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`Assistant Examiner—Martin H. Edlow
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`
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`Attorney—Hopgoodand Calimafde
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`317/234
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`317/235
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`148/188
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`29/589
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`317/234
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`317/235
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`[54] MOS DEVICE WITH A METAL-SILICIDE GATE
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`3 Claims, 7 Drawing Figs.
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`[82] U.S. Chae eentcccsserassearecerscensnneeevennee 317/235 R, ABSTRACT:A semiconductor device obtains in whichasili-
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`317/235 B, 317/235 AG, 317/234 L
`cide film of 3d, 4d and Sd transition metal such asiron (Fe),
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`Int. Ch...Lane saeesanseeccsccencnersensnenseessarsanees HOM11/14
`cobalt (Co), nickel (Ni), molybdenum (Mo), palladium (Pd),
`[51]
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`platinum (Pt), or the like, is used as a conductive meansin
`117/212,
`[50] Field of Search..........c.cccccscccssesssssonsesseenes
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`place of the conventional simple metal and whose structure is
`106 A; 317/234 (5.2), 234 (5.4), 235 (21.1), 235
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`semiconductor-insular-silicide.
`(46), 235 B, 235 AG, 234L
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`Page 1 of 6
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`TSMCExhibit 1003
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`TSMC Exhibit 1003
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`Page 1 of 6
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`PATENTEDOV 2
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`Isr
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`(3,617,824
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`[LLL
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`LSSADSESSKKKRes
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`SKCeaeSe
`G
`FEN.PREan FIG.7.
`veCY
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`DAIZABURO LNTORS
`|
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`Nn
`MASAOK 4SH1AWA
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`INVENTOR
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`M/ROK! MUTA
`SHIZUO ASANABE
`NOBUO WAWAMURA
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`BY
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`Page 2 of 6
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`ATTORNEYS
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`Page 2 of 6
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`lative layers formed in contact with each other over the sub-
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`strate should have excellent adhesive property, heat- and
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`shock- resisting property, adaptability to photomask-etching
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`process, and stability against various electrical conditions to
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`which the substrate is subjected in processing. According to
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`the common process of manufacturing the LSI device, theal-
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`kaline (mostly sodium) ions, which enter into the insulative
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`film (silicon dioxide layer) in the process of evaporation or
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`sputtering metal layer to form the conductive layer over the
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`insulative film, adversely affect the electrical stability of boun-
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`dary layers between the silicon substrate and the oxide film.
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`The deterioration in the boundary layer adversely affects the
`reliability of the LSI device the same as the MOS-type device.
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`Also,
`in the conventional structure of the LSI device,
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`neither aluminum nor molybdenumis satisfactory to form the
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`layer, because the former easily deteriorate in the
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`processof forming thereoverthe oxide insulative layer and the
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`latter is insufficient in its adhesive and contacting property.
`For these reasons, it has been difficult to provide the LSI
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`devices of high reliability, which satisfy the above-mentioned
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`requirements.
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`Anobjectof the present invention is therefore, to provide a
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`highly stable and highly reliable semiconductor device satisfy-
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`ing all of the requirements mentioned above.
`SUMMARYOFTHE INVENTION
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`1
`MOS DEVICE WITH A METAL-SILICIDE GATE
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`BACKGROUNDOF THE INVENTION
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`This invention relates to a semiconductor device having a
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`semiconductor substrate, an insulator film formed over one
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`major surface of the substrate, and a conductive layer
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`deposited on the insulatorfilm.
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`Recently it has been necessary to develop semiconductor
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`for producing highly reliable and effective
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`semiconductor devices, which are miniaturized modified for
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`higher frequency use, and subjected to the large-scale integra-
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`tion. To provide the desired highreliability, a sufficiently heat-
`resistive and stable ohmic contact, PN junction, Schottky bar-
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`rier and/or conductive layer should be unfailingly produced.
`For this purpose,
`is important to stabilize the contact
`it
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`between semiconductor elementandinsulatingfilm; insulator
`film and conductive film; and conductive film and lead wire.
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`From this point of view, the conductor used for ohmic contact
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`should satisfy the following requirements:
`1. Good adherence and low contact resistance to the
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`semiconductorsilicon (Si).
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`2. Good adherence to the insulating film such assilicon
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`dioxide (SiO,) orsilicon nitride (Si,N,).
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`3. Adaptability to the photomask-etching process.
`4. Availability to provide stable bonding to gold (Au) which ,
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`is used for the lead wire.
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`Conventionally, aluminum (Al) is the most commonly used
`Accordingto this invention, a semiconductor device obtains
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`metal for the ohmic contact of a semiconductor device. How-
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`in whichasilicide film of 3d, 4d and 5d transition metal such
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`ever, there are two rather severe problemsassociated with the
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`as iron (Fe), cobalt (Co), nickel (Ni), molybdenum (Mo),
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`use of aluminum thoughit satisfies requirements (1) through
`palladium (Pd), platinum (Pt), or thelike, is used as a conduc-
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`(a). One of them is caused by the fact that an aluminum layer
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`tive means in place of the conventional simple metal and
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`forms a high-resistance alloy with the gold lead wire, which
`whose structure is semiconductor-insulator-silicide.
`In the
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`adversely effects the ohmic contact. Therefore, aluminum is
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`present invention, it is found that the silicide of transition
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`not sufficiently suited for use in a highly reliable ohmic con-
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`metal forms an excellent ohmic or Schottky barrier contact
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`tact.
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`between itself and silicon and -has good adherenceto silicon,
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`Recently, a method of forming an ohmic contact has been
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`silicon dioxide, silicon nitride and so on. Also thesilicide has
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`developed which avoid those problems in the use of alu-
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`the low resistivity and adaptability to photomask etching, and
`minum. The process contains the following steps: After heat
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`it does not cause a deterioration in the electrical characteristic
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`treatment, a platinum silicide is formed in the boundary layer
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`ofthe insulator film in the forming process ofsilicide onto the
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`on the silicon substrate. The nonreacted part of platinum is
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`insulator.
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`removed therefrom by chemical treatment and, then titanium
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`Therefore the semiconductor device is thus characterized in
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`(Ti) and platinum are sputtered thereon and gold is deposited
`that thesilicide forms good contact to semiconductor,thesili-
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`thereto by electrolytic plating.
`cide-insulator-semiconductor characteristics is extremely sta-
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`is possible to provide a
`it
`According to this method,
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`ble and the manufacturing processis simple. This the present
`semiconductor device which has highly stable and reliable
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`invention is applicable to planar-type semiconductors,field ef-
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`ohmic contacts as compared with the method using aluminum.
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`fect semiconductorsof the insulated gate type, and large-scale
`However,this methodis inevitably complicated andit is rather
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`integrated circuits having a multilevel interconnection struc-
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`difficult to realize a mass-production system.
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`ture.
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`On the other hand,
`in order to obtain a semiconductor
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`The present invention will be explained in particular con-
`device having a Schottkybarrier, the metallic film should have
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`junction with the accompanying drawings.
`such propertythat (1') it is easily and well bondedtosilicon
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`FIG. 1 is a longitudinal cross-sectional view illustrating the
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`and is capable of forming a stable rectifying layer. Also, the
`first embodimentofthis invention,
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`metallic film should satisfy the foregoing requirements (2)
`FIG. 2 is a longitudinal cross-sectional view illustrating a
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`through (4).
`modification of the first embodimentshownin Fig.1;
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`Molybdenum (Mo), palladium (Pd) orthe like satisfies the
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`FIG. 3 is a longitudinal cross-sectional view illustrating the
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`requirement(1') but does not meet (2). In view of the forego-
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`second embodimentof this invention;
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`ing, there is no material available which can perfectly satisfy
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`FIG. 4 is a graph showing capacitance vs. applied voltage
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`the requirements (1) through (4) or (1') through (4) in the
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`characteristic of the device of Fig. 3;
`case of ohmic contact or Schottky barrier respectively, as long
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`FIG. 5 is a longitudinal cross-sectional view of the third em-
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`as a simple metal substance is used therein. For this reason,
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`bodimentofthis invention;
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`the highly stable ohmic contact or Schottky barrier has hither-
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`FIGS. 6(A) through 6(C) show the multilevel structure of
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`to been formedby only resorting to the multilayer technique.
`an integrated circuit to which the presentinventionis applied;
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`A similar problem arises in the case of the MOS-type
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`and
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`semiconductor device which has the metal-insulator-semicon-
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`FIG. 7 is a partial cross-sectional view illustrating the fourth
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`ductorlayerstructure.
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`embodimentofthis invention.
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`Such structure additionally dominates the characteristic
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`In the simple PP junction diode shown in FIG. 1, whichis a
`andreliability of the device by the electricalstability of the in-
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`first embodimentthis invention, as insulating film 12 is formed
`terior state between the semiconductorsubstrate and insulator
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`formed on the substrate.
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`over an n-type single crystal silicon substrate 11, by thermally
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`growing silicon dioxide. Through a small circular hole prear-
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`Similarly, in the field of the large-scale integration (LSI),
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`rangedatsaid insulatingfilm 12, a P-type impurity is diffused
`the multilevel technique has been adopted to provide the in-
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`so that the diffused region 13 of P-type conduction is formed
`terconnection among the elements in the substrate. In the
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`in the substrate 11. To establish a favorable ohmic contact
`multilevel interconnection structure, the conductive and insu-
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`3,617,824
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`Page 3 of 6
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`3,617,824
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`4
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`sistance of 10 ohm-cm after oxidation in dry oxygen at 1,150°
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`onto the P-type diffusion region 13, a cobalt silicide 14 is
`C. for 2 hours. The oxide film on the lower side of the sub-
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`deposited on the entire surface including the insulating film 12
`strate 11 is removed by chemical process, and on the upper
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`ofsilicon dioxide by vacuum evaporation of cathode-sputter-
`side ofthesilicon oxide film 12 there is deposited a metalsili-
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`ing to about 2,000 Angstrom thickness. Then, a stable con-
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`cide 14, e.g., cobalt silicide, by evaporation at a high vacuum
`ductive metal film 15, such as a gold or platinum film,
`is
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`to a thickness of about 2,000 A., and then a suitable metal 15
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`deposited thereon, to about 5,000 Angstrom thickness. After
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`is vaporized thereon. After the deposition of the metalfilm 15,
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`this deposition of metal film, said metal film 15 and transition
`the metal film 15 and cobaltsilicide film 14 are shaped into a
`metalsilicide film 14 are etched into a specific shape by the
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`predetermined configurations by photomask etching. Thesil-
`photomask-etching process. In the foregoing manner, the in-
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`icon substrate 11 is cut to a suitable size, and lead wires 31, 32
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`vention provides-a highly stable and highly reliable semicon-
`are connected, respectively, to the lower side of the silicon
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`ductor device through a simple process. In this embodiment,
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`piece and to the metalfilm 15.
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`the specific resistance of the ohmic contact formed between
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`The capacity-voltage characteristics of the diode structure
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`cobalt silicide 14 and p-type region 13 whose specific resistivi-
`of the cobalt silicide-silicon dioxide-silicon thus formed are
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`ty is 2x10" ohm-cm is less than about 4X10'* ohm-cm *. This
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`shownin Fig. 4. The capacity-voltage characteristic of the
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`specific contact resistance is very small compared with the
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`diode just formed is represented by the curveain the figure,
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`specific contact resistance, (i.e., 3.7X10% ohm-cm.* of the
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`while the capacity-voltage characteristic of the diode after the
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`conventional device. Even when the P-type region 13 is
`heat treatment in air at 250° C. for 30 minutes with the appli-
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`replaced by an n-type silicon of specific resistivity 1x10? ohm-
`cation of an electric field of 3X10'6 V/cm. with the metal
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`cm. and platinumsilicide (PtSi) is used as the transition metal
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`maintained positive andthe silicon negative is represented by
`silicide 14, a favorable ohmic contact of the specific contact
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`the curve b.
`resistance 6X101* ohm-cm.?is obtained. It is to be noted that
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`Whencalculated from the curve a of FIG. 4, the surface
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`the ohmic contact obtained according to this invention is sta-
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`charged carrier density of the resulting diode is about 5X101!/
`ble from the thermalas well as the mechanicalpointof view.
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`The sameeffect as stated above can be obtained from this
`cm.? and, as can be seen from the curve b of FIG. 2, the sur-
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`face-charged carrier density remains substantially unchanged
`embodimenteven if modified to a certain extent. More par-
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`even with a heat treatment with the voltage applied. It will be
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`ticularly, referring to FIG. 2, the heat treatment may be ac-
`thus apparent that a diode having surface states betweensil-
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`complished after depositing the transition metalsilicide 14.
`icon andsilicon dioxide can be obtained.
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`Alternatively a stable conduction metal film 15, such as a
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`Fig. 5 showsa field effect transistor of MOStype, a form of
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`platinum orgold film may be added thereto via a metallic film
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`semiconductor device obtained in accordance with the
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`21 oftitanium or chromium (Cr), after depositing a transition
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`presentinvention. Within a P-typesilicon substrate 11 thereis
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`metal silicide 14. In FIG, 2 the same reference numerals are
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`formed an N*-type region source 51 and drain 52. Holes are
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`used to designate the same elementsas in Fig.1,
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`then madeat predetermined pointsof thesilicon dioxide film
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`Still another example related to the Schottky barrier diode
`12, Next, cobalt silicide 14 and a simple metal 15 are
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`will be explained below.
`deposited by evaporation on the surface, and a source elec-
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`Referring again to Figure 1, the semiconductorsubstrate 11
`trode 53, gate electrode 54,and drain electrode 55 are etched
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`and region 13 are of N-type silicon whose specific resistivities
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`to the desired shapes by photomask etching. In such field ef-
`are respectively 2X10" ohm-cm. and 0.8 ohm-cm. A silicon
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`fect transistors of the MOStype, thestability of surface states
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`dioxide film 12 is thermally grown on the surface of each of
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`ofthesilicon substrate the gate electrode has a direct bearing
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`the regions 11 and 13. A circular hole is provided in the oxide
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`upon the reliabliity of the operating characteristics. The
`file 12, to expose the surfaceofsilicon. The exposed surfaceis
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`transistor of this embodiment has such stable surface states
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`cleaned by chemical treatment. After this process,a transition
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`that the transistor functions mostsatisfactorily without varia-
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`metalsilicide 14, such as cobalt silicide, is evaporated thereon
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`tion of the operating characteristics.
`to about 2,000 thickness under a super high vacuum condi-
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`With the embodiments of FIGS. 3 and5, it is feasible for the
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`tion. Further, an electrode 15 is deposited onto thesilicide 14.
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`gate electrode to be formedofsilicide, to maintain the surface
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`The resultant metal layers are then formed into a specific
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`stability of the gate insulator.
`shape through a photoetching process. The characteristic of
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`Referring to FIGS. 6(A) through (C) and Fig. 7, the fourth
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`the Schottky barrier diode are tabulated below, in comparison
`embodimentofthis invention has a multilevel interconnection
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`with those of a conventional diode having molybdenum (Mo).
`structure.
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`Fig. 6A shows an integrated circuit substrate in which cir-
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`cuit components such as transistors, diodes, and resistors is
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`formed and interconnected with a composite conductive film
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`such as silicide-metal-silicide. On the surface of the semicon-
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`ductor, an insulating film of silicon dioxide and/or anotherin-
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`sulator is deposited by a chemical reaction or sputtering.
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`Apertures are formed in the insulator layer in the desired pat-
`tern for photomask etching use, as shown in FIG. 6B. Next, a
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`metal silicide and a low-resistance metal are deposited on the
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`insulator and through apertures provide multilevel intercon-
`nection amongthecircuits as shownin FIG. 6C.
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`A partial sectional view ofthe resulting integrated circuit 70
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`is shownin FIG. 7. Referring to FIG. 7, a silicon substrate 11 is
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`coated bysilicon dioxide 12. In the substrate 11, transistors,
`diodes and resistors are formed. Interconnection among the
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`elements is achieved by films of a metalsilicide 71, 72 and a
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`low-resistance metal 73 which altogether form a triple layer.
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`The entire surface of the integrated circuit substrate, except
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`for the through-holes, is covered by an insulating film 74.
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`Through the apertures,
`the upper level
`interconnections
`formed by a metal silicide 75 and a low-resistance metal 76
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`are connected to the underlyingcircuits.
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`According to this embodiment, integrated circuits of high
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`degree of integration are obtained, and the multilevel inter-
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`Current
`Current
`Metal which forms
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`value
`Schottky barrier
`value
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`Height
`(specific resist-
`when for-
`when in-
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`of
`ance of N-type
`word vol-
`verse vol-
`Peak
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`barrier
`silicon: 0.8 ohm-cm.)
`tage is
`tage is
`withstand
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`voltage
`{contact area:
`ev.
`1 volt
`4 volts
`|
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`1.9x10"5 cm.?)
`(ampere}
`(ampere)
`{volt)
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`18
`16x10"
`80x10"
`0.65
`CoSi
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`18
`30x10"
`88x10
`0.58
`FeSi
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`20
`15x10"
`78x10"
`PdSi
`0.73
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`25
`10x 101°
`70x16"
`0.82
`PtSi
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`40x10"*
`68x10"
`Mo
`0.65
`15
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`Asis evidently shownin the table, the Schottky diode of this
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`invention is highly efficient and its production process can be
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`simplified and, further, the heat-resisting property is markedly
`improved owingto the useofsaid silicide.
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`Fig. 3 is a sectional view showing a second embodiment of
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`this invention, whose structure is a MOSdiode obtainedin ac-
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`cordancewith the present invention.
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`Referring to Fig. 3, a silicon dioxide film 12 is formed on the
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`surface of an N-typesilicon substrate 11 having a specific re-
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`70
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`75
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`\\\
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`\
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`Page4 of 6
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`“~\
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`Page 4 of 6
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`

`

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`5
`connection attained in accordance with the inventionis highly
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`reliable becauseit is extremely stabilized thermally and elec-
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`trically.
`The metalsilicide to be used in the invention is not limited
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`to what has been shownin the described embodiments but any
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`metalsilicide may be used so long as sucha silicide is chemi-
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`cally stable, low in specific resistance, and satisfactory as re-
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`gards its bonding property towardsilicon andinsulating film.
`Various experiments have been conducted and it was found
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`that the following transition metals silicide are especially
`favorablefor the purpose ofthis invention:
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`3d Transition Meta!Silicide
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`titanium silicides (TisSi,, TiSi,) vanadium silicides
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`(V;Sis, VSi,), chromium silicides (Cr,Si, CrSi, CrSi,),
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`manganesesilicides (MnsSi;, MnSi, Mn,Si;), iron silicides
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`(FeSi, FeSi,) cobalt silicides (Co,Si, CoSi, CoSi,),
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`nickelsilicides (NiSi,, Ni,Si, NiSi).
`4d or 5d Transition MetalSilicide
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`palladium silicides (Pd,Si, PdSi), platinum silicides (Pt,Si,
`PtSi).
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`While the invention has been explained in connection with
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`specific embodiments,it is to be understood that this explana-
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`Page 5 of 6
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`3,617,824
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`6
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`tion is made only by way of example andnotas a limitation to
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`the scopeof the invention.
`Claimsfor Patent
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`1. Ina field effect semiconductor device of MOS type hav-
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`ing a semiconductorsubstrate, the improvement comprising a
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`layer of metal silicide means deposited on an insulative layer
`lying on the surface of the semiconductor substrate, said
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`meansforminga stable capacitance-voltage said metalsilicide
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`being selected characteristic from the group consisting of
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`platinumsilicide, cobalt silicide and palladiumsilicide.
`2. The improvementas claimed in claim 1, wherein said
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`metalsilicide is cobalt silicide and wherein a layer of metal of
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`low electrical resistance covers the metalsilicide layer.
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`3. The improvement as claimed in claim 1, wherein two im-
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`purity-diffused regions having the opposite conductivity type
`to said substrate are formedin said substrate in such a relation
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`that the portion ofthe surface of said semiconductor substrate
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`lying under said metal silicide layer may be interposed
`betweensaid two regions, andelectrical leadout members are
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`applied to eachof said regions said metalsilicide layer.
`*
`&
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`*
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`5
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`10
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`15
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`20
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`25
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`355
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`70
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`75
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`Page 5 of 6
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`

`

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`UNITED STATES PATENT OFFICE
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`
`CERTIFICATE OF CORRECTION
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`Patent No. Dated_November 2, 19713,617,824
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`Inventor(s)
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`Daizaburo Shinoda, et al
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`It is certified that error appears in the above-identified patent
`and that said Letters Patent are hereby corrected as shown below:
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`Column 6, line 8, after "voltage" should read
`-- characteristic --; line 9, after
`"selected" cancel
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`"characteristic"; line 12, after "layer of" should read
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`--a --; line 21, after "regions" should read -- and --.
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`Signed and sealed this 10th day of October 1972.
`
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`Commissioner of Patents
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`(SEAL)
`Attest:
`
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`
`
`EDWARD M,. FLETCHER, JR.
`
`
`Attesting Officer
`
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`
`ROBERT GOTTSCHALK
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`
`
`ORM PO-1050 (10-69)
`
`USCOMM-DC 60378-P69
`f U.S. GOVERNMENT PRINTING OFFICE : 1949 O—366-334,
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`Page6 of 6
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`Page 6 of 6
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