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`Contents
`
`1 Semiconductor Crystals
`
`1.1 Crystals and Crystallographic Orientations
`
`1.2 The Silicon Crystal
`1.2.1 Crystal Growth
`1.2.2 Crystal Doping
`1.2.3 Defects in Silicon Crystals
`
`.
`1.3 Wafer Preparation
`1.3.1 Wafer Type and Orientation
`1.3.2 Axial and Radial Variations
`
`1.4 Compound Semiconductors
`1.4.1 Crystal Growth
`1.4.2 Impurities and Crystal Doping
`
`2 Thermal Oxidation and Nitridation
`
`N
`
`
`
`L»MMuii-3'3;axu-SGsooax
`
`39
`
`2.1 SiO, and S102-Si Interface
`
`2.1.1 Properties and Structure of SiO2
`2.1.2 Properties and Structure of the SiO;-Silntcrface
`
`2.2 Thermal Oxidation
`2.2.1 Oxidation Reactions
`2.2.2 Oxidation Kinetics
`
`2.2.3 Initial Oxidation Stage
`2.2.4 Oxidation Systems
`2.2.5 Second-Order Effects in Oxidation Kinetics
`2.2.6 Eflects of Oxidation on Silicon
`
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`4.2 Resolution Enhancement Techniques
`4.2.1 Optical Phase-Shifting
`4.2.2 Ofi'-Axis (or Oblique) Illumination
`
`4.3 Electron-Beam Lithography
`4.3.1 Proximity Eflects
`4.3.2 Electron-Beam Exposure Systems
`4.3.3 Electron Resists
`
`4.4 X—Ray Lithography
`4.4.1 X-Ray Masks
`4.4.2 X-Ray Sources
`4.4.3 Imaging
`4.4.4 X-Ray Resists and Resolution
`
`4.5 Ion-Beam Lithography
`4.5.1 Ion-Beam Exposure
`4.5.2 Ion Sources
`4.5.3 Pattern Definition
`
`5 Contamination Control and Etch
`
`5.1 Clean Processes
`5.1.1 Contaminants
`
`5.1.2 Wet Cleaning
`5.1.2 Dry Cleaning
`
`5.2 Etching
`5.2.1 Wet Etching
`5.2.2 Dry Etching
`
`6 Ion Implantation
`
`6.1 Principle of Operation
`6.1.1 Ion Sources
`
`vii
`
`217
`218
`225
`
`227
`228
`229
`232
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`234
`234
`236
`241
`243
`
`245
`245
`245
`246
`
`261
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`261
`262
`266
`270
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`272
`276
`280
`
`353
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`355
`355
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`viii
`
`6.2
`
`6.3
`
`6.1.2 Analyzer Magnet
`6.1.3 Acceleration Column
`
`6.1.4 Scanning System
`6.1.5 Target Chamber
`
`Energy Loss and Range Distribution
`6.2.] Energy Loss Mechanisms
`6.2.2 Range Distribution
`6.2.3 Departure from the Normal Distribution
`6.2.4 Masking
`6.2.5 Lateral Spread of Implanted Ions
`
`Crystal Damage and Dopant Activity
`6.3.1 Primary Defects
`6.3.2 Knock-On Ranges
`6.3.3 Annealing and Secondary Defects
`6.3.4 Annealing and Electrical Activity
`
`7 Diffusion
`
`7.1
`
`Point Defects
`
`7.2
`
`Fick’s Laws
`7.2.1 Diffusion from a Constant Source
`7.2.2 Diffusion from an Instantaneous Source
`7.2.3 Two-Dimensional Diffusion
`
`7.3
`
`Non-Constant Diffusivity
`7.3.1 Efifect of Electric Field
`
`7.3.2 Dependence of Diffusion on Surface Reactions
`7.3.3 Difi"usion of Implanted Profiles
`7.3.4 Concentration-Dependent Diifusivity
`
`7.4
`
`Diffusion in Polysilicon
`
`7.5
`
`Diffusion in Insulators
`
`7.6
`
`Diffusion Sources
`
`7.7
`
`Gettering in Silicon
`
`364
`365
`367
`370
`
`376
`376
`383
`393
`
`412
`
`4 l 6
`416
`422
`423
`426
`
`467
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`470
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`473
`478
`479
`480
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`483
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`493
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`8 Contact and Interconnect Technology
`
`8.1 Contact Metallurgy
`8.1.1 The Aluminum Silicon Contact
`8.1.2 Contact Materials and Baniers
`
`8.2 Poly-Metal Dielectrics
`8.2.1 Dielectric Composition
`8.2.2 Planarization Techniques
`8.2.3 Contact Definition
`
`8.3 Metal Interconnects
`
`8.3.1 Metal Deposition
`8.3.2 Contact Fill and Metal Patterning
`
`8.4 Inter-Level Dielectrics
`
`8.5 Multi-Level Metals
`
`8.6 Reliability Considerations
`8.6.1 Electromigration
`8.6.2 Stress Migration (Creep)
`8.6.3 Corrosion
`
`ix
`
`527
`
`529
`531
`535
`
`546
`546
`547
`5 50
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`551
`551
`559
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`565
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`57 1
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`572
`576
`579
`580
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`Preface
`
`The drive toward new semiconductor technologies is intricately
`related to market demands for cheaper, smaller, faster, and more
`reliable circuits with lower power consumption. The development
`of new processing tools and technologies is aimed at optimizing
`one or more of these requirements. This goal can, however, only
`be achieved by a concerted effort between scientists, engineers,
`technicians, and operators in research, development, and manufac-
`turing. It is therefore important that experts in specific disciplines,
`such as device and circuit design, understand the principle, capabil-
`ities, and limitations of tools and processing technologies. It is also
`important that those working on specific unit processes, such as
`lithography or hot processes, be familiar with other unit processes
`used to manufacture the product.
`
`Several excellent books have been published on the subject
`of process technologies. These texts, however, cover subjects in
`too much detail, or do not cover topics important to modern tech-
`nologies. This book is written with the need for a ”bridge" between
`different disciplines in mind. It is intended to present to engineers
`and scientists those parts of modern processing technologies that
`are of greatest importance to the design and manufacture of semi-
`conductor circuits. The material is presented with sufficient detail
`to understand and analyze interactions between processing and
`other semiconductor disciplines, such as design of devices and cir-
`cuits, their electrical parameters, reliability, and yield.
`
`The book Was developed from notes prepared for courses
`taught at IBM and the University of Vermont.
`It serves as a base
`on which to build an understanding of the manufacture of semi-
`conductor products. It is written in a form to satisfy the needs of
`engineers and scientists in semiconductor research, development
`and manufacturing, and to be conveniently used for a one-semester
`graduate-level course in a semiconductor engineering or material
`science curriculum. The book consists of eight chapters on unit
`processes that are arranged in a conventional sequence that
`reflects typical integrated process technologies. It begins with the
`preparation of semiconductor crystals and continues with thermal
`oxidation, thin-film deposition, lithography, etching, ion implanta-
`
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`xii
`
`tion, diffusion, and contact and interconnect technology. The last
`chapter is co-authored by J. G. Ryan, manager of Thin Film and
`Chemical-Mechanical Polishing Development at IBM.
`
`One of the challenges faced when writing a book on semi-
`conductor
`technologies is
`fmding satisfactory explanations
`to
`observations reported in the literature. Semiconductor processes
`are based more heavily on empirical data than on prediction by
`simulation of physical or chemical phenomena. This by itself,
`requires" a thorough review and comparison of published data and
`observations. It is easier to predict electrical parameters from given
`horizontal and vertical device geometries than to define processing
`conditions that result in such geometries. The reader should there-
`fore not be surprised-to find sections describing ”how” a process is
`performed without the accompanying ”why”.
`
`The author is indebted to all those who helped shaping the
`book in its present form. He is very grateful to his friends and col-
`leagues, Albert Puttlitz and Ashwin Ghatalia,
`for
`relentlessly
`checking for flaws in the manuscript and making valuable sug-
`gestions. He also thanks Robert Simonton (Eaton Corporation)
`and Larry Larson (SEMATECH) for spending a great deal of time
`with him on ion implantation equipment. The author gratefully
`acknowledges all his IBM colleagues for their invaluable inputs
`and discussions; Don Chesebro, Burn Lin, Tim Brunning, Mike
`Hibbs for their inputs on advanced lithography, Geoff Akiki for
`providing information on advanced mask preparation, Hans
`Pfeiffer on electron-beam lithography, Randy Mann and Robert
`Geflken on silicides and metallization.
`
`The author and R. J. Bombard are indebted to IBM and
`SEMATECH for their tremendous support.
`
`The book was prepared using computer facilities at IBM.
`B. El-Kareh, R. J. Bombard, and J. G. Ryan (Chap. 8), however,
`take full responsibility for its contents.
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