UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`_______________
`
`GlobalFoundries U.S. Inc.
`
`Petitioner
`
`v.
`
`Godo Kaisha IP Bridge 1
`
`Patent Owner
`
`Patent No. 6,197,696
`Filing Date: March 23, 1999
`Issue Date: March 6, 2001
`
`Title: METHOD FOR FORMING INTERCONNECTION STRUCTURE
`_______________
`
`Inter Partes Review No. To be assigned
`
`_____________________________________________________________________
`
`PETITION FOR INTER PARTES REVIEW
`UNDER 35 U.S.C. §§ 311-319 AND 37 C.F.R. § 42.100 ET SEQ.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`TABLE OF CONTENTS
`
`I.
`
`II.
`
`
`
` The ’696 Patent ..................................................................................................................6 III.
`
`Preliminary Statement .......................................................................................................1
`Technological Background ................................................................................................1
`A.
`Integrated Circuits and Interconnections .................................................................1
`B.
`Semiconductor Etching and Photolithography ........................................................4
`
`A.
`Description of the Challenged Claims .....................................................................6
`B.
`Examination of the ’696 Patent..............................................................................17
`C.
`The Challenged Claims Are Not Entitled to the Benefit of Foreign Priority ........18
`1.
`The first, second, and fourth embodiments of the ’371 application
`
`do not disclose step h) of claim 10 ............................................................ 19
`The third, variant of the third, and fourth embodiments do not
`disclose step i) of claim 10 ........................................................................ 20
`The third, variant of the third, and fourth embodiments do not
`disclose step j) of claim 10 ........................................................................ 21
`No embodiments of the ’371 application disclose step l) of claim
`10............................................................................................................... 23
`Statement of Precise Relief Requested for Each Claim Challenged ...........................24
`A.
`Claims for Which Review is Requested ................................................................24
`B.
`Statutory Grounds of Challenge .............................................................................24
`C.
`Level of Ordinary Skill ..........................................................................................24
`D.
`Claim Construction ................................................................................................24
`Claims 10–12 of the ’696 Patent Are Unpatentable Over the Prior Art .....................25
`A.
`Disclosures of the Prior Art ...................................................................................25
`Grill (U.S. Patent No. 6,140,226) ............................................................. 25
`1.
`
`Aoyama (U.S. Patent No. 5,592,024) ........................................................ 30
`2.
`
`A POSITA would have combined teachings of Grill and Aoyama .......... 31
`3.
`
`Grill Renders Claims 10 and 11 Obvious ..............................................................34
`Claim 10 is obvious in view of Grill ........................................................ 35
`1.
`
`Claim 11 is obvious in view of Grill ........................................................ 48
`2.
`
`The Grill-Aoyama Combination Renders Claims 10–12 Obvious ........................48
`Claim 10 is obvious in view of the Grill-Aoyama combination ............... 48
`1.
`
`Claim 11 is obvious in view of the Grill-Aoyama combination ............... 59
`2.
`
`
`IV.
`
`
`
`V.
`
`
`
`2.
`
`
`
`3.
`
`
`
`4.
`
`
`
`B.
`
`C.
`
`
`
`
`i
`
`
`
`
`
`

`

`
`
`D.
`
`VI.
`
`3.
`
`
`
`4.
`5.
`
`
`
`
`Claim 12 is obvious in view of the Grill-Aoyama combination ............... 60
`3.
`
`Alternative Combinations for Claim 11 .................................................................63
`Disclosure of Wetzel (U.S. Patent No. 5,920,790) .................................... 64
`1.
`
`A POSITA would have combined teachings of Wetzel with
`2.
`
`teachings of Grill ...................................................................................... 64
`A POSITA would have combined teachings of Wetzel with
`teachings of Grill and Aoyama ................................................................. 65
`Claim 11 is obvious in view of the Grill-Wetzel combination .................. 66
`Claim 11 is obvious in view of the Grill-Aoyama-Wetzel
`combination............................................................................................... 66
` Mandatory Notices Under 37 C.F.R. §42.8 ....................................................................67
`A.
`Real Parties-In-Interest ..........................................................................................67
`B.
`Related Matters ......................................................................................................67
`C.
`Lead and Back-Up Counsel ...................................................................................68
`D.
`Service Information ...............................................................................................68
` Certification Under 37 C.F.R. §42.24(d) ........................................................................69 VII.
`
` Payment of Fees................................................................................................................69
`VIII.
`Time for Filing Petition ...................................................................................................69
`IX.
`
`Grounds for Standing ......................................................................................................69
`X.
`
`XI.
` Conclusion ........................................................................................................................69
`
`
`
`
`
`ii
`
`
`
`
`
`

`

`
`
`Table of Authorities
`
`CASES
`
`Ariosa Diagnostics, Inc. v. Illumina, Inc., IPR2014-01093, Paper 69 (Jan. 7, 2016)....................24
`
`Core Survival, Inc. v. S&S Precision, LLC, PGR2015-00022, Paper 8 (Feb. 19,
`2016) ........................................................................................................................................17
`
`Dynamic Drinkware, LLC v. Nat’l Graphics, Inc., 800 F.3d 1375 (Fed. Cir. 2015) .....................24
`
`Fiers v. Revel, 984 F.2d 1164 (Fed. Cir. 1993) .............................................................................17
`
`In re Ziegler, 992 F.2d 1197 (Fed. Cir. 1993) ...............................................................................18
`
`Petition, IPR2016-01379................................................................................................................66
`
`Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) (en banc) ...............................................24
`
`Upsher-Smith Labs., Inc. v. PamLab L.L.C., 412 F.3d 1319 (Fed. Cir. 2005) ..............................34
`
`STATUTES AND RULES
`
`35 U.S.C. ........................................................................................................................................23
`
`35 U.S.C. § 103 ........................................................................................................................23, 66
`
`35 U.S.C. §§ 311–319 ......................................................................................................................1
`
`35 U.S.C. § 311(c) .........................................................................................................................68
`
`MISCELLANEOUS
`
`37 C.F.R. § 42.8 .......................................................................................................................66, 68
`
`37 C.F.R. § 42.24 ...........................................................................................................................68
`
`37 C.F.R. § 42.24(d) ......................................................................................................................68
`
`37 C.F.R. § 42.100(b) ....................................................................................................................24
`
`37 C.F.R. § 42.100 et seq. ................................................................................................................1
`
`37 C.F.R. § 42.101(b) ....................................................................................................................68
`
`37 C.F.R. § 42.102(a).....................................................................................................................68
`
`37 C.F.R. §§ 42.103(a) and 42.15(a) .............................................................................................68
`
`
`
`
`iii
`
`
`
`
`
`

`

`
`
`37 C.F.R. § 42.104(a).....................................................................................................................68
`
`37 C.F.R. § 42.108 .........................................................................................................................17
`
`V.B.1, Grill ....................................................................................................................................47
`
`Additionally, Grill..........................................................................................................................35
`
`C. Akrout et al., “A 480-MHz Microprocessor in a 0.12µm Leff CMOS
`Technology with Copper Interconnects,” ..................................................................................5
`
`Further, Grill ..................................................................................................................................34
`
`Grill at 4:60–5:8 and 7:16–8:8 .......................................................................................................34
`
`Grill’s Figure 5A and Figure 21(a) ....................................................................................35, 36, 37
`
`Grill’s Figure 5B and Figure 21(b) ................................................................................................39
`
`Grill’s Figure 5C and Figure 21(a) ................................................................................................38
`
`Grill’s Figure 5C and Figure 22(a) ................................................................................................39
`
`Grill’s Figure 5D and Figure 22(b) ................................................................................................40
`
`IPR2016-01376, IPR2016-01378 ..................................................................................................66
`
`J.N. Burghartz et al., “Monolithic Spiral Inductors Fabricated Using a VLSI Cu-
`Damascene Interconnect Technology and Low-Loss Substrates,” ............................................5
`
`Petition, Grill .................................................................................................................................66
`
`Thus, Grill ......................................................................................................................................47
`
`U.S. Patent No. 3,617,824................................................................................................................5
`
`U.S. Patent No. 3,838,442................................................................................................................5
`
`U.S. Patent No. 5,592,024..........................................................................................................5, 29
`
`U.S. Patent No. 5,635,423................................................................................................................5
`
`U.S. Patent No. 5,741,626................................................................................................................5
`
`U.S. Patent No. 5,920,790..........................................................................................................5, 63
`
`U.S. Patent No. 6,100,184................................................................................................................5
`
`U.S. Patent No. 6,103,616................................................................................................................5
`
`
`
`
`iv
`
`
`
`
`
`

`

`
`
`7
`U.S. Patent No. 6,140,226..........................................................................................................5, 24
`U.S. Patent No. 6,140,226 ........................................................................................................ ..5 24
`
`U.S. Patent No. 6,197,696...................................................................................................... passim
`U. S. Patent No. 6,197,696 .................................................................................................... .. passim
`
`
`
`
`
`
`v
`
`
`
`
`
`

`

`
`
`LIST OF EXHIBITS
`
`Petition Exhibit 1001:
`
`U.S. Patent No. 6,197,696 to Aoi et al.
`
`Petition Exhibit 1002:
`
`Expert Declaration of Dr. Bruce W. Smith, Ph.D.
`
`Petition Exhibit 1003:
`
`U.S. Patent No. 3,617,824 to Shinoda et al.
`
`Petition Exhibit 1004:
`
`U.S. Patent No. 3,838,442 to Humphreys.
`
`Petition Exhibit 1005:
`
`U.S. Patent No. 6,140,226 to Grill et al.
`
`Petition Exhibit 1006:
`
`U.S. Patent No. 5,635,423 to Huang et al.
`
`Petition Exhibit 1007:
`
`U.S. Patent No. 5,741,626 to Jain et al.
`
`Petition Exhibit 1008:
`
`Petition Exhibit 1009:
`
`C. Akrout et al., “A 480-MHz Microprocessor in a 0.12µm Leff
`CMOS Technology with Copper Interconnects,” IEEE J. of Solid-
`State Circuits, Vol. 33, no. 11 (November 1998).
`
`J.N. Burghartz et al., “Monolithic Spiral Inductors Fabricated Using
`a VLSI Cu-Damascene Interconnect Technology and Low-Loss
`Substrates,” International Electron Devices Meeting (December
`1996).
`
`Petition Exhibit 1010:
`
`U.S. Patent No. 6,100,184 to Zhao et al.
`
`Petition Exhibit 1011:
`
`U.S. Patent No. 6,103,616 to Yu et al.
`
`Petition Exhibit 1012:
`
`File History of U.S. Patent No. 6,197,696 to Aoi et al.
`
`Petition Exhibit 1013:
`
`Japanese Patent Application No. 10-079371 to Aoi.
`
`Petition Exhibit 1014:
`
`Certified Translation of Japanese Patent Application No. 10-079371
`to Aoi.
`
`Petition Exhibit 1015:
`
`Japanese Patent Application No. 11-075519 to Aoi.
`
`Petition Exhibit 1016:
`
`Certified Translation of Japanese Patent Application No. 11-075519
`to Aoi.
`
`Petition Exhibit 1017:
`
`U.S. Provisional Patent Application No. 60/071,628.
`
`Petition Exhibit 1018:
`
`U.S. Patent No. 5,592,024 to Aoyama et al.
`
`Petition Exhibit 1019:
`
`U.S. Patent No. 5,920,790 to Wetzel et al.
`
`
`
`
`
`
`vi
`
`
`
`
`
`

`

`
`
`I.
`
`
`
`Preliminary Statement
`
`U.S. Patent No. 6,197,696 (Ex. 1001) is directed to methods for forming integrated
`
`circuit “interconnects,” which link components in a microchip. In particular, the ’696 patent is
`
`directed to common “dual damascene” processes for forming interconnects.
`
`Supported by the Expert Declaration of Bruce Smith, Ph.D., (Ex. 1002), this Petition
`
`establishes that challenged claims 10–12 are unpatentable. Rather than defining novel or
`
`nonobvious subject matter, the challenged claims recite well-known processes for making well-
`
`known structures. Petitioner respectfully requests inter partes review under 35 U.S.C. §§311–
`
`319 and 37 C.F.R. §42.100 et seq., and cancellation of the challenged claims.
`
`II.
`
`
`
`Technological Background
`
`A.
`
`Integrated Circuits and Interconnections
`
`Integrated circuits contain millions of discrete semiconductor devices electrically
`
`connected by “interconnections,” or “interconnects,” to form circuits. Shinoda (Ex. 1003),
`
`which dates to 1965, provides an early example. (Ex. 1003, 4:30–73, Figs. 6, 7 (below with
`
`highlights and annotations).)
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`
`
`Interconnects typically have “via” portions extending between the planes of adjacent
`
`layers to provide electrical connections between those layers. (Ex. 1002, ¶33.) Interconnects also
`
`typically have “trench” patterns, which act as wires to define circuits by linking the vias
`
`appropriately. These interconnect schemes were common years before the application for the
`
`’696 patent was filed. (See, e.g., Ex. 1004, Abstract, 1:54–2:6, 8:19–54, Figs. 6, 6A (below with
`
`highlights), 7, 7A.)
`
`Multiple levels of interconnects are typical. (Ex. 1002, ¶34.) Examples of this type of
`
`wiring scheme, which was also common years before the time the application for the ’696 patent
`
`was filed, appear below. (Ex. 1008, 1–4, Fig. 2; Ex. 1009, 1–2, Fig. 2; Ex. 1002, ¶34.)
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`In a dual damascene process, via and trench structures are formed during the same
`
`process. (See Ex. 1009, 1; Ex. 1002, ¶35.) Via and trench patterns are etched into insulating
`
`material, then filled with metal and polished flat. (Ex. 1002, ¶35.) Dual damascene processes
`
`result in the typical via- trench interconnect structure described above. (Ex. 1005, 1:45–48,
`
`3:33-36; Ex. 1006, Abstract, 2:61–3:2, 3:54–57; Ex. 1007, 2:15–20.) Examples appear below
`
`with annotations. (Ex. 1005, Fig. 1L; Ex. 1006, Figs. 6(c), 9; Ex. 1007, Fig. 5.)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`
`
`B.
`
`Semiconductor Etching and Photolithography
`
`Two processing technologies that can create patterns in a semiconductor wafer are
`
`photolithography and etching. In photolithography, a chemical called photoresist coats the
`
`surface of the semiconductor wafer. (Ex. 1002, ¶37.) Photoresist changes its molecular structure
`
`when illuminated under certain conditions. (Id.) A photomask, which is transparent in some
`
`regions and opaque in others, contains a pattern that can be transferred to the photoresist.
`
`(Id., 138.) After the photomask is aligned to the coated wafer, the photoresist is illuminated
`
`through the photomask. (Id.) The exposed photoresist is altered by the light, and any photoresist
`
`not part of the pattern can be removed with a chemical “developer.” (Id., 139.)
`
`The processed wafer retains the patterned photoresist layer, which can pattern material
`
`underneath. (Id.) Schematic representations of photolithography appear below. (Id., 140.)
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`
`
`A patterned photoresist layer can serve as a mask during an “etch” process. In etching,
`
`the surface of the processed wafer (semiconductor substrate and/or overlying layers) is exposed
`
`to corrosive chemicals to remove certain portions. (Id., 142.) After etching, the photoresist may
`
`be “stripped” (removed) by another chemical treatment. (Id., 143.) In some cases, the etching
`
`process itself may even remove the photoresist. A representation of photolithography and
`
`etching appears below.
`
`(Id.)
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`An etch that attacks all exposed materials is called a non-selective etch, whereas an etch
`
`that attacks certain material compositions more than others is called a selective etch. (Id., ¶44.)
`
`An etch that attacks a material in all directions is called isotropic, whereas an etch that attacks in
`
`a preferred direction (often perpendicular to the surface of the wafer) is called anisotropic.
`
`(Id., ¶45.) An etch that uses a liquid etching agent is a “wet” etch, whereas an etch that does not
`
`use a liquid etching agent (typically using an ionized gas, called a “plasma”) is a “dry” etch.
`
`(Id., ¶46.) Dual damascene processes typically use selective, anisotropic, dry etching. (Id., ¶47;
`
`see also, e.g., Ex. 1006, 2:61–63; Ex. 1010, 2:44–48; Ex. 1011, 4:9–12.)
`
` The ’696 Patent
`III.
`
`A.
`
`Description of the Challenged Claims
`
`This Petition challenges the patentability of claims 10–12 of the ’696 patent. Independent claim
`
`10 recites “[a] method for forming an interconnection structure,” and claims 11 and 12 depend
`
`from claim 10. (Ex. 1001, 34:1–57.) As illustrated below, claim 10 reads on several
`
`embodiments of the ’696 patent. (Ex. 1002, ¶¶48–127; see also Ex. 1001, 22:47–29:60, Figs.
`
`21(a)–37(b).) The declaration of Dr. Smith also describes the challenged claims and the
`
`embodiments of the ’696 patent. (See Ex. 1002, ¶¶48–139.)
`
`1.
`
`step a) of Claim 10
`
`Step a) of claim 10 recites “forming a first insulating film [503, 602] over lower-level
`
`metal interconnects [501, 601].”
`
`In the fifth embodiment the claimed first insulating film is “first organic film 503[/553],”
`
`located over first metal interconnects 501 [or 551]. (Ex. 1001, 22:52–60, 24:60–25:1, Figs. 21(a),
`
`24(a); Ex. 1002, ¶¶51–52.) In the sixth embodiment the claimed first insulating film is “silicon
`
`nitride film 602[/652],” located over first metal interconnects 601 [or 651]. (Ex. 1001, 28:1–9,
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`30:1–11, Figs. 30(a), 33(a); Ex. 1002, ¶¶53–54.) Examples of step a) from the fifth and sixth
`
`embodiments of the ’696 patent are shown below with highlights. (Ex. 1001, 22:52–23:24, 28:1–
`
`36, Figs. 21(a), 30(a); Ex. 1002, ¶¶50–55.)
`
`2.
`
`step b) of Claim 10
`
`Step b) of claim 10 recites “forming a second insulating film [504, 603], having a
`
`different composition than that of the first insulating film, over the first insulating film [503,
`
`
`
`602].”
`
`In the fifth embodiment the claimed second insulating film is “first silicon dioxide film
`
`504[/554],” with a composition that differs from the first insulating film (first organic film 503
`
`[or 553]). (Ex. 1001, 22:57–62, 24:65–25:3, Figs. 21(a), 24(a); Ex. 1002, ¶¶57–58.) In the sixth
`
`embodiment the claimed second insulating film is “first organic film 603[/653],” with a
`
`composition that differs from the first insulating film (silicon nitride film 602 [or 652]). (Ex.
`
`1001, 28: 1– 9, 30:1–9, Figs. 30(a), 33(a); Ex. 1002, ¶¶59–60.) Examples of step b) from the
`
`’696 patent are shown below with highlights. (Ex. 1001, 22:57–62, 28:1–36, Figs. 21(a), 30(a);
`
`Ex. 1002, ¶¶56–61.)
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`
`
`3.
`
`step c) of Claim 10
`
`Step c) of claim 10 recites “forming a third insulating film [505, 604], having a different
`
`composition than that of the second insulating film, over the second insulating film [504, 603].”
`
`In the fifth embodiment the claimed third insulating film is “second organic film
`
`505[/555],” with a composition that differs from the second insulating film (first silicon dioxide
`
`film 504 [or 554]). (Ex. 1001, 22:60–64, 25:1–6, Figs. 21(a), 24(a); Ex. 1002, ¶¶63–64.) In the
`
`sixth embodiment the claimed third insulating film is “silicon dioxide film 604[/654],” with a
`
`composition that differs from the second insulating film (first organic film 603 [or 653]). (Ex.
`
`1001, 28: 6–11, 30:6– 11, Figs. 30(a), 33(a); Ex. 1002, ¶¶65–66.) Examples of step c) from the
`
`’696 patent are shown below with highlights. (Ex. 1001, 22:60–64, 28:1–36, Figs. 21(a), 30(a);
`
`Ex. 1002, ¶¶62–67.)
`
`4.
`
`step d) of Claim 10
`
`Step d) of claim 10 recites “forming a fourth insulating film [506, 605], having a different
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`composition than that of the third insulating film, over the third insulating film [505, 604].”
`
`In the fifth embodiment the claimed fourth insulating film is “second silicon dioxide film
`
`506[/556],” with a composition that differs from the composition of the third insulating film
`
`(second organic film 505 [or 555]). (Ex. 1001, 22:62–67, 25:3–9, Figs. 21(a), 24(a); Ex. 1002,
`
`¶¶69–70.) In the sixth embodiment the claimed fourth insulating film is “second organic film
`
`605[/655],” with a composition that differs from the composition of the claimed third insulating
`
`film (silicon dioxide film 604 [or 654]). (Ex. 1001, 28: 9–14, 30:9–14, Figs. 30(a), 33(a); Ex.
`
`1002, ¶¶71–72.) Examples of step d) from the ’696 patent are shown below with highlights. (Ex.
`
`1001, 22:62–67, 28:1–36, Figs. 21(a), 30(a); Ex. 1002, ¶¶68–73.)
`
`5.
`
`step e) of Claim 10
`
`Step e) of claim 10 recites “forming a thin film [507, 606] over the fourth insulating film
`
`[506, 605].”
`
`In the fifth embodiment, “a titanium nitride film 507[/557] (thin film) is deposited to be
`
`50 nm thick.” (Ex. 1001, 23:1–3, 25:9–11, Figs. 21(a), 24(a); Ex. 1002, ¶¶75–76.) In the sixth
`
`embodiment, “a titanium nitride film 606[/656] (thin film) is deposited to be 50 nm thick.” (Ex.
`
`1001, 28:14–16, 30:14–16, Figs. 30(a), 33(a); Ex. 1002, ¶¶77–78.) Examples of step e) from the
`
`’696 patent are shown below with highlights. (Ex. 1001, 23:1–3, 28:1–36, Figs. 21(a), 30(a); Ex.
`
`1002, ¶¶74–79.)
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`
`
`6.
`
`step f) of Claim 10
`
`Step f) of claim 10 recites “forming a first resist pattern [508, 607] on the thin film [507,
`
`606], the first resist pattern having openings for forming wiring grooves.”
`
`In the fifth embodiment “a first resist pattern 508[/558], having openings for forming
`
`wiring grooves, is formed by lithography on the titanium nitride film 507[/557].” (Ex. 1001,
`
`23:25–27, 25:19–21, Figs. 21(b), 24(b); Ex. 1002, ¶¶81–82.) In the sixth embodiment “a first
`
`resist pattern 607[/657], having openings for forming wiring grooves, is formed by lithography
`
`on the titanium nitride film 606[/656].” (Ex. 1001, 28:37–39, 30:37–39, Figs. 30(b), 33(b); Ex.
`
`1002, ¶¶82–83.) Examples of step f) from the ’696 patent are shown below with highlights. (Id.,
`
`23:25–27, 28:37–43, Figs. 21(b), 30(b); Ex. 1002, ¶¶80–85.)
`
`7.
`
`step g) of Claim 10
`
`Step g) of claim 10 recites “etching the thin film [507, 606] using the first resist pattern
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`[508, 607] as a mask, thereby forming a mask pattern [509, 608] out of the thin film to have the
`
`openings for forming wiring grooves.”
`
`In the fifth embodiment “the titanium nitride film 507[/557] is dry-etched using the first
`
`resist pattern 508[/558] as a mask, thereby forming a mask pattern 509[/559], having openings
`
`for forming wiring grooves, out of the titanium nitride film 507[/557].” (Ex. 1001, 23:27–32,
`
`25:21–25, Figs. 21(c), 24(c); ex. 1002, ¶¶87–88.) In the sixth embodiment “the titanium nitride
`
`film 606[/656] is dry-etched using the first resist pattern 607[/657] as a mask, thereby forming a
`
`mask pattern 608[/658], having openings for forming wiring grooves, out of the titanium nitride
`
`film 606[/656].” (Ex. 1001, 28:39–43, 30:39–43, Figs. 30(c), 33(c); Ex. 1002, ¶¶89–90.)
`
`Examples of step g) from the ’696 patent are shown below with highlights. (Ex. 1001, 23:27–32,
`
`28:37–43, Figs. 21(c), 30(c); Ex. 1002, ¶¶86–91.)
`
`
`
`8.
`
`step h) of Claim 10
`
`Step h) of claim 10 recites “removing the first resist pattern [508, 607] and then forming
`
`a second resist pattern [510, 609] on the fourth insulating film [506, 605] and the mask pattern
`
`[509, 608], the second resist pattern having openings for forming contact holes.”
`
`In the fifth embodiment, “the first resist pattern 508[/558] is removed.” (Ex. 1001,
`
`23:33-34, 25:26–27, Figs. 22(a), 25(a).) “Then, as shown in FIG. 22(b)[/FIG. 25(b)], a second
`
`resist pattern 510[/560], having openings for forming contact holes, is formed by lithography on
`
`
`
`
`
`
`
`
`
`

`

`
`
`the mask pattern 509[/559].” (Id., 23:40–42, 25:27–35, Figs. 22(b), 25(b); Ex. 1002, ¶¶93–94.)
`
`In the sixth embodiment, “the first resist pattern 607[/657] is removed.” (Ex. 1001, 28:44–46,
`
`30:44–46, Figs. 31(a), 34(a).) “Then, as shown in FIG. 31(b)[/FIG. 34(b)], a second resist pattern
`
`609[/659], having openings for forming contact holes, is formed by lithography on the mask
`
`pattern 608[/658].” (Id., 28:49–51, 30:49–57, Figs. 31(b), 34(b); Ex. 1002, ¶¶95–96.) Examples
`
`of step h) from the ’696 patent are shown below with highlights. (Ex. 1001, 23:33–42, 28:44–51,
`
`Figs. 22(a), 22(b), 31(a), 31(b); Ex. 1002, ¶¶92–97.)
`
`
`
`
`
`
`
`9.
`
`step i) of Claim 10
`
`Step i) of claim 10 recites “dry-etching the fourth insulating film [506, 605] using the
`
`second resist pattern [510, 609] and the mask pattern [509, 608] as a mask, thereby patterning the
`
`fourth insulating film [506, 605] to have the openings for forming contact holes.”
`
`In the fifth embodiment, “the second silicon dioxide film 506[/556] is dry-etched using
`
`the second resist pattern 510[/560] and the mask pattern 509[/559] as a mask, thereby forming a
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`patterned second silicon dioxide film 506A[/556A] having openings for forming contact holes.”
`
`(Ex. 1001, 23:42–46, 25:36–41, Figs. 22(c), 25(c); Ex. 1002, ¶¶99–100.) In the sixth
`
`embodiment, “the second organic film 605[/655] is dry-etched using the second resist pattern
`
`609[/659] and the mask pattern 608[/658] as a mask, thereby forming a patterned second organic
`
`film 605A[/655A] having openings for forming contact holes.” (Ex. 1001, 28:51–55, 30:58–62,
`
`Figs. 31(c), 34(c); Ex. 1002, ¶¶101–02.) Examples of step i) from the ’696 patent are shown
`
`below with highlights. (Ex. 1001, 23:42–46, 28:51–55, Figs. 22(c), 31(c); Ex. 1002, ¶¶98–103.)
`
`10.
`
`step i) of Claim 10
`
`Step j) of claim 10 recites “dry-etching the third insulating film [505, 604] using the
`
`patterned fourth insulating film [506A, 605A] as a mask, thereby patterning the third insulating
`
`film [505A, 604A] to have the openings for forming contact holes.”
`
`In the fifth embodiment, “the second organic film 505[/555] is dry-etched using the
`
`patterned second silicon dioxide film 506A[/556A] as a mask, thereby forming a patterned
`
`second organic film 505A[/555A] having openings for forming contact holes.” (Ex. 1001, 23:47–
`
`51, 25:66–26:3, Figs. 23(a), 26(a); Ex. 1002, ¶¶105–06.) In the sixth embodiment, “the silicon
`
`dioxide film 604[/654] is dry-etched using the patterned second organic film 605A[/655A] as a
`
`mask, thereby forming a patterned silicon dioxide film 604A[/654A] having openings for
`
`
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`forming contact holes.” (Ex. 1001, 29:1–5, 31:7–11, Figs. 32(a), 35(a); Ex. 1002, ¶¶107–08.)
`
`Examples of step j) from the ’696 patent are shown below with highlights. (Ex. 1001, 23:47–51,
`
`29:1–5, Figs. 23(a), 32(a); Ex. 1002, ¶¶104–09.)
`
`
`
`11.
`
`step i) of Claim 10
`
`Step k) of claim 10 recites “dry-etching the patterned fourth insulating film [506A, 605A]
`
`and the second insulating film [504, 603] using the mask pattern [608] and the patterned third
`
`insulating film [505A, 604A] as respective masks, thereby forming wiring grooves [511, 610] in
`
`the patterned fourth insulating film and patterning the second insulating film to have the
`
`openings for forming contact holes [512, 611].”
`
`In the fifth embodiment, “the patterned second silicon dioxide film 506A[/556A] and the
`
`first silicon dioxide film 504[/554] are dry-etched using the mask pattern 509[/559] and the
`
`patterned second organic film 505A[/555A] as respective masks, thereby forming a patterned
`
`second silicon dioxide film 506B[/556B] having [openings for forming] wiring grooves and a
`
`patterned first silicon dioxide film 504A[/554A] having openings for forming contact holes as
`
`shown in FIG. 23(b)[/FIGS. 26(b) and 28(b)].” (Ex. 1001, 23:66–24:6, 26:15–22, Figs. 23(b),
`
`26(b), 28(b); Ex. 1002, ¶¶111–12.) In the sixth embodiment, “the patterned second organic film
`
`605A[/655A] and the first organic film 603[/653] are dry-etched using the mask pattern
`
`608[/658] and the patterned silicon dioxide film 604A[/654A] as respective masks, thereby
`
`
`
`
`
`
`
`
`
`
`

`

`
`
`forming a patterned second organic film 605B[/655B] having wiring grooves 610[/660] and a
`
`patterned first organic film 603A[/653A] having contact holes 611[/661].” (Ex. 1001, 29:6–12,
`
`31:12–18, Figs. 32(b), 35(b); Ex. 1002, ¶¶113–14.) Examples of step k) from the ’696 patent are
`
`shown below with highlights. (Ex. 1001, 23:66–24:6, 29:6–12, Figs. 23(b), 32(b); Ex. 1002,
`
`¶¶110–15.)
`
`
`
`12.
`
`step l) of Claim 10
`
`Step l) of claim 10 recites “dry-etching the patterned third insulating film [505A, 604A]
`
`and the first insulating film [503, 602] using the mask pattern [509, 608] and the patterned
`
`second insulating film [504A, 603A] as respective masks, thereby forming wiring grooves and
`
`contact holes in the patterned third insulating film and the first insulating film, respectively.”
`
`In the fifth embodiment, “the patterned second organic film 505A[/555A] and the first
`
`organic film 503[/553] are dry-etched using the mask pattern 509[/559] and the patterned first
`
`silicon dioxide film 504A[/554A] as respective masks, thereby forming a patterned second organic
`
`film 505B[/555B] having wiring grooves 511[/561] and a patterned first organic film 503A[/553A]
`
`having contact holes 512[/562].” (Ex. 1001, 24:7–13, 26:22–29, Figs. 23(c), 26(c), 29(a); Ex. 1002,
`
`¶¶117–18.) In the sixth emb