United States Patent 19
`Mangoldet al.
`
`[11] Patent Number:
`[45] Date of Patent:
`
`4,972,487
`Nov. 20, 1990
`
`54] AUDITORY PROSTHESIS WITH
`
`OTHER PUBLICATIONS
`bal DAT.TToeGiRGCAP.ee
`Cumminset al., “Ambulatory Testing of Digital Hear-
`.
`:
`.
`ing Aid Algorithms”, Resna 10th Annual Conference,
`[75]
`Inventors: ae Et— ae Rolf
`San Jose, Calif, 1987, pp. 398-400.
`CeaB Aungoacka,
`pot
`o
`M-D-D-I Reports, Jun. 8, 1987, p. 12.
`en
`Karlsson et al., “Remote Controld Programmable
`[73] Assignee: Diphon Development AB, Molandal,
`Hearing Aid”,
`(Abstract) Diploma Thesis Project,
`Sweden
`Chalmers University of Technology, 1987.
`.
`World Office 83/03701, Oct. 1983, “Speech Simulation
`[21] Appl. No.: 353,220
`System and Method”, DuBrucg.
`[22] Filed:
`May16, 1989
`Primary Examiner—Jin F. Ng
`.
`Assistant Examiner—M. Nelson McGeary, II
`Related U.S. Application Data
`Attorney, Agent, or Firm—Fliesler, Dubb, Meyer &
`Continuation of Ser. No. 175,233, Mar. 30, 1988, aban.
`Lovejoy
`doned.
`ABSTRACT
`~—[57]
`Tmt. CUS vaccsesscsecssseccsssessaseesansecesseenes HO4R 25/00
`[SE]
`An auditory prosthesis is provided with datalogging
`[52] US. CL. veeesesseseesesseeteceseerenerses 381/68; 381/68.2;
`capability whereby the use of a plurality of settings as
`.
`381/68.4; 381/60
`selected by the useris maintained. The recorded datalog
`[58] Field of Search 0.0... 381/68, 68.2, 68.3,
`can be periodically read and used for revising a pros-
`381/68.4, 60; 73/585; 128/420.6
`thetic prescription by altering the settings and used as a
`References Cited
`means of refining initial prescriptions of other patients
`whose audiometric characteristics are similar to those
`U.S. PATENT DOCUMENTS
`of the user. In one embodiment for a programmable
`4,099,035
`7/1978 Vanick .....c..escesecssecseneesses 381/68.2
`auditory prosthesis the datalogging information in-
`4,187,413
`2/1980 Moser ...cecscessssssessesseessesseenss 381/68
`
`cludes the number of times control programs are
`4,357,497 11/1982 Hochmair et al.
`0... 381/46
`
`changed, the number of times a given control program
`4,419,995 12/1983 Hochmair etal. ...
`« 120/420.6
`
`
`is selected, and thetotal time duration for which a given
`4,425,481
`1/1984 Mansgold et al.
`+» 381/68.2
`rogram is selected Ac
`rdin |
`th
`oc ssin
`of
`4,471,171
`9/1984 Kopke Aeeeessenseane:
`ese 381/68.2
`PFO’
`5
`s
`UACCOLCINE IY:
`HAG! PIOSSSSINE
`4,731,850
`3/1988 Levitt et al.
`.
`. 381/68,2
`
`signals by a signal processor can be tuned to fit the
`4.768.165
`8/1988 Hobn
`381/682
`needs of an individual user. The prosthesis can have a
`ees .
`,
`remote control unit, and a datalog memory can be pro-
`FOREIGN PATENT DOCUMENTS
`Vided in the remote control unit along with a program-
`241101 10/1987 European Pat. Off. «2... 381/68
`
`3642828 8/1987 Fed. Rep. of Germany........ 381/68|mable memory which stores the control programs.
`61-234700 10/1986 Japan seosesssssncssessscsteusesnssee 381/68
`
`6/1987 United Kingdom oss 381/68
`2184629
`
`[63]
`
`[56]
`
`20 Claims, 12 Drawing Sheets
`
`22
`
`20
`
`8
`
`RECEIVER
`PROGRAMMABLE
`DECODER
`
`
`
`MANUAL
`PROGRAMMABLE
`PROGRAM
`
`MEMORY WITH LOGIC
`
`
`CONTROL
`AND DATALOGGING
`
`
`
`
`
`
`MICROPHONE
`
`
`
`SLAVE MEMORY
`
`SIGNAL PROCESSOR
`
`SPEAKER
`
`HIMPP 1007
`
`HIMPP 1007
`
`

`

`
`
`US. Patent—Nov. 20, 1990 Sheet 1of12 4,972,487
`
`
`
`Is
`
`
`
`
`
`PROGRAMMABLE
`MANUAL
`MEMORY
`PROGRAM
`
`
`
`
`WITH LOGIC
`CONTROL
`
`
`
`SLAVE MEMORY |
`
`
`SIGNAL PROCESSOR
`
`MICROPHONE
`
`SPEAKER
`
`
`
`(PRIOR ART)
`FIG—|
`
`26
`
`20
`
`8
`
`RECEIVER
`
`
`
`
`PROGRAMMABLE
`MANUAL
`
`
`PROGRAMMABLE
`PROGRAM
`MEMORYWITH LOGIC
`
`DECODER
`
`
`AND DATALOGGING
`CONTROL
`
`
`
`
`
`
`SLAVE MEMORY
`
`SIGNAL PROCESSOR
`
`SPEAKER
`
`FIG—2
`
`

`

`
`
`US. Patent—Nov. 20, 1990 Sheet 20f12 4,972,487
`
`
`
`24
`26
`32
`
`
`PROGRAMMABLE MANUAL |
`
`
`
`
`
`APS
`MICROPHONE
`PROGRAM
`
`
`WITH LOGIC
`CONTROL
`
`
`
`TRANSMITTER
`
`
`PROGRAMMABLE
`CODER
`
`|
`
`SPEAKER
`
`
`
`FIG-——3
`
`22
`
`2
`
`RECEIVER
`
` SLAVE MEMORY
`PPOGRAMMABLE
`
`LOGIC
`WITH
`
`
`DECODER
`
`
`
`SIGNAL PROCESSOR MICROPHONE
`
`
`
`SPEAKER
`
`
`
`
`
`FIG—-4
`
`

`

`US. Patent
`
`Nov. 20, 1990
`
`Sheet 30f12
`
`4,972,487
`
`32
`
`26
`
`24
`
`
`
`
`PROGRAMMABLE
`MANUAL
`
`
` MICROPHONE
`PROGRAM
`MEMORY WITH LOGIC
`|
`
`DATALOGGING APS
`CONTROL
`
`
`TRANSMITTER
`
`
`
`SPEAKER
`
`30
`
`
`
`PROGRAMMABLE
`
`CODER
`
`FIG—S5
`
`33
`
`
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`
`
`PROCESSOR
`
`
`
`39
`
`OUTPUT
`
`
`
`CONTROL
`
`
`
`DATA —
`
`
`OUTPUT
`
`SELECTION
`LOGGING
`
`
`
`
`
`29
`
`35
`
`37
`
`FIG—6
`
`

`

`_US.Patent
`
`Nov.20, 1990
`
`4,972,487
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`

`1
`
`4,972,487
`
`AUDITORY PROSTHESIS WITH DATALOGGING
`CAPABILITY
`
`This is a continuation of application Ser. No. 175,233
`filed Mar. 30, 1988, now abandoned.
`
`BACKGROUND OF THE INVENTION
`
`This invention relates generally to auditory prosthe-
`ses and more particularly the invention relates to audi-
`tory prostheses having datalogging capabilities.
`Auditory prostheses of various types are known and
`commercially available. Such prostheses include hear-
`ing aids, cochlear implants, implantable hearing aids,
`and vibrotactile devices. One such prosthesis is a pro-
`grammable hearing aid; see for example U.S. Pat. No.
`4,425,481. Such devices have programmable memories
`for controlling a signal processor for different process-
`ing of audio signals. In the specific patent referred to,
`the user can select one of several programs stored in
`memory for processing the signals by a manually-
`operated program control.
`The conventional programmable hearing aid has a
`wide variety of signal-processing capabilities involving
`signal amplification, automatic gain control, filtering,
`noise suppression and other characteristics. Thus, a
`major problemlies in selecting the specific values orset
`of values of parameters to control the hearing aid for
`optimum use by each user. While one user might require
`a wide range of signal processing, another user will
`better utilize different programs in a morelimited range
`of signal processing. Other conventional hearing aids,
`while not programmable, are user-adjustable and have
`similar range adjustment limitations.
`SUMMARYOF THE INVENTION
`
`Briefly, in accordance with a preferred embodiment
`ofthe invention, a datalogging capability is provided in
`a memory locatedin or associated with a programmable
`or manually adjustable auditory prosthesis. The mem-
`ory permits recording or logging a history of certain
`user-selected events, such as changesin settings, param-
`eters, or algorithms, numberof times a givensetting is
`selected, and duration for which a given setting is se-
`lected. In addition, the memory may permit recording
`of environmentally selected events, such as selection of
`settings, parameters, or algorithms, where such selec-
`tion is based on an automatic computation in response to
`the current sound environmentof the wearer. In a pre-
`ferred embodiment,
`the method of determining the
`values for each of the data logs entails counting time in
`large segments, of the order of two minutes (128 sec-
`onds). Duration of use of each setting is then stored in
`units of two minutes. In a preferred embodiment, indi-
`vidual program settings are not recorded until after a
`given time period for each setting, thereby obviating
`the recording of many settings when the useris explor-
`ing settings for a desired response.
`The control unit can be integral with the processing
`unit of the hearing aid or external to and coupled with
`the processing unit. However, in a preferred embodi-
`ment of a programmable hearing aid the control unit is
`remote from the hearing aid processing unit and has a
`transmitter. (e.g. acoustical, electro-magnetic or infra-
`red) for transmitting control signals to the processing
`unit, The datalog memorycan be in the ear portion of"
`the hearing aid or in the control unit. By using a remote
`control unit with the datalog memorytherein, the ear
`
`25
`
`35
`
`40
`
`45
`
`50
`
`60
`
`2
`portion can be smaller, lighter in weight, and less visi-
`ble.
`When the user returns the hearing aid to the dis-
`penser, it may be reprogrammedor readjusted as appro-
`priate in view ofthe data log information. The dispenser
`will utilize an appropriate connection to the hearing aid
`to read out the data stored in the data log memory.
`Based on this information, a new set of operating pa-
`rameters can be programmedfor the user. The selection
`of new programsis based upon interpreting the degree
`of use of the original programs by the user.
`For example, consider a strategy of initial program-
`ming in which the memories fall on a continuum includ-
`ing progressive amounts of volume, noise suppression,
`and intelligibility enhancement.If all programsare used
`equally, then the programming can be considered suit-
`able. However,if all programs are used but the signal-
`processing strategies at the ends of the programmed
`range are utilized more than those in the middle ranges,
`the range of parameters covered should be expanded.
`On the other hand, if the programsin the middle range
`of signal processing are primarily used, the range of
`programs should be contracted to provide a finer de-
`gree of selection among those settings which the user
`finds most helpful. It will be appreciated that other
`reprogramming strategies are possible, especially with
`other initial programmingstrategies.
`By the word “programs” throughout this document
`is intended one or moreof: specific settings of a limited
`number of parameters; selection of a processing config-
`uration of strategy; modification of a prosthesis control
`program;or setting of coefficients in a prosthesis pro-
`gram.
`The invention and other objects and features thereof
`will be more readily apparent from the following
`detailed description and appended claims when taken
`with the drawing.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG.1 is a functional block diagram of a programma-
`ble auditory prosthesis in accordance with the priorart.
`FIG.2 is a functional block diagram of a remote-con-
`trolled programmable auditory prosthesis including
`datalogging function in accordance with one embodi-
`mentof the invention.
`FIG. 3 is a functional block diagram of a, remote
`control unit for use with the auditory prosthesis of FIG.
`2.
`
`FIG.4 is a functional block diagram of a remote-con-
`trolled programmable auditory prosthesis in accor-
`dance with another embodimentof the invention.
`FIG. 5 is a functional block diagram of a remote
`control unit including the datalogging function for use
`the auditory, prosthesis of FIG. 4.
`FIG. 6 is a functional block diagram of a manually
`adjustable, non-programmed auditory prosthesis in ac-
`cordance with another embodimentof the invention.
`FIGS. 7A, 7B and FIG. 7C are a more detailed func-
`tional block diagram of the programmable auditory
`prosthesis of FIG.2.
`FIGS. 8—13 are functional block diagramsillustrat-
`ing the functioning of the datalogging in the auditory
`prosthesis.
`DETAILED DESCRIPTION OF ILLUSTRATIVE
`EMBODIMENT
`
`FIG. 1 is a functional block diagram of a multiple-
`memory programmable hearing aid, shown generally at
`
`

`

`4,972,487
`
`3
`Z, such as described in U.S. Pat. No. 4,425,481 which is
`hereby incorporated by reference. The hearing aid 2
`includes a microphone 10 for picking up sound and
`converting it to an electrical signal, a signal processor
`and associated slave memory 12 for operating on the
`electrical signal generated by microphone10 in accor-
`dance with oneof a plurality of signal-processing pro-
`grams, and a speaker 14 for audibly transmitting the
`processed signals. Other signal inputs can be provided
`such as a tele-coil. A programmable memory with logic
`16 stores a plurality of programs for controlling the
`signal processor 12 in operating on signals from micro-
`phone 10. A manual program control switch 18 is pro-
`vided for the user of the device to select from among
`the several programming options stored in memory 16.
`As noted above,
`the conventional programmable
`hearing aid has a wide variety ofsignal-processing capa-
`bilities including signal amplification, automatic gain
`control, filtering, and noise suppression. Thus, a major
`problem lies in optimizing the programmingof the hear-
`ing aid for use by each individual user.
`FIG.2 is a functional block diagram of a programma-
`ble hearing aid shown generally at 4 and including data-
`logging capability in accordance with one embodiment
`of the invention. Again, the hearing aid includes a mi-
`crophone 10, a signal processor with slave memory 12,
`and a speaker 14. However, in accordance with the
`invention, the programmable memory with logic fur-
`ther includes datalogging capability as shown at 20. A
`programmable decoder 22 is connected to the program-
`mable memory 20. The decoder responds to a coded
`digital control signal received by the microphone 10
`and transmitted from a speaker in the remote control
`unit to be described in FIG. 3. The carrier frequency of
`this control signal is in the upper part of the microphone
`bandwidth and will not be heard by the hearing-aid
`user.
`
`FIG.3 is a functional block diagram of the remote
`control unit 6 which can be placed in the user’s pocket
`or on his wrist, for example. The remote control unit 6
`is equipped with a manual program control 24 and a
`logic block 26 to interface with a transmitter and coder
`28. The encoder as well as the decoderin the auditory
`prosthesis are programmed for the same ID number
`contained in the control signal so as not to affect other
`* similar auditory prosthesis. The transmitter is con-
`nected to speaker 30 for transmitting the coded instruc-
`tions to the hearing aid, cochlear implant, or implanted
`hearing aid of FIGS. 2, 3 or 4. An automatic program
`selector (APS) can be provided to automatically select
`a program in response to the ambient noise level as
`detected by microphone 32. In one embodiment the
`APSwill step through the programsin the programma-
`ble block 26, and it will stop in a program where the
`environmental sound level has been amplified above a
`certain predetermined (and manually adjustable) level.
`This program number is then transmitted to the head-
`worn programmable prosthesis where the same pro-
`gram is entered.
`In another embodiment, the level and spectrum of the
`sound measured at the microphone32is used in a calcu-
`lation to determine specific values of each of the param-
`eters constituting a program, and these parameters are
`then loaded via coder 28 and speaker 30 to the prosthe-
`sis across the transmitting medium (acoustic, infra-red,
`electromagnetic, etc.).
`In accordance with a preferred embodiment of the
`invention, the datalogging means records orlogs a the
`
`4
`history of the numberof times that settings change, the
`number of times a given setting is selected, and the
`duration for which a given setting is selected. A practi-
`cal method for determining the values for each of the
`quantities is to count time in large segments, on the
`order of two minutes (128 seconds). Thus the durationis
`stored in units of two minutes. Additionally, settings are
`not recorded until after a given time segment for any
`given segment,
`thus obviating recording of settings
`whenthe settings are merely being explored bythe user.
`FIG. 4 and FIG.5 are functional block diagrams of a
`hearing aid 8 and remote control unit 9, respectively,in
`accordance with an alternative embodiment ofthe in-
`vention. This embodimentis similar to the embodiment
`of FIG. 2 and FIG.3, and like elements have the same
`reference numerals. The major difference in the two
`embodimentsis the removal of the programmable mem-
`ory with logic and datalogging unit 20 from the hearing
`aid of FIG.2, and placing the functionsof unit 20 in the
`programmable APS with logic unit 26 in the remote
`control unit 9 of FIG. 5. Relieving the hearing aid unit
`of the datalogging function reduces the size and weight
`of the hearing aid. Further, a more advanced program-
`mable memory and datalogging can be implemented in
`the remote control unit with its larger size and greater
`battery power.
`While the invention has been described with refer-
`ence to remote-controlled, programmable hearing aids
`in the embodiments of FIGS. 2-5, the invention can be
`implemented in
`a manually adjustable, non-pro-
`grammed hearing aid or in a cochlear implantas illus-
`trated generally in FIG. 6. In this embodiment,
`the
`manually-operated control selection 29 is connected by
`wires 31 to the signal processor 33. The datalogging
`unit 35 monitors the control selection and includes
`memory means for recording the extent of use of the
`plurality of selections. Unit 35 is periodically read from
`the output 37. The output 39 can be an acoustic speaker
`or a cochlear implant such as disclosed in U.S. Pat. No.
`4,357,497 or U.S. Pat. No. 4,419,995,
`incorporated
`herein by reference. Finally, the invention can also be
`used in a prosthesis in which the mode or mannerof
`operation is switched automatically. In this case,
`the
`datalogging information is employed to monitor the
`suitability of the decision algorithm used to effect the
`automatic switching or adjustment.
`It should be understood that “programs” within this
`discussion refers to one or moreof:specific settings of a
`limited number of parameters; selection of a prosthetic
`configuration or processing strategy in a prosthesis
`whichis designed so that multiple modes of processing
`may beselected; selection of a particular algorithm or
`form of an algorithm microprocessor or set of micro-
`processor instructions; or modification of the constants
`or coefficients of a microprocessor-controlled set of
`instructions, such as changes in the numberand value of
`filter coefficients in a digitally controlled or imple-
`mented filter (e.g. FIR or IIR filter).
`FIGS. 7A, 7B and 7C are a moredetailed functional
`block diagram of the programmable hearing aid 4 with
`datalogging, as shown in FIG. 2. This embodiment has
`been built in two integrated circuits illustrated generally
`at 36 and 38 with circuit terminals denoted by square
`symbols. Integrated circuit 36 (FIG. 7A) comprises a
`memory 42 which transfers portionsof its stored infor-
`mation to the slave memory 82 in the analog signal
`processor in FIG.7B via lines 41. Integrated circuit 36
`includes an analog block 40 containing a voltage dou-
`
`m 0
`
`20
`
`25
`
`35
`
`40
`
`45
`
`60
`
`65
`
`

`

`.
`5
`bler (charge pump) and an oscillator controlled by an
`external crystal at 32,768 Hz. When the device is turned
`on, the minuspole of the supply battery is connected to
`ground and theoscillator starts with the help of a back-
`up battery. The oscillator starts the voltage doubler
`which generates negative voltage VSS with the voltage
`doubler and a buffer capacitor. When the device is
`turned off, a voltage level detectoris activated and the
`back-up is connected again to secure the data in the
`RAM.
`RAM 42 consists of a total of 896 bits organized in
`1128 bits. The 112 groups of bits for each listening
`situation are divided into 64 bits for slave memory, 4
`bits of tele-coil control, and 24 bits for datalogging.
`A serial channel block 44 is utilized to program and-
`/or read the RAM area by an external programming
`unit. The data can be written to or read from the hear-
`ing aid via serial line connection 111. Timing block 46
`keeps track of timing for the different blocks and trans-
`fers data and generates clock pulses to the slave mem-
`ory. The input.and test block 48 controls the activities
`of the external switches and the powerreset pulse from
`the analog block.
`The datalogging block 50 provides logic for RAM 42
`which includes two datalog registers of 12 bits each for
`each program setting. Thefirst register is incremented
`whenevera listening situation has been used for more
`than two minutes. The second register is incremented
`each fourth minute as long as the listening situationis
`used. A separate register of 24 bits is incremented when-
`ever a switch 90 has been actuated.
`Thesignal processor 38 in FIG. 7B includes a micro-
`phoneinput 52, a tele-coil input 54 and an audio input
`56. The tele-coil and microphone inputs are passed
`through preamplifiers 58 and 60 and digitally controlled
`attenuators 59 and 61, respectively, and, together with
`the audio inputsignal, are summed in SUM unit 62. The
`output from unit 62 is passed via line 63 to a filter 64
`(FIG. 7C) which splits the signal into a low-pass signal
`and a high-pass signal. The crossover frequency be-
`tween the low- and high-pass channels can be varied
`digitally from 500 Hz to 4 KHz.
`The circuits for the low-pass filter 65 and high-pass
`filter 67 are identical and consist of automatic-gain-con-
`trolled amplifiers. The release time of the AGC can be
`controlled to effect soft clipping (i.e., zero release time),
`short, normal and long release times.
`The low- and high-pass channel signals are summed
`together at 66 via digital attenuators 68 and 70.
`An output amplifier 72 is provided for receiving the
`summed outputat 66 and driving a transducer 74. Alter-
`natively, an external output amplifier can be used to
`perform the driving function.
`The digital portion of the chip 38 includes logic 80
`and slave memory 82 (FIG. 7B). The slave memory 82
`is a 55-bit non-resettable shift register, where data is
`shifted into the register in series by each positive clock-
`transition. The information in the slave memory con-
`trols the various functions in the analog circuits. A
`64-bit data word is loaded into the slave memory to-
`gether with 64 clock pulses.
`As above described, the datalogging logic performs
`three specific logic functions. First, the total number of
`times new data is sent to the device is logged. A total of
`24 bits is available in this register (16,777,215 events),
`This logging function is referred to herein as Data-Log
`Sum (DLS). The second function of the datalogging is
`to record the number of times a particular register is
`
`10
`
`— 5
`
`us 5
`
`40
`
`60
`
`4,972,487
`
`6
`used for more than 128 seconds (2.13 minutes). There
`are 12 bits in each ofthe 8 registers used for this type of
`logging (4095 events). This logging function is referred
`to herein as Data Log A (DLA). The third function
`records the amountof time each particular register has
`been active. Each time count equals 256 seconds (4.27
`minutes). Again, there are 12 bits in each of the 8 regis-
`ters (approximately 291 hours). This logging functionis
`referred to herein as Data Log B (DLB). The actual
`incrementing of registers is carried out in the data buffer
`portion of the RAM block.
`FIGS.8-13 are morespecific details for the circuitry
`in FIG. 7B for implementing the datalogging function.
`While this implementation is hard-wired, it will be ap-
`preciated that the functions of the circuitry can be im-
`plemented with a programmed microprocessor,
`for
`example. In FIG. 8,
`the datalogging record-keeping
`includes UP and DOWN buttons shown at 90 which
`cause the 8-bit counter 91 to count up and down,so that
`at any time, one and only oneof the 8 outputs BO-B7is
`active (high). When this output has changed to a new
`value and is stable, the DELTA (A) output generates a
`pulse, called Memory Select Load.
`Whenever Memory Select Load (MSL)is pulsed,this
`increments the DLS counter 92, which totals the num-
`ber of switching events. At this time also, the 22-stage
`divider 93 and the divide-by-2 flip-flop 94 are reset, so
`that their state is zero. The MSL pulsealso sets the RS
`flip-flop 95 which enables loading of the DLAregisters
`98.
`Once the dividers 93 and 94 are reset, the free-run-
`ning 32768 Hz crystal oscillator 96 causes the divider 93
`to begin counting up. When divider 93 has counted 222
`counts, its output goes high, being 128 secondsafter the
`MSLpulse occurred.
`The output of the 22-stage divider 93 gives a pulse
`which is ANDedat gate 97 with one of the selectively
`connected bits B0-B7 of up-down counter 91 and the Q
`output of RSflip-flop 95 set by MSL. This produces an
`increment to the DLA register 98. The change in the
`input to the DLA register is used to reset the RSflip-
`flop 95, so that only one increment to the DLAregister
`is accomplished per change of the 8-bit up/down
`counter, and due to the divider 93 this increment occurs
`only if the state of the counter has remained constant for
`over two minutes.
`When the output of the 22-stage divider 93 is divided
`by 2, in divide by 2 FF 94, the result is used to incre-
`ment the relevant DLBregister 99, every 256 seconds
`during which the associated bit BO0-B7 of up-down
`counter has been selected.
`In addition,all registers may be provided with an RS
`flip-flop (identified by a prime number), which is set
`whenever the relevant register overflows. In this way,
`data read out of the hearing aid can be interpreted even
`with use times exceeding 2562!2 sec.
`The hearing aid communicates to the outside world
`through a serial interface 100 shown in FIG. 9. This
`communication is managed by conventional
`logic,
`which detects appropriate instructions to load the hear-
`ing aid from the programmer, or to send information
`about the hearingaid setting or datalogging information
`back to the programmer. In addition, an access code is
`checked on the input from the programmerto ensure
`that changesin the hearing aid program cannot be made
`inadvertently.
`The data in the selected register 102 passes through a
`shift register 101. This enables the datalogging informa-
`
`

`

`7
`tion (DLS, DLA and DLBregisters), global program-
`ming information (e.g., number of active memories),
`and individual parameter registers 102 (for memories
`0-7) to be either read or written.
`When MSLpulse is generated, the contents of the
`appropriate parameter register 102 (selected by BO-B7)
`are loaded into a second shift register 103, and then
`these data are clocked serially into the slave memory 82
`of analog integrated circuit 38 (FIG. 7B).
`It will be appreciated that appropriate circuit modifi-
`cations may be madeto allow the functions of theshift
`registers and storage registers to be performed by the
`same circuit, but the operation is presented in FIG. 9 to
`clarify details of the communication between the logic
`and analog hearing-aid circuitry, such as shownin U.S.
`Pat. No. 4,425,481, supra. Though functionally the cir-
`cuit operates as discussed above, there can be one large
`RAM random access memory structure, and not dis-
`tinct data registers, and there can be a single 16-bit shift
`register which serves as the heart of communication to
`and from the digital control circuit.
`The internal RAM on the digital circuit 36 is ar-
`ranged into an XY matrix as shown in FIG.10. Select-
`ing a memory sets the Y value 0 through 7 in the RAM;
`specific functions, such as loading the memoryinto the
`analog circuit 38 or incrementing the datalogging regis-
`ters 92, 98 or 99 (FIG.8), select the X value (thatis, the
`particular 16-bit cell of the matrix) used in the current
`operation. The contents of the random access memory
`104 (FIG. 11) is held by continuous application of a
`backup voltage 125. When the hearing aid is not in
`active use, this is the only voltage which is maintained.
`When a regular 1.3 V hearing-aid battery 127 is in the
`hearing aid, backup voltage is derived via a voltage
`doubler 119 (required because of the characteristics of 35
`the integrated circuit processes used). If the usual 1.3 V
`battery 127 is removed, the internal 3.1 V lithium bat-
`tery 125 supplies the minimal current needed to keep
`the memory contents from changing.
`The RAM 104 is effectively partitioned for each
`memory into a 64-bit parameter field 105 and a 48-bit
`field 106 used for datalogging. The organization of the
`datalogging area is given more specifically in the RAM .
`layout diagram (FIG. 11).
`The heart of the logic functions to support the pro-
`grammable hearing aid is the 16-bit register 110 shown
`in FIG. 12, which serves as: a serial-in, parallel-out
`register for the incoming data; a parallel-in, serial-out
`register for programming the hearing aid or reading
`back the RAMto the host; and a parallel-out, parallel-in
`incrementing register for datalogging recording. The
`communications functions (host programming, hearing
`aid programming, and data read-back) are controlled by
`a serial interface upon receipt of the appropriate codes.
`
`-0
`
`25
`
`30
`
`40
`
`45
`
`55
`
`4,972,487
`
`8
`dress counter 112 and moves16 bits into the shift regis-
`ter 110, and begins clocking them out the serial line 111.
`This process continues until the contents of the whole
`memory 104 have been sent via the serial line 111.
`
`Operation for setting the analog circuit.
`When a new memory is selected, the Y register 113is
`changed to reflect the different memory selected. The
`X register 112 is set at zero, and an operation begins in
`which four successive 16-bit words are loaded into the
`shift register 110 and shifted out to the analog circuit 38
`via line 114. Thus, 64 bits of programming information
`are delivered to the analog chip 38.
`
`Operation for incrementing the dataloggingbits.
`The general concept of the operation is described in
`the basic structure shown in FIG. 13. Whenever the
`active memory is changed, manually or automatically,
`this: (1) generates an interrupt, and resets the 23-stage
`counter 93 and 94; (2) changes the address in the logic
`112 and 113; (3) fetches the value of DLSa; (4) incre-
`ments DLSa; (5) puts DLSa back in memory 104; (6) if
`step 4 overflowed (resulted in a count exceeding 12
`bits), repeat 3, 4 and 5 with DLSb; (7) set a latch to
`enable DLA and DLB to be incremented on future
`clock pulses. If, 128 seconds after the active memoryis
`changed, Memory Select Load has not been pulsed
`again, the positive-going transition from the output of
`the 23-stage counter 93 and 94 causes an increment
`cycle on DLA:(1) fetch DLA; (2) increment; and (3)
`return to memory. Subsequent positive-going cycles of
`the counter 93 and 94 output cause similar increments in
`DLB.
`(a)
`the counting implemented is as follows:
`Thus,
`DLSa (LSB) and DLSb (MSB)are incremented imme-
`diately upon each change from one memoryto another;
`(b) DLA is incremented onceafter the first 128 seconds
`in the same memory; and (c) DLBis incremented every
`256 secondsafter the incrementation of DLA.Notethat
`in this implementation meansthe first incrementation of
`DLB occurs 128+256 seconds after memories are
`changed. This structure is implemented by using the
`positive-going transition at
`the output of the 23-bit
`counter 93 and 94, with the counter arranged in such a
`fashion that the first positive-going transition occurs at
`128 seconds after a reset, but the period of the counter
`is actually 256 seconds between positive-going transi-
`tions.
`
`The incrementlogic is part of the 16-bit shift register
`110. Incrementation .is implemented by attaching 12
`half-adders to the 12 least significant bits of the shift
`register in incrementer 117. Carry output is latched in
`carry register 118. The ouput of carry register 118 is
`used in the DLS computation to generate a second
`increment cycle for DLSbif required.
`In the organization of the dat