UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
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`SK HYNIX INC., SK HYNIX AMERICAN INC., and
`SK HYNIX MEMORY SOLUTIONS INC.
`Petitioner,
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`v.
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`NETLIST, INC.,
`Patent Owner.
`____________
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`Case IPR2017-00561 (Patent 8,001,434 B1)
`Case IPR2017-00562 (Patent 8,359,501 B1)
`____________
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`Record of Oral Hearing
` Held: April 6, 2018
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`Before BRYAN F. MOORE, MATTHEW R. CLEMENTS, and
`SHEILA F. MCSHANE, Administrative Patent Judges.
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
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`SK HYNIX INC., SK HYNIX AMERICAN INC., and
`SK HYNIX MEMORY SOLUTIONS INC.
`Petitioner,
`
`v.
`
`NETLIST, INC.,
`Patent Owner.
`____________
`
`Case IPR2017-00561 (Patent 8,001,434 B1)
`Case IPR2017-00562 (Patent 8,359,501 B1)
`____________
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`Record of Oral Hearing
` Held: April 6, 2018
`____________
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`Before BRYAN F. MOORE, MATTHEW R. CLEMENTS, and
`SHEILA F. MCSHANE, Administrative Patent Judges.
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`Case IPR2017-00561 (Patent 8,001,434 B1)
`Case IPR2017-00562 (Patent 8,359,501 B1)
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`APPEARANCES:
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`ON BEHALF OF PETITIONER:
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`JOSEPH MICALLEF, ESQUIRE
`STEVEN S. BAIK, ESQUIRE
`WONJOO SUH, ESQUIRE
`FERENC PAZMANDI, ESQUIRE
`Sidley & Austin, LLP
`1501 K Street NW
`Washington, D.C. 20005
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`ON BEHALF OF THE PATENT OWNER:
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`The above-entitled matter came on for hearing on Friday, April 6,
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`2018, commencing at 1:06 p.m., at the U.S. Patent and Trademark Office,
`600 Dulany Street, Alexandria, Virginia.
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`THOMAS J. WIMBISCUS, ESQUIRE
`WAYNE BRADLEY, ESQUIRE
`McAndrews Held & Malloy, LTD
`500 West Madison Street
`34th Floor
`Chicago, Illinois 60601
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`Case IPR2017-00561 (Patent 8,001,434 B1)
`Case IPR2017-00562 (Patent 8,359,501 B1)
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`P R O C E E D I N G S
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`MS. BOBO: All rise.
`JUDGE MOORE: Be seated. Okay. Good afternoon.
`Judges McShane and Clements, can you hear me?
`JUDGE CLEMENTS: Yes, loud and clear.
`JUDGE MCSHANE: Yes.
`JUDGE MOORE: Great. Okay. We are here for the oral hearing for
`cases IPR2017-00561, 562 and 577. As a, before we do appearances, as an
`initial matter let me find out from the parties how they would like to proceed
`as far as these three cases. Cases 561 and 562 appear to be related, case 577
`not as much. So maybe we will start with petitioner and give me an idea of
`how you wanted to proceed this afternoon.
`MR. MICALLEF: Thank you, Your Honor. Joe Micallef from Sidley
`and Austin. I think you’re right, that the 561 and 562 are patents that are
`related in the patent law since one is a continuation from the other so and it
`seems like the issues there is a lot of overlap so we would propose we do
`those patents first. We will do our case in chief in both. The patent owner
`can do their response on both and then we do our reply on both and then
`perhaps if you are willing to give us a five minute break we do the 85 after,
`185 after or if not we will just go right into it from there.
`JUDGE MOORE: All right.
`MR. MICALLEF: That’s what I would suggest.
`JUDGE MOORE: And patent owner?
`MR. WIMBISCUS: Good afternoon, Your Honor. We agree that the
`561, 562 cases should go first together. The only wrinkle I would add is that
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`we would like some rebuttal. We have a motion to strike so I would
`partition the time but I think that is a separate issue.
`JUDGE MOORE: Right, yes. Okay.
`MR. ARJOMAND: Your Honor, I'm Mehran Arjomand of Morreson
`and Forester. I represent the patent owner in the 577 case.
`JUDGE MOORE: Okay.
`MR. ARJOMAND: And we are okay with the arrangements set forth
`by the parties.
`JUDGE MOORE: Okay. And just so it is clear, certainly if there is
`different counsel in 577 it’s up to you whether you want to sit through the
`initial case or you want to be brought in when the 577 begins. That’s your
`call.
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`MR. ARJOMAND: If it would be okay with Your Honors, we would
`like to be brought in.
`JUDGE MOORE: Yes, that’s fine. And we will most likely take a
`break between the first cases and the second case so that should work out.
`MR. ARJOMAND: Thank you, Your Honor.
`JUDGE MOORE: Sure.
`[Whereupon Mr. Arjomand and Mr. Kim leave the hearing room.]
`JUDGE MOORE: Okay. All right. So we are starting now with the
`oral hearing for the IPR2017-00561 and 562 cases and can I get a roll call of
`who we have here starting with petitioner?
`MR. MICALLEF: Yes, Your Honor. As I said, Joe Micallef, Sidley
`Austin. With me is my partner Steve Baik who is going to provide the
`argument in these proceedings. Also my colleagues Wonjoo Suh and Ferenc
`Pazmandi are in the back. Thank you.
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`JUDGE MOORE: All right.
`MR. WIMBISCUS: Good afternoon, Your Honor, Tom Wimbiscus
`for the patent owner. With me today is Wayne Bradley.
`JUDGE MOORE: All right, thank you. Okay. Petitioner before you
`begin, take the time you need to set up but before you begin, how much time
`would you like to reserve for rebuttal?
`MR. BAIK: I think go about 30 minutes, might be a little bit under
`for the initial presentation and then I would like to reserve the rest of the
`time for rebuttal.
`JUDGE MOORE: Okay. I didn’t say it before but as we usually say
`in these hearings, petitioner is going to go first. They have got the burden.
`As we have heard they reserved time. Patent owner has indicated that it may
`want to reserve time to deal with motions, that certainly will be fine.
`With me at the hearing are Judges McShane and Clements and so it’s
`important as you refer to evidence or as you refer to demonstratives that you
`indicate what you are referring to especially in this case where its
`complicated technology, its important if you are using a pointer or you are
`referring to specific aspects of a figure that you indicate that orally so that
`the Judges can follow. They can't see what we can see here in the
`courtroom. And so any time you are ready.
`MR. BAIK: All right, thank you. And thank you, Your Honor. And
`to the extent there is any argument regarding the motion to strike, we also
`reserve some time for that to the extent we have any time for that. But let
`me go ahead and get started. My name is Steve Baik, Sidley Austin for
`petitioners. And I will be presenting on IPR's 2017-00561 and 562 and this
`is regarding the 434 and the 501 patents respectively as seen here on slide
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`one. Okay, sir.
`And so let’s go ahead to slide two and let’s get started with the 561
`patent. The 561 IPR and the 434 patent and we will go through anticipation
`of Claim 1 and obviousness of Claim 1 with regard to Averbuj and
`obviousness of Claims 1 through 7 based on Averbuj and Tsern.
`JUDGE MOORE: Okay. Well, before we get started we should talk
`about kind of the elephant in the room issue which is there is a motion to
`strike. There was also an order to show cause around the issue of the fact
`that Claim 1 has been found to be unpatentable and that finding was
`affirmed by the Federal Circuit. The parties gave separate opinions but I
`want you to speak to why we would not terminate as to Claim 1 and my
`understanding from your paper is that there would be issues regarding claim
`one that we may have to take up and that was the reasoning for not
`terminating as to Claim 1.
`What I'm trying to understand is based on the issues that we are
`dealing with, there are what we have been calling I guess in the papers
`mappings, three different mappings. And my understanding is patent owner
`is saying that that petitioner is limited to a third mapping which would be
`different than the mapping which applies to the Fed Circuit’s ruling. And so
`for you to explain is -- my understanding is that petition says that the first
`mapping which does align with the Fed Circuit’s ruling is a mapping that is
`in play here and that Claims 2 through 7 would meet Averbuj combined with
`Tsern would meet under that first mapping.
`And so help me understand if that is the case, what issues regarding
`the limitations of Claim 1 would still be of issue when dealing with Claims 2
`through 7 if we are to assume that the elements of Claim 1 have been proven
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`under mapping number one. Is that -- do you understand the question?
`MR. BAIK: Yes, Your Honor. Yes. With regard to that question, to
`the extent the Board decides that there was preclusive effect by the Federal
`Circuit decision, we agree that anticipation for Claim 1 and obviousness of
`Claim 1 is done and we shouldn’t have to discuss it today.
`We left it open with regard to Claims 2 through 7 to the extent there is
`some issue about the first mapping of Claim 1 with regard to 2 through 7.
`We would still like to rely upon mappings two and three for Claims 2
`through 7. So that’s the only issue in terms of why we would say leave
`Claim 1 as to not terminate it but as to Claim 1 itself, we agree that we can
`go ahead and terminate it as an independent claim.
`JUDGE MOORE: Right. Okay. All right. That’s a little bit different
`I think than the way your paper on the Order to Show Cause came out but I
`think I understand what you are saying with that.
`So the follow up I guess I have then is as to the first mapping, do there
`remain issues as to the limitations of Claim 1 left for the Board to decide or
`are those issues really only as to the separate components or separate IC's
`limitations that are found in Claims 2 through 7? Right.
`In other words, if this trial is only about mapping one, is there
`anything left regarding Claim 1 that we need to do?
`MR. BAIK: I don't believe so, Your Honor.
`JUDGE MOORE: Okay. All right. Okay. And again I leave it to
`you how much you want to deal with Claim 1 or the other mappings to
`Claim 1. As far as the Board is concerned, those three mappings are in the
`case at least as to Claim 1 so it’s up to you. We haven’t ruled on any motion
`to terminate at this point.
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`MR. BAIK: And so --
`JUDGE MOORE: So it’s up to you how you want to use your time.
`MR. BAIK: And to clarify a little bit, to the extent the Board does not
`find there is collateral estoppel with regard to the first mapping, we do rely
`upon the second and third mapping as back up. So my, in terms of
`terminating Claim 1 was only if the court finds collateral estoppel as to the
`first mapping.
`JUDGE MOORE: Okay.
`MR. BAIK: All right. Now let me get started on kind of the basics
`here. Going to slide three, we have the 434 patent and basically the 434
`patent is about self-testing memory modules and there is a figure here that
`depicts one of the embodiments in 434 patent.
`And if we go to slide 4 we will see kind of a color coding of the
`different elements with regard to one of the figures, one of the embodiments
`in the 434 patent. This was the color coding provide by patent owners in
`their POR. And we are going to try to follow that color coding just to make
`it simpler for everybody in the court.
`So let’s go to primary reference on slide five, the Averbuj reference
`and Averbuj also dealt with built in self testing and with memory modules as
`we can see here in figure one of Averbuj. And one point we wanted to kind
`of hone in on, is that Averbuj discusses and discloses an electronic device,
`right. And in particular if you look at paragraph five of Averbuj, it says
`however electronic devices, block two in figure one typically comprise more
`than the internal circuitry of a single chip. So not, we are not talking about a
`single chip implementation disclosed in Averbuj.
`Normally they are constructed from many integrated circuits and in
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`many supporting components mounted on a circuit board. So clearly
`Averbuj talks about a circuit board and one that is skilled in the art would
`understand a circuit board can mean a printed circuit board. Particularly
`when we look at paragraph 32, Averbuj says moreover, electronic device
`two may be any device that incorporates memory modules such as a
`computer or a server. And one who is skilled in the art would know in that
`timeframe computers and servers have a motherboard, which was a printed
`circuit board, memory modules which were separate printed circuit boards
`and in many cases there were several printed circuit boards in systems such
`as those.
`So we are going to go through here on slide seven here. We have
`taken figure one of Averbuj and we have kind of color coded all the different
`elements that we are going to be talking about today. So this is kind of our
`road map of what we are going to talk about today. The BIST controller is
`going to be referred to in the claims as a memory controller. The sequencer
`and the address generation units individually and collectively are the control
`module control circuits. The data generation units are the data handers and
`the memory modules are memory devices and the yellow blocks are printed
`circuit boards. All right. These things are printer boards as mentioned
`before. Okay.
`So now let’s go to Claim 1 of the 434 patent and walk through the
`elements. Okay. First element a printed circuit board configured to
`operability coupled to a memory controller of computer system. And so
`going back to paragraph 32 for emphasize that.
`The embodiments disclosed in Averbuj, the implementation are for
`devices such as computers and servers that had printed circuit boards and as
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`you saw with paragraph five it specifically mentioned circuit boards. All
`right. And but that is with your mounted on a circuit board, all right.
`And the controller, the memory controller would be the BIST
`controller which I neglected to highlight here on slide 10 which would be
`block four of figure one I believe. Okay. And figure, paragraph 5 we just
`talked about just explicitly disclosing mounted on a circuit board. Okay.
`More importantly, the patent owners themselves acknowledged that
`Averbuj disclosed a printed circuit board. In their own POR preliminary
`response, POPR, they said the fact that an electronic device may comprise
`MSM6250 additional integrated circuits, additional memory chips and a
`PCB, however does not make the additional integrated circuits, additional
`memory chips and the PCB elements of Averbuj's BIST unit.
`So what they are saying is Averbuj discloses printed circuit board.
`But it doesn’t disclose printed circuit boards for where we don’t want you to
`see them. That’s another thing. But the whole issue though is that Averbuj
`does disclose printed circuit boards. It mentioned memory modules, it
`mentioned computers and servers and all those that are skilled in the art
`knew they could be implemented on separate or on a single printed circuit
`board.
`JUDGE CLEMENTS: Mr. Baik?
`MR. BAIK: Yes.
`JUDGE CLEMENTS: Sorry to interrupt. But is this laying the
`foundation for some arguments related to Claims 2 through 7? Because if it
`is just about Claim 1, I think for the sake of time we could skip it. If it’s
`necessary in the context of Claims 2 through 7 then by all means let’s talk
`about it.
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`MR. BAIK: It is a little bit but I think individually, Tsern also
`discloses a printed circuit board to the extent there is an issue about that.
`But if you have a question about this particular (inaudible) for Claim 1 I
`would be happy to address it.
`JUDGE CLEMENTS: Well, I guess generally, you know, I'm
`regarding Claim 1 as unpatentable and so if it's just to address patent owners
`arguments about Claim 1, I don’t know that we need to spend your time on
`it.
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`MR. BAIK: Yes.
`JUDGE CLEMENTS: If we need to address them because they relate
`somehow to Claims 2 through 7 then let’s do that but I think that would be
`the only reason we would need to talk about it.
`MR. BAIK: Okay. I think I was done wrapping up on that anyway,
`Your Honor. Okay.
`So going to the next element, a plurality of memory devices on the
`printed circuit board (inaudible) dispute this is a 434 patent figure one shows
`a number of memory devices. If you look at Averbuj, figures one and four,
`they also disclose memory modules or memory devices as discussed in
`Averbuj.
`Figure one is kind of at a macro level if you have several memory
`modules but each of the modules themselves in figure four has multiple
`memory devices. Now if you put the two figures from Averbuj and the 434
`patent that looked very nice. Okay.
`Let’s go ahead and get to claim, slide 17. So, Your, Judge Clements,
`are you suggesting that perhaps we skip all of Claim 1 and go ahead and go
`to Claims 2 through 7 or?
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`JUDGE CLEMENTS: Yes, let’s go straight to claim -- or slide 31. I
`think it is where the Claim 2 slides start.
`MR. BAIK: Okay, so sure. So we can go ahead and talk about
`Claims 2 through 7. I may jump back a little bit to talk about the three
`different mappings when we get to that but I do understand --
`JUDGE CLEMENTS: I understand.
`MR. BAIK: -- let’s get to the meat of the matter. So let me -- as we
`saw earlier, Averbuj itself disclosed a printed circuit board and I believe the
`prior decision that was affirmed by the Federal Circuit affirmed that as well.
`And what we are showing to the extent there is an issue still remaining
`though, Tsern definitely discloses a printed circuit board. But more
`particularly with regard to Claim 2, Claim 2 talks about a plurality of data
`handlers that comprise at least two physically separate components.
`Now I want to emphasize one thing about Claims 2 through 7. Two
`through seven relate only to the data handlers. They don’t relate to the
`control modules, they don’t relate to anything else. So we are kind of at a
`loss as to why patent owner brings up issues about Claims 2 through 7 and
`doesn’t address the data handlers but addresses the different element. But
`we will go ahead and talk about the data handlers themselves.
`JUDGE MOORE: Okay. Well, maybe you can jump forward then
`since you have brought up that issue. And when talking about the
`motivation to combine, in your petition I believe it was pages 65 and 66 I
`believe. But you mentioned specifically the third mapping and, you know,
`I'm paraphrasing here but that one of ordinary skill in the art would
`understand that the sequencer and other components would be together on a
`chip so why don’t you just go to that and explain why that is in there and
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`why that doesn’t limit your discussion of Claim 2 to the third mapping.
`MR. BAIK: Sure. And let me step back because I think there is a
`confusion about the mapping numbers. If you look at slide 20, the first
`mapping was that the sequencer alone in Averbuj represents a controlled
`module. That’s the first mapping.
`The second, and we see the in slide 21, how the circuitry -- slide 22 is
`the second mapping where we say the address generation units alone
`represent the control module, circuitry or the control circuit. All right.
`And the mapping three is that both the sequencer and the address
`generation units collectively represent the control module.
`JUDGE MOORE: Terrific. And just to orient ourselves, again
`mapping one is the one that relates to the previous case.
`MR. BAIK: Yes. Okay. I -- and yes. They're -- patent owner is
`saying that somehow we are constricted to mapping three. Yes, Your
`Honor.
`JUDGE MOORE: Right.
`MR. BAIK: Okay.
`JUDGE MOORE: Okay.
`MR. BAIK: So let’s get to that. Let's go to slide 103. So this is in
`relation to the patent owner motion to strike, and that's slide 103. And this is
`slide 104 shows patent owners depiction of what they believe we have
`argued and restricted ourselves to.
`And the fact of the matter is, they have taken one statement out of
`context and ignored many, many other statements in our petition and our
`expert declaration that show we are not focused on this and we were not
`restricted to this mapping. And in particular, if we go to slide 105, in our
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`petition at 65, and with regard to the 562 petition that would also be at page
`40 of the 562 petition, we stated Tsern demonstrated that before the priority
`data of the 434 patent it was within the average skill of the art to include a
`plurality of data handlers circuit in physically separate components such as
`separate circuit packaging on a printed circuit board and that such circuit
`would operate as expected.
`There is no statement there that we said anything about the sequence
`or the address generation unit. It is very clear. What we have argued is that
`the data handlers can be put in separate chips. I don’t really see any
`ambiguity there but the patent owner never identified this passage. And if
`you go to the expert declaration, the expert said the same thing.
`Let’s go ahead to slide 106. A skilled artisan would have been further
`motivated to include the separate component configuration of Tsern in the
`system of Averbuj particularly for the memory interfaces of Averbuj. The
`memory interfaces in Averbuj contain the data generation unit.
`Let’s go to slide 107. The, our expert at paragraph 245 of his
`declaration stated the same thing. Pointing out the memory interfaces.
`Nowhere is there a discussion about sequencers. Okay.
`I'm not going to belabor the point but there is a very good statement
`here if you go to slide 110 and we have showing you the slide, we have
`identified a few others and the highlighted portion of slide 110 on at petition
`at 69, a skilled artisan would therefore have been motivated to place the data
`handlers of Averbuj in physically separate integrated circuit packages
`mounted on different portions of the printed circuit board for each of these
`reasons.
`And we have identified in several other slides and places in our
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`petition and our expert declaration where we specifically spell it out that
`what we are talking about is Averbuj in light of Tsern is focused on the data
`handlers because that is all Claims 2 through 7 really talk about. Nowhere in
`Claims 2 through 7 does it talk about the control module or anything else.
`So we think they set up a straw man to knock it down and to allow
`themselves to present new arguments because, you know, obviously they
`failed to meet their burden. We have shown and we can go back through
`each element if we need to, that Claims 1 through 7 in their entirety are
`unpatentable. So if there are any other questions about the particular issues
`on the data handlers I would be happy to address them. Then I can go back
`on, go back to the presentation.
`JUDGE MOORE: Okay. So what I wanted to go to and you may
`have to just bring it from the, from your petition but the, in the discussion of
`motivation to combine, there is a sentence, the sentence that they focus on
`that talks about the sequencer and so I want you to talk about that sentence
`and why it is there and why it doesn’t support patent owners contentions.
`MR. BAIK: Okay. Go to slide 246.
`[Whereupon Mr. Baik and Mr. Suh confer.]
`MR. BAIK: This is not the one. So if we go to the Elmo, and in
`particular we are going to be looking at pages 65 and 66 of the, of our
`petition. But what they leave out in taking kind of an excerpt from our
`petition is the entire passage. A skilled artisan also would have been
`motivated to include the separate components configuration of Tsern in the
`system with Averbuj so that the self-test circuitry could be conveniently
`placed in the same packaging as buffer circuitry used to access and isolate
`different portions of the memory rate. By the priority data of 434 patent it
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`was known et cetera, et cetera that you can reduce the load experienced by
`the memory controller and improve the memory timing.
`A skilled artisan would therefore have been motivated to place the
`sequencers and memory interface averages within such buffer component in
`order to reduce the load on the memory controller and also improve timing.
`So that statement, there is with regard to the packaging. Remember the
`paragraph stated regarding the packaging where we are talking about we can
`have different packages.
`And the point we have made in our petition is the 434 patent itself
`talks about you can place even one chip or many chips and those passages in
`the 434 patent there is a control module itself could be in one chip or many
`chips. Right. Same thing with the data handler. So even the 434 patent
`itself acknowledged that there is a level of integration or distribution
`depending, you know, it’s a design choice for the engineer to decide. Right.
`So all we are saying is that they could be in the same type of packaging.
`To the extent this statement says with regard to putting sequence and
`memory interfaces, then sure, then we are talking also about mapping three.
`But in our entire petition read as a whole as we went through those different
`passages, we are not limited to this one passage. Right. We said very
`clearly in many other passages that were talking about the data handlers
`being in separate circuits.
`So they are taking just one statement in isolation and say its, somehow
`saying that we didn’t say data handlers could be in separate packages when I
`have showed to you many, many passages where we said explicitly that. So
`we think it is just kind of red herring, they want to take one statement out of
`context but we have disclosed in our petition and made argument that all
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`three mappings could be applied if you wanted to but when we talk
`specifically about Claims 2 through 7, we are always identifying the data
`handlers.
`JUDGE MOORE: Well, the next thing I want you to do is to show
`me in the petition how you read mapping one with data handlers on separate
`chips. So in other words, is there somewhere an explanation of how that
`combination would work or figure or some explanation or, you know, if it's
`the case you can tell me that your discussion of Claim 2 only focuses on data
`handlers but help me understand where in the petition I can see mapping one
`and data handlers in separate chips. Either in description or in figure form.
`MR. BAIK: With regard to Claim 2 through 7.
`JUDGE MOORE: Right.
`MR. BAIK: Right. We are only talking about the data handlers. And
`I don’t believe there is a specific passage where we have said, you know,
`you can put the sequencers in the address generation unit and the data
`handler's whole shebang into one big chip. Okay. We are not saying that.
`What we said with regard to Claims 2 through 7, because we are only
`focused on the data handlers so we didn’t really understand the need to
`discuss the mapping of the control modules because that is a separate
`element.
`To the extent that you accept all three mappings, of the control
`module, control circuit elements as we have argued, we don’t believe you
`need to address it for Claims 2 through 7 because Claims 2 through 7 only
`recite the data handlers being in separate chips. So our discussion with
`regard to Claims 2 through 7 was limited.
`JUDGE MOORE: Okay. And now we have gotten you sort of totally
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`off of your script but I don’t know if Judge Clements or McShane has more
`questions along that line but if not --
`JUDGE CLEMENTS: Yes, I do.
`JUDGE MOORE: Yes.
`JUDGE CLEMENTS: So before we move onward, so on page 65 of
`the petition there was the sentence you pointed out that says it was within
`the average skill of the art to include a plurality of data handler circuits and
`physically separate components, dot, dot, dot, close quote. So that seems
`helpful for you because it is sort of by referring to the plurality of data
`handlers its agnostic as to, you know, what exact components of Averbuj are
`those data handlers. It could be mapping one, two and three.
`But then the next paragraph, first sentence it says particularly for the
`memory interfaces of Averbuj and so, you know, particularly is pretty
`exemplary language but it does say memory interfaces specifically, which
`would suggest that that paragraph, that sentence at least, is sort of tied to
`mapping two or maybe mapping two and three.
`And then at the end of the next paragraph, this is over on 66, it says
`quote, "A skilled artisan would therefore have been motivated to place the
`sequencers and the memory interfaces of Averbuj within such buffer
`components." close quote. And so that seems much more tied to the
`mapping number three where they are both together.
`So help me understand, you know, there are sort of three different
`sentences. One is sort of agnostic as to the mappings and then these other
`two that seem tied to specific mappings. How should we understand the
`three things together?
`MR. BAIK: Well, I think we should go back to the claim. The claims
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`are for Claims 2 through 7, the data handlers. So I think what we have made
`statements to is that directed toward the claim and I think we have been to
`the extent there is some ambiguity in the petition, we are relying primarily
`on Averbuj and Tsern disclosing data handlers in separate chip. The extent
`the control module or control circuit are any way relevant yes we made some
`statements that perhaps the sequences of memory, the address generation
`units could also be in the same chip. But I think the primary point though is
`the data handlers can be in separate chips.
`So I don’t think there is any unless there is a question, I don’t think
`there is, given what we have shown that we have many statements that we
`were talking about the data handlers being in separate chips.
`JUDGE CLEMENTS: Okay, thank you.
`MR. BAIK: And then just to further emphasize, the three mappings
`again were related to the control module and the control circuits. Right.
`And so by the time we get to Claims 2 through 7 we are talking about data
`handlers which is the only element really at issue in Claims 2 through 7. All
`right. So let’s go back to my stuff. If we can
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