IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`In re patent of Diaz et al.
`
`U.S. Patent No. 5,812,789
`
`Issued: September 22, 1998
`
`Title: Video and/or Audio
`Decompression and/or Compression
`Device That Shares a Memory
`Interface
`
`
`§
`§
`§
`§
`§
`§
`§
`§
`§
`
`Petition for Inter Partes Review
`
`Attorney Docket No.: 52959.21
`Customer No.:
`27683
`
`Real Party in Interest:
`Apple Inc.
`
`
`
`
`
`
`Declaration of Robert Colwell, Ph.D.
`Under 37 C.F.R. § 1.68
`
`
`
`
`
`
`
`
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`–1–
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`
`
`Apple Inc. v. Parthenon
`Ex. 1003 / Page 1 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p. 1
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`

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`Table of Contents
`
`Introduction .......................................................................................................... 4 
`I. 
`II.  Qualifications and Professional Experience ........................................................ 6 
`III.  Level of Ordinary Skill in the Art ....................................................................... 9 
`IV. Relevant Legal Standards .................................................................................. 10 
`V.  The ’789 Patent .................................................................................................. 11 
`A.  Overview ..................................................................................................... 11 
`
`B.  History of the ’789 Patent ........................................................................... 17 
`
`VI. Claim Construction ............................................................................................ 17 
`A.  “decoder” .................................................................................................... 19 
`
`B.  “encoder” .................................................................................................... 19 
`
`C.  “real time” ................................................................................................... 20 
`
`D.  “variable bandwidth” .................................................................................. 22 
`
`VII.  Ground I: Claims 1-5 and 12-14 are invalid under 35 U.S.C § 103 over
`Bowes and TMS .......................................................................................... 24 
`A.  Overview of Bowes .................................................................................... 24 
`
`B.  Overview of TMS ....................................................................................... 28 
`
`C.  Reasons to Combine Bowes and TMS ....................................................... 30 
`
`D.  Overview of Thomas .................................................................................. 34 
`
`E.  Reasons to Combine Bowes, TMS, and Thomas ....................................... 36 
`
`F.  Detailed Analysis ........................................................................................ 41 
`
`VIII.  Ground II: Claims 6 and 8 are invalid under 35 U.S.C § 103 over
`Bowes, TMS, Thomas, and Gove ............................................................... 68 
`A.  Overview of Gove ...................................................................................... 68 
`
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`B.  Reasons to Combine Bowes, TMS, Thomas, and Gove ............................ 70 
`
`C.  Detailed Analysis ........................................................................................ 71 
`
`IX. Ground III: Claim 7 is invalid under 35 U.S.C § 103 over Bowes, TMS,
`Thomas, and Ran ......................................................................................... 74 
`A.  Overview of Ran ......................................................................................... 74 
`
`B.  Reasons to Combine Bowes, TMS, Thomas, and Ran ............................... 75 
`
`C.  Detailed Analysis ........................................................................................ 76 
`
`X.  Ground IV: Claim 11 is invalid under 35 U.S.C § 103 over Bowes, TMS,
`Thomas, and Celi ........................................................................................ 78 
`A.  Overview of Celi ........................................................................................ 78 
`
`B.  Reasons to Combine Bowes, TMS, Thomas, and Celi .............................. 78 
`
`C.  Detailed Analysis ........................................................................................ 80 
`
`XI. Declaration ......................................................................................................... 85 
`
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`–3–
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`Ex. 1003 / Page 3 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.3
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`I.
`
`Introduction
`
`I, Robert Colwell, Ph.D., declare:
`
`1.
`
`I am making this declaration at the request of Apple Inc. in the matter
`
`of the Inter Partes Review of U.S. Patent No. 5,812,789 (“the ’789 Patent”) to
`
`Diaz et al.
`
`2.
`
`I am being compensated for my work in this matter. I am also being
`
`reimbursed for reasonable and customary expenses associated with my work and
`
`testimony in this investigation. My compensation is not contingent on the outcome
`
`of this matter or the specifics of my testimony.
`
`3.
`
`In the preparation of this declaration, I have studied:
`
`(1) The ’789 Patent, Exhibit 1001;
`
`(2) The prosecution history of the ’789 Patent, Exhibit 1002;
`
`(3) U.S. Patent No. 5,546,547 to Bowes et al. (“Bowes”), Exhibit 1005;
`
`(4) Texas Instruments, Inc., Houston, TX, “TMS320C8x System Level
`
`Synopsis,” (1995) (Literature Ref. SPRU113) (“TMS”), Exhibit 1006;
`
`(5) U.S. Patent No. 5,001,625 to Thomas et al. (“Thomas”), Exhibit 1007;
`
`(6) R. Gove, “The MVP: A Highly-Integrated Video Compression Chip”,
`
`IEEE 1994 (“Gove”), Exhibit 1008;
`
`
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`–4–
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.4
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`(7) U.S. Patent No. 5,768,533 to Ran (“Ran”), Exhibit 1009;
`
`(8) U.S. Patent No. 5,742,797 to Celi et al. (“Celi”), Exhibit 1010;
`
`(9)
`
`Joint Claim Construction and Prehearing Statement, Parthenon
`
`Unified Memory Architecture LLC v. Apple Inc., case no. 2:15-cv-
`
`632-JRG-RSP (Feb. 16, 2016, E.D. Tex.), Exhibit 1011; and
`
`(10) Decision of Institution of Inter Partes Review, Samsung Elec. Co.,
`
`Ltd., et al. v. Parthenon Unified Memory Architecture LLC, IPR2015-
`
`01944 (Paper No. 7) , Exhibit 1012.
`
`4.
`
`In forming the opinions expressed below, I have considered:
`
`(1) The documents listed above,
`
`(2) The relevant legal standards, including the standard for obviousness
`
`provided in KSR International Co. v. Teleflex, Inc., 550 U.S. 398 (2007), and
`
`(3) My own knowledge and experience, including my work experience in
`
`the fields of electrical engineering, computer engineering, computer
`
`architectures, memory interfacing, and multimedia technologies, and my
`
`experience in working with others involved in those fields, as described
`
`below.
`
`
`
`
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`–5–
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`Ex. 1003 / Page 5 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.5
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`II. Qualifications and Professional Experience
`
`5. My complete qualifications and professional experience are described
`
`in my curriculum vitae, a copy of which can be found in Exhibit 1004. The
`
`following is a brief summary of my relevant qualifications and professional
`
`experience.
`
`6.
`
`I have nearly 40 years of professional experience in the field of
`
`processor and system architecture design. I consider myself an expert in, among
`
`other things, CPU architecture and computer systems.
`
`7.
`
`I received an undergraduate Bachelor of Science degree in Electrical
`
`Engineering from the University of Pittsburgh in 1977. I received a Master’s of
`
`Science degree in Computer Engineering from Carnegie Mellon University in 1978
`
`as well as a Ph.D. in Computer Engineering in 1985.
`
`8.
`
`From 1977 to 1980, I held an engineering position at Bell Telephone
`
`Laboratories where I worked on, among other things, microprocessor hardware
`
`design.
`
`9.
`
`From 1980 to 1984, I held an engineering position at Perq Systems,
`
`where I worked on hardware design in computer environments. From 1985 to
`
`1990, I held an engineering position at Multiflow Computer, where I served as a
`
`hardware architect. While at Multiflow Computer, I assisted in creating the first
`
`
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`–6–
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.6
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`very long instruction word (VLIW) scientific supercomputer.
`
`10. From 1990 to 2001, I held various positions at Intel including Senior
`
`CPU Architect and later Chief Architect (for Intel’s IA-32, also known as x86). As
`
`part of my responsibilities at Intel, I co-invented Intel’s P6 microarchitecture that
`
`formed the core of the Pentium II manufactured by Intel (as well as the Pentium
`
`III, Celeron, Xeon, and Centrino families). The P6 core is still very influential
`
`today, in Intel’s top-of-the-line Core i3, i5, and i7 processors. In addition, I led
`
`Intel’s x86 Pentium CPU architecture endeavors. I was honored to be named an
`
`Intel fellow in 1997 in recognition of my contributions to the P6 microarchitecture
`
`development.
`
`11.
`
`I became a self-employed industry consultant in 2001, working with
`
`computer industry clients such as Safeware, the University of Pittsburgh, Intel,
`
`many venture capital companies, and the U.S. Department of Defense (DoD).
`
`12. From 2011 to 2014, I worked at the Defense Advanced Research
`
`Projects Agency (DARPA) first as Deputy Director, then Director, of the
`
`Microsystems Technology Office (MTO). MTO had an annual budget of
`
`approximately $600M, and my job as office leader was to invest that money in
`
`promising new technologies for the DoD, including new energy-efficient
`
`computing systems, modular and adaptable radars, position/navigation/timing
`
`systems for GPS-denied environments, computer-mediated prosthetics for military
`
`
`
`–7–
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`Ex. 1003 / Page 7 of 85
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`(and civilian) amputees, traumatic brain injury detection devices for soldiers, fused
`
`multiple-band night vision sensors, extremely high power lasers, and much more.
`
`13.
`
`I have been recognized by the industry for my contributions to
`
`processor design. I received the Eckert-Mauchly Award in 2005 for “outstanding
`
`achievements
`
`in
`
`the design and
`
`implementation of
`
`industry-changing
`
`microarchitectures, and for significant contributions to the RISC/CISC architecture
`
`debate.” The Eckert-Mauchly Award is generally viewed as the highest possible
`
`recognition in the field of computer architecture.
`
`14.
`
`I was inducted into the National Academy of Engineering in 2006, the
`
`nation’s highest honorary society for engineering achievement. In 2012 I was
`
`inducted into the American Academy of Arts and Sciences; other inductees in my
`
`“class” that year included Sir Paul McCartney, Hillary Rodham Clinton, and Mel
`
`Brooks.
`
`15.
`
`In 2015 I received the Bob Rau Award from the Institute of Electrical
`
`and Electronics Engineers (IEEE), for “contributions to critical analysis of
`
`microarchitecture and the development of the Pentium Pro processor.”
`
`16.
`
`I have published many conference papers, sections of textbooks, and
`
`articles for magazines. I have also been named an inventor on 40 patents related to
`
`computer hardware and processor design. I have also been an editor for several
`
`
`
`–8–
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`IEEE publications.
`
`17. My curriculum vitae (Ex. 1004) includes a list of all publications I
`
`have authored in the last 10 years.
`
`18.
`
`In summary, I have extensive familiarity with multimedia systems,
`
`computer architectures, unified memory architectures, and methods related to
`
`controlling memory access, and am familiar with what the states of these
`
`technologies were at the relevant time of the ’789 Patent invention and before.
`
`III. Level of Ordinary Skill in the Art
`
`19.
`
`I am familiar with the knowledge and capabilities of persons of
`
`ordinary skill in the computer system architecture and multimedia processing arts
`
`in the period around 1996. In addition to my own experiences, I worked with and
`
`spent 11 years leading an industrial microprocessor design team at Intel, which by
`
`the mid 1990’s included more than 450 engineers. The majority of those engineers
`
`I personally interviewed as part of the recruiting and hiring process. My experience
`
`working in the industry and interactions with colleagues and supervision of
`
`practicing engineers has allowed me to become directly and personally familiar
`
`with the level of skill of individuals and the general state of the art as of 1996.
`
`20.
`
`I have been informed by Apple’s counsel that the earliest alleged
`
`priority date for the ’789 Patent is August 26, 1996. Unless otherwise stated, my
`
`
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`–9–
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`Ex. 1003 / Page 9 of 85
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`testimony below refers to the knowledge of one of ordinary skill in the computer
`
`system architecture and multimedia processing arts in the period around and prior
`
`to August 26, 1996. In my opinion, the level of ordinary skill in the art appropriate
`
`to understanding the scientific and engineering principles applicable to the ’789
`
`Patent is (i) a Bachelor of Science degree (or higher degree) in an academic area
`
`emphasizing electrical or computer engineering and (ii) three years of relevant
`
`industry experience.
`
`IV. Relevant Legal Standards
`
`21.
`
`I have been asked to provide my opinions regarding whether claims 1-
`
`8 and 11-14 of the ’789 Patent would have been obvious to a person having
`
`ordinary skill in the art at the time of the alleged invention, in light of the prior art.
`
`I have been informed by Apple’s counsel that a claimed invention is unpatentable
`
`under 35 U.S.C. § 103 if the differences between the invention and the prior art are
`
`such that the subject matter as a whole would have been obvious at the time the
`
`invention was made to a person having ordinary skill in the art to which the subject
`
`matter pertains. I have also been informed by counsel that the obviousness analysis
`
`takes into account factual inquiries including the level of ordinary skill in the art,
`
`the scope and content of the prior art, and the differences between the prior art and
`
`the claimed subject matter.
`
`
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`–10–
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`22.
`
`I have been informed by counsel that the Supreme Court has
`
`recognized several rationales for combining references or modifying a reference to
`
`show obviousness of claimed subject matter. Some of these rationales include the
`
`following: (a) combining prior art elements according to known methods to yield
`
`predictable results; (b) simple substitution of one known element for another to
`
`obtain predictable results; (c) use of a known technique to improve a similar device
`
`(method, or product) in the same way; (d) applying a known technique to a known
`
`device (method, or product) ready for improvement to yield predictable results; (e)
`
`choosing from a finite number of identified, predictable solutions, with a
`
`reasonable expectation of success; and (f) some teaching, suggestion, or motivation
`
`in the prior art that would have led one of ordinary skill to modify the prior art
`
`reference or to combine prior art reference teachings to arrive at the claimed
`
`invention.
`
`V. The ’789 Patent
`
`A. Overview
`
`23. The ’789 Patent generally describes an electronic system with a first
`
`device and a “video and/or audio decompression and/or compression device” that
`
`share a memory interface in a manner that permits the decompression/compression
`
`device to operate in real time. (Ex. 1001, Abstract). In order to fit digital media,
`
`such as movies, onto “conventional recording medium, such as a CD,” it was
`
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`–11–
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`already known to “compress video and audio sequences before they are transmitted
`
`or stored.” (Ex. 1001, 1:25-34). For compression/decompression, “[t]he MPEG
`
`standards are currently well accepted standards for one way communication.
`
`H.261, and H.263 are currently well accepted standards for video telephony.” (Ex.
`
`1001, 1:56-59).
`
`24. The ’789 Patent further states that electronic systems added decoders
`
`to these systems in order to “allow them to display compressed sequences” and
`
`encoders “to allow the system to compress video and/or audio sequences to be
`
`transmitted or stored.” (Ex. 1001, 1:64-2:2). The ’789 Patent continued that
`
`decoders for MPEG sequences “typically … requires a 2 Mbyte memory,” and that
`
`such memory was “dedicated to the MPEG decoder 10 and increases the price of
`
`adding a decoder 10 to the electronic system.” (Ex. 1001, 2:28-31).
`
`25. The ’789 Patent allegedly addresses these problems by having the
`
`“video and/or audio decompression and/or compression device share[] a memory
`
`interface and the memory with the first device.” (Ex. 1001, 3:67-4:2). An arbiter is
`
`used “to arbitrate between the two devices when one of them is requesting access
`
`to the memory.” (Ex. 1001, 4:4-8.) Figure 2 illustrates an electronic system
`
`containing a device having a memory interface and an encoder and decoder:
`
`
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`–12–
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`Ex. 1003 / Page 12 of 85
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`Ex. 1001, Fig. 2
`
`
`
`26. The ’789 Patent explains that its proposed solution results in cost
`
`reduction “due to the fact that the video and/or audio decompression and/or
`
`compression device does not need its own dedicated memory but can share a
`
`memory with another device and still operate in real time.” (Ex. 1001, 4:30-34).
`
`27. The ’789 Patent further explains that its real time operation is made
`
`possible through an arbiter, where requests are granted access to the memory
`
`through the arbiter based on the priority scheme. The priority scheme “can be any
`
`priority scheme that ensures that the decoder/encoder 45 gets access to the memory
`
`50 often enough and for enough of a burst length to operate properly, yet not starve
`
`
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`–13–
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`Ex. 1003 / Page 13 of 85
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`the other devices sharing the memory.” (Ex. 1001, 10:9-24). The ’789 Patent states
`
`that its system includes a “bus 70 [FIG. 2 above], that [has] a bandwidth greater
`
`than the bandwidth required for the decoder/encoder 45 to operate in real time. …
`
`A fast bus 70 is any bus whose bandwidth is equal to or greater than the required
`
`bandwidth.” (Ex. 1001, 6:29-62). The ‘789 Patent states that a “memory bus 185
`
`corresponds to the fast bus 70. In current technology the memory bus 185, for
`
`coupling a graphics accelerator to a memory, is capable of having a bandwidth of
`
`up to 400 Mbytes/s. This bandwidth is more tha[n] twice the bandwidth required
`
`for an optimized decoder/encoder 45. This allows the decoder/encoder 45 to
`
`operate in real time.” (Ex. 1001, 9:19-25).
`
`28. As an initial matter, I note that the alleged solution presented in the
`
`’789 Patent—sharing a memory between multiple devices and arbitrating access
`
`thereto between the devices—was well known to persons of ordinary skill in the art
`
`before the earliest alleged priority date of the ’789 patent. For example, others had
`
`previously identified the problem of “the requirement of a substantial block of
`
`static random access memory … SRAMs are significantly more expensive than
`
`DRAM which greatly increases the cost of computer systems which incorporate
`
`SRAM.” (Ex. 1005, 2:36-41).
`
`29. Further, others had identified the same solution to the problem,
`
`namely providing “a mechanism and method for arbitrating the memory bus
`
`
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`–14–
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`Ex. 1003 / Page 14 of 85
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`bandwidth to efficiently allow the use of a digital signal processor and a CPU over
`
`a common memory bus sharing the system's dynamic random access memory
`
`subsystem without requiring an expensive block static random access memory.”
`
`(Ex. 1005, 2:57-63). Moreover, digital signal processors were known to provide
`
`compression and decompression (e.g., MPEG) before the ’789 Patent. (See, e.g.,
`
`Ex. 1006, pp. SL:1-8, A-5, A-6).
`
`30.
`
`In claim 1 of the ’789 Patent, which is exemplary, a “first device” and
`
`a “decoder” both require access to a memory. As explained by the ’789 Patent, the
`
`“first device” “can be a processor, a core logic chipset, a graphics accelerator, or
`
`any other device that requires access to the memory 50, and either contains or is
`
`coupled to a memory interface.” (Ex. 1001, 5:19-22). Further, the ’789 Patent
`
`defines “decoder” as “a video and/or audio decompression device.” (Ex. 1001,
`
`1:48-51).
`
`31. The “first device” and the “decoder” are coupled to a memory that has
`
`an arbiter, all of which are coupled to a “shared bus.” The “shared bus” is claimed
`
`as having a “sufficient bandwidth” to enable the “decoder” to operate in real time
`
`“when the first device simultaneously accesses the bus.” According to the ’789
`
`Patent, “[a] goal is to have the decoder/encoder 45 operate in real time without
`
`dropping so many frames that it becomes noticeable to the human viewer of the
`
`movie. To operate in real time the decoder/encoder 45 should decoder and/or
`
`
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`–15–
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`Ex. 1003 / Page 15 of 85
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`encode images fast enough so that any delay in decoding and/or encoding cannot
`
`be detected by a human viewer.” (Ex. 1001, 6:41-46). The ’789 Patent continues
`
`that “[t]o operate in real time the required bandwidth should be lower than the
`
`bandwidth of the bus.” (Ex. 1001, 6:52-53).
`
`32. Claim 1 recites:
`
`to a memory,
`
`1. An electronic system coupled
`comprising:
`a first device that requires access to the memory;
`a decoder that requires access to the memory sufficient
`to maintain real time operation; and
`a memory interface for coupling to the memory, and
`coupled to the first device and to the decoder, the memory
`interface having an arbiter for selectively providing access for
`the first device and the decoder to the memory and a shared
`bus coupled to the memory the first device, and the decoder,
`the bus having a sufficient bandwidth to enable the decoder to
`access the memory and operate in real time when the first
`device simultaneously accesses the bus.
`
`33. Based on my experience, the electronic system described in the ’789
`
`Patent and claimed in claims 1-8 and 11-14 was already well known to persons of
`
`ordinary skill in the art before the earliest alleged priority date. For instance, others
`
`had already taught the usefulness of unified memory architectures with arbitration
`
`to the shared memory, and the use of video compression and decompression
`
`
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`–16–
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`algorithms in such systems. (See Ex. 1005, Ex. 1006).
`
`34. Accordingly, as I show below, it is my opinion that the elements and
`
`functionality recited in claims 1-8 and 11-14 of the ’789 Patent were already well
`
`known before the earliest claimed priority date of the ’789 Patent.
`
`B. History of the ’789 Patent
`
`35. The ’789 Patent issued on September 22, 1998 from U.S. Patent
`
`Application No. 08/702,911 by Raul Zegers Diaz and Jefferson Eugene Owen. I
`
`have been informed by counsel that the earliest alleged priority date for the ’789
`
`patent is August 26, 1996.
`
`36.
`
`I have reviewed the prosecution history of the ’789 patent and it is my
`
`understanding that none of the references cited in this declaration were
`
`substantively considered by the United States Patent Office during prosecution.
`
`VI. Claim Construction
`
`37.
`
`It is my understanding that in order to properly evaluate the ’789
`
`Patent, the terms of the claims must first be interpreted. It is my understanding that
`
`for the purposes of this inter partes review the claims are to be given their broadest
`
`reasonable interpretation in light of the specification. It is my further understanding
`
`that claim terms are given their ordinary and customary meaning as would be
`
`understood by one of ordinary skill in the art, unless the inventor has set forth a
`
`
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`–17–
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`Ex. 1003 / Page 17 of 85
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`special meaning for a term. As such, any claim term not construed below should be
`
`given its ordinary and customary meaning.
`
`38.
`
`In addition to the broadest reasonable interpretation set forth herein, I
`
`have been informed that the ’789 patent appears set to expire in August 2016. In
`
`such cases, I have been told that the Board may construe patent claims, once
`
`expired, according to the standard applied in the district courts by applying the
`
`principles set forth in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) (en
`
`banc). I am told under Philips principles, the words of the claims are generally
`
`given their ordinary and customary meaning as understood by a person of ordinary
`
`skill in the art in question at the time of the alleged invention. It is my opinion that
`
`this change of standards would not affect any of the invalidity grounds discussed
`
`herein should construction of the claims remain as provided herein.
`
`39.
`
`I have reviewed Ex. 1011, which is a Joint Claim Construction and
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`Prehearing Statement, which identifies several terms to which construction has
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`been agreed between parties. Unless otherwise noted, these agreed constructions
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`are applied in the present invalidity analysis and include “bus” and “arbiter.” In
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`order to construe the following claim terms, I have reviewed the entirety of the
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`’789 Patent as well as its prosecution history.
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`–18–
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`Ex. 1003 / Page 18 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.18
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`A.
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`“decoder”
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`40. This claim term is found in claims 1-4, 6, 8, and 12-14, as well as in
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`the detailed description.
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`41. The ’789 Patent sets forth a special meaning for “decoder” as follows:
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`“[t]he resulting bitstream is decoded by a video and/or audio decompression
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`device (hereinafter decoder) before the video and/or audio sequence is displayed.”
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`(Ex. 1001, 1:48-51) (emphasis added). The ’789 Patent continues in the detailed
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`description: “For ease of reference, a video and/or audio decompression and/or
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`compression device 45 will hereinafter be referred to as decoder/encoder 45.” (Ex.
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`1001, 5:28-31). The decoder/encoder 45 is illustrated in FIG. 2 as including
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`decoder 44 and encoder 46.
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`42.
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`It is therefore my opinion based on my review of the ’789 Patent that,
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`under the broadest reasonable interpretation in view of the ’789 Patent
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`specification, one of ordinary skill in the art would understand that “decoder”
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`means a video and/or audio decompression device.
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`B.
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`“encoder”
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`43. This claim term is found in claims 5-7, as well as in the detailed
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`description.
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`44. Similar to the “decoder” term, the ’789 Patent sets forth a special
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`
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`–19–
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`
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`Ex. 1003 / Page 19 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.19
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`meaning for “encoder” as follows: “[v]ideo and/or audio compression devices
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`(hereinafter encoders) are used to encode the video and/or audio sequence before
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`it is transmitted or stored.” (Ex. 1001, 1:46-48) (emphasis added). “For ease of
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`reference, a video and/or audio decompression and/or compression device 45 will
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`hereinafter be referred to as decoder/encoder 45.” (Ex. 1001, 5:28-31). The
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`decoder/encoder 45 is illustrated in FIG. 2 as including decoder 44 and encoder 46.
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`45.
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`It is therefore my opinion based on my review of the ’789 Patent that,
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`under the broadest reasonable interpretation in view of the ’789 Patent
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`specification, one of ordinary skill in the art would understand that “encoder”
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`means a video and/or audio compression device.
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`C.
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` “real time”
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`46. This claim term is found in claims 1 and 13 and is also used in the
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`detailed description.
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`47. The ’789 Patent does not define the term “real time” in the detailed
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`description. While the ’789 Patent describes conditions that it identifies as
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`important in supporting “real time” operation, these conditions do not provide
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`sufficient definiteness to articulate how “real time” should be construed. For
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`example: “[t]he decoder/encoder 45 is coupled to the memory 50 through devices,
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`typically a bus 70, that have a bandwidth greater than the bandwidth required for
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`
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`–20–
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`
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`Ex. 1003 / Page 20 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.20
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`the decoder/encoder 45 to operate in real time.” (Ex. 1001, 6:29-32). “To operate
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`in real time the decoder/encoder 45 should decode[] … images fast enough so that
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`any delay in decoding … cannot be detected by a human viewer. … To operate in
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`real time the required bandwidth should be lower than the bandwidth of the bus.”
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`(Ex. 1001, 6:41-53).
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`48.
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`I have been informed by Apple counsel that a District Court in a
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`previous case involving the ’789 Patent construed “real time operation” to mean:
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`“processing fast enough to keep up with an input data stream.” (Ex. 1016, p. 5).
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`49.
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`I also have been informed by Apple counsel that District Courts in
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`different cases involving the ’789 Patent have agreed on a construction for “in real
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`time”/“real time” of “fast enough to keep up with an input data stream.” (Ex. 1013,
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`pp. 20-24, Ex. 1014, pp. 18-25, Ex. 1015, pp. 17-23).
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`50.
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`I have also been informed by Apple counsel that in a corresponding
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`litigation involving the ’789 Patent, Apple has taken the position that the term “real
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`time” is indefinite. (Ex. 1011, Appendix A, No. 2).
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`51.
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`I have also been informed by Apple counsel that in an inter partes
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`review proceeding involving this same patent where the term was asserted to be
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`indefinite, a PTAB panel has construed “real time” to mean “pertaining to a data-
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`processing system that controls an ongoing process and delivers its outputs (or
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`
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`–21–
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`
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`Ex. 1003 / Page 21 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.21
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`controls its inputs) not later than the time when these are needed for effective
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`control.” (Ex. 1012, p. 11).
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`52. Accordingly, for present purposes I apply the construction adopted by
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`the PTAB panel that “real time” means pertaining to a data-processing system that
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`controls an ongoing process and delivers its outputs (or controls its inputs) not
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`later than the time when these are needed for effective control.1
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`D.
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` “variable bandwidth”
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`53. This claim term is found in claim 2, but the detailed description does
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`not explicitly use this term.
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`54. The ’789 Patent discusses a bus that has a sufficient bandwidth to
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`meet the decoder’s demands: “The decoder/encoder 45 is coupled to the memory
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`50 through devices, typically a bus 70, that have a bandwidth greater than the
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`bandwidth required for the decoder/encoder 45 to operate in real time.” (Ex.
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`1001, 6:29-32) (emphasis added). The ’789 Patent continues: “A fast bus 70 is any
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`bus whose bandwidth is equal to or greater tha[n] the required bandwidth.” (Ex.
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`1001, 6:58-60).
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`
`1 I note that, in applying the art herein, I find no notable difference between this
`construction and “fast enough to keep up with an input data stream” applied in
`other district court cases involving the ’789 Patent, such that the art reads on the
`claims using either construction.
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`
`
`–22–
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`
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`Ex. 1003 / Page 22 of 85
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`Petitioners HTC Corp. & HTC America, Inc. - Ex. 1003, p.22
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`55. The ’789 Patent also mentions that the decoder does not always need
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`access to the memory, and when it does need access, the decoder does not always
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`need the full bandwidth of the bus: “[t]he decoder/encoder 45 only requires access
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`to the memory during operation. Therefore, when there is no need to decode or
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`encode, the first device 42, and any other devices sharing the memory 50 have
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`exclusive access to the memory and can use the entire bandwidth of the fast bus
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`70. In the preferred embodiment, even during decoding and encoding the
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`decoder/encoder 45 does not always use the entire required bandwidth.” (Ex. 1001,
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`7:5-12).
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`56.
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`In view of the ’789 Patent’s detailed description, a person having
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`ordinary skill in the art would understand that “variable bandwidth” would relate to
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`a v