Chemical Engineering Science, Vol. 42, No. 5, pp. 923--958, 1987.
`Printed in Great Britain.
`
`0009-2509!87 $3.00 + 0.00
`© 1987 Pergamon Journals Ltd.
`
`MICRO-REACTION ENGINEERING
`APPLICATIONS OF REACTION ENGINEERING
`TO PROCESSING OF ELECTRONIC AND PHOTONIC MATERIALS
`
`Klavs F. Jensen
`
`Department of Chemical Engineering and Materials Science
`University of Minnesota
`Minneapolis, Minnesota, 55455, U.S.A.
`
`ABSTRACT
`
`Processing of electronic materials for electronic and opto-electronic devices combines a facinat(cid:173)
`ing variety of physical transport processes and chemical reactions that raise new challenges to
`chemical reaction engineering. These are reviewed along with recent examples of applications of
`chemical reaction engineering to microelectronic processing. Chemical vapor deposition and plasma
`processing of thin films are emphasized as areas where chemical reaction engineering could have a
`significant impact. Other thin film processes, e.g. physical vapor deposition and oxidation, are
`surveyed briefly. Bulk crystal growth analysis is included to demonstrate recent advances in de(cid:173)
`tailed modelling of physical transport processes of interest to reactor modelling. Finally, com(cid:173)
`mon challenges, including micro/macroscopic modelling, large scale computing and fundamental phys(cid:173)
`icochemical phenomena are discussed.
`
`KEY WORDS
`
`Electronic materials; crystal growth; chemical vapor deposition; plasma processing; thin film
`processing; reactor modelling.
`
`INTRODUCTION
`
`[001]
`
`[002]
`
`Starting with the announcement of the transistor in 1948 and the introduction of the planar tran(cid:173)
`sistor in 1959 the microelectronics industry has undergone an impressive evolution to the current
`state where microelectronic circuits are essential in almost all aspects of modern society. For
`the last 25 years the number of components in the most advanced integrated circuits has doubled
`every year to the present level of 106 transistors on a chip (cf. Warner and Grung, 1983 and ref(cid:173)
`erences within for a short historical overview). Si continues to be the major semiconductor
`material for the microelectronic industry while compound semiconductors such as GaAs, AlGaAs, and
`GainAsP find increasing use in high speed electronic devices and optoelectronic components. The
`latter technology is critical for fiberoptic communication and future optical computing and storage
`systems.
`
`The rapid and extensive growth in microelectronics owes much to the scientists and engineers con(cid:173)
`cerned with solving materials and processing problems associated with achieving new device struc(cid:173)
`tures and ever higher levels of integration. These problems are compounded and new ones arise as
`the minimum feature size of a device shrinks below one micron, as the level of integration grows,
`and as new materials such as polymers are incorporated into device structures.
`In addition, com(cid:173)
`pound semiconductor technology raises processing challenges beyond those commonly found in Si
`based fabrication. This review aims to demonstrate that chemical reaction engineering could play
`a significant role in understanding these problems and advancing fabrication techniques. Existing
`semiconductor unit operations, where chemical reaction engineering approaches readily apply, are
`described along with new challenges to the discipline. First, general characteristics of micro(cid:173)
`electronics processing are discussed.
`
`MICROELECTRONIC PROCESSING
`
`[003]
`
`Fabrication of microelectronic components involves a variety of complex chemical processes which
`can be divided into the unit operations summarized in Table 1. Chemical reaction engineering con(cid:173)
`cepts are particularly relevant to chemical vapor deposition and plasma processing. The unit
`operations are combined in the manufacturing process to produce three dimensional microstructures,
`which determine the performance of the final electronic component.
`
`[004]
`
`(A) a Metal Oxide Semiconductor Field Effect
`Figure 1 illustrates two typical device structures:
`Transistor (MOSFET) representing Si based technology and (B) an InGaAsP semiconductor laser exem(cid:173)
`plifying III-V compound semiconductor processes. The "building" of a particular microelectronic
`
`923
`
`Ex.1011 p.1
`
`

`
`924
`
`KLAVS F. JENSEN
`
`TABLE 1
`
`Microelectronic Unit Operations
`
`Unit Operation
`
`Bulk crystal growth
`Liquid phase epitaxy (LPE)
`Physical vapor deposition (PVD)
`Chemical vapor deposition (CVD)
`Doping
`Oxidation
`Resist processing
`Plasma processing
`
`Packaging
`Substrate cleaning
`
`Czochralski, floating zone, ~ridgman
`
`Examples
`
`evaporation, molecular beam epitaxy (MBE), sputtering
`low pressure CVD, organometallic CVD, laser CVD
`diffusion, ion implantation
`
`coating, baking, development
`plasma enhanced chemical vapor deposition (PECVD), plasma
`etching
`encapsulation, bonding
`
`CVD Polysilicon Gate /
`
`PlasmaCVD
`Phosphorus Silicate Glass
`
`~ Sputtered Al-Cu-Si Alloy
`
`CVD Silicon Oxide
`
`CVD Silicon Nitride
`
`n+
`
`p- substrate -----t------ Bulk crystal growth
`
`Fig. la. Metal oxide semiconductor field effect transistor (MOSFET) (after
`Douglas, 1980).
`
`Au
`AuZn
`lnP I Zn (p+) 0.2 microns
`lnP I Zn (p) 2.0 microns
`
`lnGaAsP
`lnP IS (n)
`
`0.2 microns
`2.0 microns
`
`Substrate
`lnP IS (n+)
`
`Au Ge
`Au
`
`MOC VD
`
`J Evaporation
`J
`J Bulk crystal
`J
`
`growth
`
`Evaporation
`
`Fig. lb.
`
`InGaAsP semiconductor laser (after Li, 1985).
`
`circuit involves a long sequence of the unit operations conducted in batch mode. The process com(cid:173)
`monly entails more than 30 individual steps (cf. Parrillo, 1983) and complex, advanced micropro(cid:173)
`cessors can involve as many as 200 steps. The ultimate measure of whether or not these have been
`done successfully is the performance of the final circuit.
`
`[005]
`
`Figure 2 illustrates a typical process sequence for a simple Si MOS structure. Metallurgical Si
`is refined by reacting it with HCl in a fluidized bed to chlorosilanes and then purifying one of
`them, typically SiHCl3 by distillation. High purity polycrystalline Si is subsequently grown from
`the SiHCl3 by chemical vapor deposition and then melted. Up to 0.25 m diameter boules of single
`crystal1ine Si are pulled from the melt, mostly by Czochralski crystal growth. The boules are cut
`into thin wafers, which are chemomechanically polished.
`Impurities ar~ removed from the near sur(cid:173)
`face region by "gettering processes ...
`
` Ex.1011 p.2
`
`

`
`Micro-reaction engineering applications of reaction engineering
`
`925
`
`Metallurgical silicon
`
`Silicon refining by
`distillation and CVD
`
`Bulk crystal growth
`
`Crystal slicing
`Wafer polishing
`Impurity gettering
`Wafer cleaning
`
`Oxidation
`
`Lithography
`Plasma etch
`
`Oxidation •
`
`LPCVD Polysilicon
`Lithography
`Plasma etch
`
`n+ doping by
`phosphorus diffusion
`or ion implantation
`
`LPCVD or PECVD
`reflow oxide
`
`Contact windows by
`lasma etch
`
`Sputter deposition
`of aluminium
`Plasma etch
`
`Phosphorus source
`
`i
`~
`~
`~
`~
`~
`
`LPCVD or PECVD of
`oxide I nitride passivation
`Plasma etch
`Bonding pads
`
`,
`....
`
`~
`
`\ •
`
`v
`
`~r
`
`Section
`
`Packaging
`Testing
`
`Fig. 2. Typical fabrication sequence for MOS technology.
`
`[006]
`
`[007]
`
`The MOS structure is constructed on the wafer utilizing 1-2 µm of the gettered subsurface region.
`First, a SiOz layer is formed by a gas solid reaction of Si with Oz (dry oxidation) or HzO (wet
`oxidation). An opening is defined in this layer by lithography, which involves coating the sur(cid:173)
`face with a radiation sensitive polymer resist. By exposing the resist to UV light through a
`mask, the exposed region is either made less soluble than the original resist by crosslinkages
`(negative resist) or it is made more soluble by chain scission (positive resist). After develop(cid:173)
`ment of the resist in a suitable solvent the remaining resist serves as a mask for transferring
`the pattern to the underlying oxide layer. This step is usually done by plasma etching.
`
`Next a gate oxide is grown by oxidation of the Si exposed by the 3i02 etch. The original field
`
` Ex.1011 p.3
`
`

`
`926
`
`KLAVS F. JENSEN
`
`[008]
`
`[009]
`
`[010]
`
`[011]
`
`oxide a1so thickens during this step. Next polycrystalline Si is grown as a gate material by low
`pressure chemical vapor deposition (LPCVD). Areas for source and drain are opened by lithography
`and plasma etching. Subsequently, the reexposed Si is doped with an n-type dopant (P or As) to
`form the source and drain regions. This can be done by either depositing a phosphorus oxide and
`diffusing P into the Si at high temperatures or by embedding P into the Si by ion implantation.
`The latter is the preferred technique today.
`
`LPCVD or plasma enhanced CVD is used to cover the whole device by a silicon oxide containing phos(cid:173)
`phorus and perhaps also boron oxides to obtain the required stress and reflow characteristics.
`The reflow smooths corners in the surface topography so that metal contact 1ines may be put down
`with reduced shadowing and thinning problems. Connections to the source, the gate and the drain
`are made by opening holes to the underlying Si through the use of lithography and plasma etching
`followed by sputter deposition of Al or Al-a1loy films. The metal film is then patterned, as the
`other thin film have been, by lithography and plasma etching. The final metallization pattern
`also acts as interconnections between devices on the die (chip).
`
`The final microcircuit is protected by a silicon oxide or nitride layer deposited by plasma en(cid:173)
`hanced CVD. Bonding pads are opened in this layer and the circuit is tested. The wafer is then
`diced and working circuits are encapsulated in ceramic or polymer packages.
`
`In order to realize current device structures with 1 µm minimum feature size and narrow junctions,
`the actual fabrication process is more complex than the one outlined in Fig. 2. For example,
`interdiffusion effects make it necessary to deposit a barrier between the Al metallization and Si.
`Additional and more difficult steps may be involved in compound semiconductor processing since
`these materials tend to decompose at e1evated temperatures and do not form a stable oxide with
`properties similar to SiOz. Unit operations, process sequences and device examples are described
`in a number of texts and tutorial papers (Chemla, 1985; Doane and coworkers, 1982; Ferry, 1985;
`Howes and Morgan, 1985; Ghandhi, 1983; Larrabee, 1985; Li, 1985; Meindl, 1978; Oldham, 1978;
`Suematsu, 1985; Sze, 1983).
`
`The unit operations have a number of common features of interest for reaction engineering analysis.
`They involve complicated gas phase and heterogeneous reactions in reactor geometries that are dif(cid:173)
`ficult to model. Since the manufacturing process is designed to produce identical microstructures
`with submicron accuracy in line widths, feature alignments, junction depths and etch trench pro(cid:173)
`files over a 150 mm diameter wafer, characteristic length scales differ by 5-6 orders of magni(cid:173)
`tude. The same situation arises in heterogeneous catalysis where the active catalyst material
`often is dispersed as 10 nm crystallites within a 10 mm particle. However, in many catalytic sys(cid:173)
`tems details of the microscopic behavior are not essential for prediction of reactor performance
`so a continuum description on the particle size scale may be used. The length scale issue is
`further complicatec in microelectronic systems by low operating pressures that imply that the mean
`free path is greater than the minimum feature size but less than the characteristic size of the
`equipment. Thus a Monte-Carlo simulation may be appropriate at the microscopic level while a con(cid:173)
`ventional continuum description is necessary for the macroscopic analysis. Orders of magnitude
`variations in characteristic time scales are also encountered either as a result of fast chemical
`reactions or large differences between transport and reaction rates. These length and time scale
`magnitude variations create numerical problems for the solution of reactor models by requiring
`finely meshed spatia1 discretizations and stiff ordinary differential equation solvers.
`
`[012]
`
`~icroelectronic processing involves high purity starting materials and well characterized single
`crystalline substrates, at least in the initial process step.
`Impurities on the ppm and even ppb
`in some compound semiconductor cases can drastically affect device performance. This poses prac(cid:173)
`tical difficulties but is advantageous for analysis. Surface reaction rates determined by single
`crystal surface studies are relevant to process studies and the reactor in1et fluid compositions
`are well defined. This is not the case in classical reaction engineering problems such as hydro(cid:173)
`desulfurization where the feedstock contains numerous poorly characterized substances and the re(cid:173)
`action mechanisms and rates are unknown except for a few model reactant species.
`In the following
`sections additional general issues as well as specific reaction engineering problems are addressed
`for the unit operations in Table 1. Particular emphasis will be given to chemical vapor deposi(cid:173)
`tion and plasma processing.
`
`CRYSTAL GROWTH
`
`Starting Materials
`
`[013]
`
`Silicon refining starts with metallurgical Si (98% Si) which is reacted with HCl in a fluid bed
`reactor in the presence of a catalyst to fonn a mixture of chlorosilanes. The SiHCl3 fraction is
`purified by distillation and reduced with H2 to polycrystalline Si by chemical vapor deposition
`(CVD) on resistively heated Si rods in a so-called Siemens decomposer. The result is electronic
`grade polycrystalline Si with impurity levels in the sub ppb range. The refining process clearly
`involves classical chemical engineering unit operations except for the CVD of polycrystalline Si.
`Detailed analysis of the Siemens decomposer is difficult because of complex flow and temperature
`distributions, but Lai and coworkers (1985) have gained some insights into the overall reactor
`performance by using a CSTR model. The fundamental issues in this and other CVD systems will be
`discussed in a later section.
`
`[014]
`
`Since the Siemens process is an electric power, equipment and labor intensive semi-batch process,
`
` Ex.1011 p.4
`
`

`
`Micro-reaction engineering applications of reaction engineering
`
`927
`
`there has been considerable interest in replacing it with a continuous production scheme that
`would convert SiH4 into Si powder by gas-phase nucleation and particle growth. This powder could
`then be fed directly to the single crystal growth stage without exposure to the atmosphere and
`grinding equipment, reducing the chance of contamination. Early work on this so-called free-space
`reactor was done by Levin (1980) and Lay and lay (1981). However, since SiH4 readily nucleated in
`the gas phase and the residence time was too short for significant growth by Brownian coagulations,
`the reported Si particle sizes were submicron.
`
`[015]
`
`[016]
`
`[017]
`
`The practical and fundamental issues involved in designing an aerosol process for growing suffi(cid:173)
`ciently large particles (- 10 µm) for efficient collection have been investigated extensively by
`Flagan and coworkers (Alam and Flagan, 1984, 1986; Flagan, 1984; Wu and Flagan, 1985). They pro(cid:173)
`pose to generate seed particles by homogeneous nucleation of the reaction products of SiH4 and
`then increase the size of the particles by chemical vapor deposition. The latter step has to be
`done at a slow enough rate that transport of reactants to the particle surface prevents signifi(cid:173)
`cant supersaturation from occurring. Thus, reaction engineering analysis is necessary to under(cid:173)
`stand the role of the various rate processes and identify conditions under which large particles
`can be grown. Alam and Flagan (1984, 1986) have addressed some of the nucleation issues, but
`questions still remain in the kinetics of nucleation and particle growth by CVD as well as in the
`coupling of these with physical transport processes within the reactor.
`
`Growth of Si particles from SiH4 or SiHCl3 in a fluidized bed reactor is also a potential con-
`f igu ratian far continuous production of Si powder.
`In this reactor the particles grow by sca(cid:173)
`venging small particles produced by homogeneous nucleation and by CVD. Material purity is an
`issue because of the contamination from reactor walls and internals as well as from possible low
`purity seed particles fed to the reactor (Alam and Flagan, 1986). The system has been studied
`experimentally by Hsu and coworkers (1984) and Lai and coworkers (1986) have recently formulated
`two models for the fluidized bed reactor with simultaneous CVD and agglomeration of Si fines from
`homogeneous nucleation.
`
`In comparison ta Si production there has been little work an continuous refining of starting
`materials for compound semiconductor crystal growth. The main driving force far Si has been the
`reduction of materials cost for solar cell applications. This has not been an issue for GaAs and
`related compound semiconductors, which are produced in much smaller quantities than Si. Further(cid:173)
`more, the crystal quality is difficult to control (cf. Hawes and Morgan, 1985; Gatos and Lagowski,
`1983). Therefore, compounds such as GaAs are produced by direct reaction of batch refined consti(cid:173)
`tuents, e.g. pure Ga and As. The reaction is exothermic and complicated by widely differing vapor
`pressures of the individual constituents (cf. Ghandhi, 1983, p.82; ~owes and Morgan, 1985).
`
`Bulk Crystal Growth from the Melt
`
`[018]
`
`Although bulk crystal growth from the melt does not involve chemical reactions per se, it is worth(cid:173)
`while to include a short discussion of this process for completeness. Moreover, crystal growth
`analysis involves the same type of physical transport models that are needed for reactor studies.
`In fact, the use of detailed flow and energy computations in crystal growth modelling, notably by
`Brown and Crochet and their respective coworkers, could serve as an example for more consideration
`of flow phenomena in chemical reaction engineering. This is the topic of a companion paper by
`Crochet (1986) in this issue. Since there is voluminous literature on crystal growth and the
`field is very active, only key references pertinent to the present review will be included.
`
`[019]
`
`There are three major bulk crystal growth processes: Czachralski, floating zone, and Bridgman
`(Foster, 1977; Grabmaier, 1981; Pamplin, 1975). These are illustrated schematically in Fig. 3.
`
`Float zone processing
`
`Bridgman refining process
`
`Czochralski
`crystal growth
`
`_._ ___ Feed rod
`
`Heating
`element
`
`Graphite
`heat shield
`
`Heaters
`
`0
`0
`0
`
`Melt
`
`• • •
`• • •
`
`Pedestal
`
`• • • • • • •
`
`Quartz
`liner
`
`+---- Single crystal
`
`l
`
`Fig. 3. Crystal growth techniques.
`
`• • • •
`• • • • • • •
`
`: • • • • • • • • • •
`
`• • • • • • • • • • • •
`
`: • • • • • • • • • •
`
`zone
`
`T Hot
`+ Adiabatic
`zone t Cold
`zone l
`
` Ex.1011 p.5
`
`

`
`928
`
`KLAVS F. JENSEN
`
`[020]
`
`[021]
`
`[022]
`
`[023]
`
`[024]
`
`[025]
`
`Czochralski is widely used to grow Si crystals and a modification, liquid encapsulated Czochralski
`(LEG), is a promising technique for growing compound semiconductors (Derby, 1986; Foster, 1977).
`Floating zone is useful for highly reactive materials and for reducing impurities in grown crys(cid:173)
`tals while Bridgman is predominantly a means of production for compound semiconductors.
`
`In Si Czochralski growth, a large single crystal, a boule, is slowly pulled from the melt as
`illustrated in Fig. 3(a) (Pearce, 1983). The temperature gradient driving the solidification is
`maintained by a cooler ambient above the crystal. The doping concentration (if any) and the crys(cid:173)
`tal diameter must be tightly controlled since this portion eventually will be sliced into single
`crystal wafers for IC manufacture. The shape of the crystal is determined by the tri-junction of
`the crystal, melt and ambient, i.e. the shape of the meniscus directly affects the diameter and
`dopant distribution of the growing crystal (Derby, 1986).
`
`Gains in process understanding, modelling, and control have led to large increases in Si boule
`diameters during the past two decades. The standard size was 40 mm in 1965.
`150 mm wafers are
`common today and 200 mm wafers are expected to dominate in the early 1990's (Larrabee, 1985).
`However, problems remain in the growth of compound semiconductors, such as GaAs and InP, where the
`partial pressure of the group V species over the melt is so high (0.9 atmospheres for As, 20 atmo(cid:173)
`spheres for P (Richman, 1963) that the stoichiometric ratio cannot be maintained in conventional
`Czochralski growth. An inert encapsulant, typically B203 is necessary to prevent the escape of
`components from the melt. The crystal is then pulled through the encapsulant, which considerably
`complicates the analysis (Derby and coworkers, 1985).
`
`A large number of models of Czochralski growth exist ranging from empirical pull rate - crystal
`diameter relations (e.g. Kim and coworkers, 1983) to detailed finite element analysis of tempera(cid:173)
`ture distributions in melt, crystal and encapsulant in GaAs LF.C growth (Derby et al., 1985; see
`Derby, 1986 for a review). Srivastava and coworkers (1985, 1986) model the temperature distribu(cid:173)
`tion in Si crystal and melt with special attention to the description of radiative heat transfer
`to the surroundings. Derby and coworkers (1985) address the LEG of GaAs predicting temperature
`distributions in the crystal, melt and encapsulant while solving for the free interfaces:
`encapsulant-ambient, encapsulant-GaAs melt and GaAs crystal-melt. Computations of the free con(cid:173)
`vective flows in the melt have been reported by Crochet and coworkers (1983b), Kobayashi (1978)
`and Langlois and Shir (1977), among other researchers. ~ecent papers by Derby and Brown (1986a,b)
`demonstrate how detailed models may be used to develop processing strategies. Similar efforts
`would be useful in traditional chemical reaction engineering areas.
`
`The basic concept in floating zone crystal growth is that a refined, single crystal is pulled from
`a small molten zone at the end of a relative long rod of feed material as illustrated in Fig. 3(b)
`(Grabmaier, 1981; Shaw, 1975; Gill and coworkers, 1985). The molten zone, commonly generated by
`radio frequency induction heating, is kept in place by surface tension forces balancing the gravi(cid:173)
`tational field. This limits the diameter of the crystal and the length of the zone. Therefore,
`there have been considerable interest in micro-gravity floating zone experiments. ~uoyancy and
`surface tension gradient driven recirculating flows are present in the melt.
`In addition, flows
`are also induced by differential rotation of seed and product rods. This rotation is used to im(cid:173)
`prove the uniformity of the effective segregation coefficient across the growth surface and thus
`minimize radial composition variations in the crystal.
`
`As in the case of Czochralski growth, only a few key examples of the many investigations of float(cid:173)
`ing zone are given here. Coriell and Cordes (1977) have analyzed the shape and stability of the
`molten zone, while Kobayashi and Wilcox (1982) have simulated flow patterns generated by crystal
`and feed rotation. Kobayashi (1984) has also computed the steady surface tension gradient driven
`flows (Marangoni convection) for conditions of low gravity.
`In the presence of high fluid rota(cid:173)
`tion, the forced convection is predicted to dominate the core of the zone while Marangoni effects
`are confined to a thin layer next to the free surface. Harriott and Brown (1984) have used finite
`element analysis to further consider the effect of differential rotation on the radial solute dis(cid:173)
`tribution. Their results demonstrate that radial non-uniformity in crystal composition is most
`severe when the rate of recirculation is of the same order of magnitude as the rate of crystal
`growth.
`
`In the Bridgman technique a temperature gradient is established along a crucible so that melt ex(cid:173)
`ists next to a seed crystal. Then by moving the seed relative to the furnace a single crystal may
`be solidified from the melt. The technique is a major means of compound semiconductor production
`(Goodman, 1974). Both horizontal and vertical configurations are used. Crochet and coworkers
`(19L3a) have developed a two-dimensional model for the horizontal system and demonstrated the
`influence of thermal convection cells on the crystal growth process. The most recent models of
`vertical crystal growth have been reported by Brown and Carlson with their respective coworkers
`(Bourret and coworkers, 1984; Carlson and coworkers, 1984; Chang and Brown, 1983; Chin and Carlson,
`1983). Buoyancy induced convection in vertical Bridgman growth may be driven by density differ(cid:173)
`ences caused by either temperature or composition gradients. When the melt is positioned below
`the seed crystal, the hottest and thus least dense melt is at the bottom of the ampoule, which is
`a destabilizing situation. The axial temperature gradient is stabilizing in the reverse geometry,
`but radial temperature gradients may still drive convection. The occurrence of recirculating
`flows and their influence on the dopant segregation have been analyzed in detail by Chang and
`Brown (1983). Segregation during solidification causes the solute to either accumulate or be
`depleted in the melt adjacent to the growth interface. The resulting density gradient can also
`provide a driving force for convection. This may be an important effect in the growth of compound
`semiconductors with large liquidus-solidus separation (Bourret and coworkers, 1984).
`
` Ex.1011 p.6
`
`

`
`Micro-reaction engineering applications of reaction engineering
`
`929
`
`[026]
`
`The crysta1 growth models discussed above have addressed macroscopic variations in melt and
`crysta1 composition. However, precise control of the microscopic structure, e.g. point defects
`and dis1ocations, is essential for microelectronic device fabrication. Constitutional supercoo1-
`ing is one of the c1assica1 problems in crysta1 growth where the planar solidification front of
`a binary a1loy 1ooses stability resu1ting in cellular and dendritic growth. Mullins and Sekerka
`(1964) pioneered linear stability ana1ys1s of the p1anar me1t-crysta1 interface and a variety of
`situations have since been examined (De1ves, 1975). Recently, Ungar and Brown (1984a-d) have used
`bifurcation analysis to track the deve1opment of sma11 undu1ations in the interface to deep cel1s
`resemb1ing dendrites. This combination of microscopic and macroscopic modelling will become in(cid:173)
`creasingly important in materials processing, especially in microelectronics applications.
`
`CHEMICAL VAPOR DEPOSITION
`
`Genera1 Process Consideration
`
`[027]
`
`Chemical vapor deposition is perhaps the microelectronic fabrication process that lends itself
`most easily to chemical reaction engineering analysis. As the name indicates, chemically reactir.g
`gases are used to synthesize a thin solid film. Homogeneous as well as heterogeneous reactions
`may be involved in the film growth. The high temperatures, intricate gas phase chemistry and com(cid:173)
`p1ex flow fields in CVD are related to those found in combustion and there are obvious similari(cid:173)
`ties between gas-solid reactions in CVD and heterogeneous catalysis. The chemical reactions
`involved in CVD distinguishes it from physical deposition processes, such as sputtering and evap(cid:173)
`oration. They also impart versatility and throughput capabi1ity to the technique. Consequently,
`it has been used to deposit a wide variety of thin films with good control of composition, surface
`morphology, thickness, and step coverage. CVD and related thin film deposition processes are
`reviewed in a number of books and survey papers (Bunshah, 1982; Hess and coworkers, 1985; Maissel
`and Glang, 1970; Vossen and Kern, 1978).
`
`[028]
`
`The energy required to drive the CVD reactions is usually supplied thermally, but photons or elec(cid:173)
`tric discharges (plasmas) are also used. The latter technique will be described in a separate
`section on plasma processing. CVD may operated at a wide range of pressures and temperatures.
`Atmospheric to slightly reduced pressures (approximately 10-100 kPa) are used primary in CVD of
`epitaxia1 (i.e. single crystalline) films of Si and compound semiconductors. Low pressure CVD
`(LPCVD) (approximately 100 Pa) is the main production tool for polycrystalline Si, dielectric and
`passivation films used in Si IC manufacture. Examples of common CVD processes and operating con(cid:173)
`ditions are given in Table 2.
`
`TABLE 2 Examples of CVD Systems
`
`Overall Reaction
`
`Pressure and
`
`Temperatures
`
`SiH4-xClx + Hz + Si + xHCl, x
`
`0,2,3,4
`
`10-100 kPa
`
`1050-1450 K
`
`SiH4 + Si + 2Uz
`SiH4 + NzO + SiOz + Nz
`SiHzClz + NH3 + Si3N4
`WF6 + Hz + W + HF
`
`100 Pa
`100 Pa
`100 Pa
`100 Pa
`
`100 kPa
`
`100 kPa
`
`850-950 K
`900-1000 K
`1000-1100 K
`500-700 K
`
`800-1100 K
`
`800-1100 K
`
`System
`
`Si Epitaxy
`
`LPCVD
`
`Vapor Phase Epitaxy (VPE)
`Halide process
`
`Hydride process
`
`6GaAs + 6HC1 * As4 + Asz + 6GaCl + 3Hz
`6AsCl3 + 9Hz + As4 + Asz + 18HC1
`2HC1 + ZGa + 2GaCl + Hz
`12GaCl + 4AsH3 + ZAsz + As4 * 12GaAs
`+ 12HCl
`
`Metalorganic CVD (MOCVD)
`
`Ga(CH3)3 + AsH3 + GaAs + CH4
`Ga(CH3)3 + Alz(CH3)6 + AsH3
`->- AlxGa1-xAs
`+ CH4
`
`10-100 KPa
`10-100 KPa
`
`800-900 K
`800-1000 K
`
`Plasma enhanced CVD (PECVD)
`
`SiH4 ·> a-Si:H
`SiH4 + NH3 + SixNy:H
`
`Photon assisted CVD
`
`SiH4 + NzO + hv/Hg + SiOz
`In(CH3)3 + P(CH3) + hv + InP
`
`100 Pa
`100 Pa
`
`O. 1-1 kPa
`0.1-1 kPa
`
`300-600 K
`400-700 K
`
`300-600 K
`600 K
`
`[029]
`
`Metalorganic CVD (MOCVD), a1so called organometallic vapor phase epitaxy (OMVPE), has attracted
`considerable attention because it allows the synthesis of thin, high purity, epitaxial films of
`compound semiconductors for new optoe1ectronic and high speed electronic devices. By varying the
`constituents and their concentration in the semiconductor, it is possible, in principle, to obtain
`lasers and sensors with wavelengths ranging from the visible to the far infrared. These optoelec(cid:173)
`tronic components play a key role in optical communication, storage and computing as well as in
`
` Ex.1011 p.7
`
`

`
`930
`
`KLA VS F. JEN SEN
`
`defense systems. The growth technique is reviewed by Dapkus (1982), Dupuis (1984) and Ludowise
`(1985) while Chemla (1985), Li (1985) and Suematsu (1985) provide examples of the device applica(cid:173)
`tions. Vapor phase epitaxy (VPE) is well developed alternative to MOCVD for CVD of compound semi(cid:173)
`conductors starting from the hydrides and halides of the individual components (Olsen, 1985).
`However, the high reactivity of AlCl3 makes it difficult to deposit Al containing films by VPE.
`This is a serious restraint since many devices utilize AlGaAs/GaAs structures (Hess and coworkers,
`1985).
`
`CVD Reactors
`
`[030]
`
`Figure 4 illustrates the major CVD reactor configurations used in the fabrication microelectronic
`and optoelectronic components. The horizontal reactor is a classical configuration which is now
`only used in research and in compound semiconductor epitaxial growth along with the vertical reac(cid:173)
`tor (Ludowise, 1985; Olsen, 1985). The barrel reactor is the primary means of Si epitaxy (Cullen
`and coworkers, 1983; Carboy and Pagliaro, 1983) and small barrels are beginning to be employed in
`GaAs technology (Tandon and Yeh, 1985). The reactors are operated at atmospheric or slightly
`reduced pressures (- 10 kPa). Lowering of the pressure is used in Si processing to decrease auto(cid:173)
`doping and pattern shift (Cullen and coworkers, 1983) and in MOCVD to improve interface abruptness
`between semiconductor layers (Duchemin, 1981). Reactor walls are cooled, except in VPE applica(cid:173)
`tions. This minimizes particulate and impurity problems caused by deposition on the walls, but it
`also creates large thermal gradients inducing complex, buoyancy driven secondary flows.
`In hori(cid:173)
`zontal and barrel reactors, the susceptor is tilted relative to the main flow direction to improve
`film uniforruity along the length of the susceptor. Uniformity is further controlled in the barrel
`reactor by adjusting inlet gas nozzles and spinning the barrel (Carboy and Pagliaro, 1983).
`In
`vertical reactors, the susceptor is often rotated to reduc