`
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`Edited by
`S. NI. Sze
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`Ex.1020 p.2
`
`
`
`This book was set in Tints Roman by Izzfommaxiun Sciences C0:p0ra.:i0n.
`The editors vuere'T. Michael Slaughter and .\-Iadclain: Eichbarg:
`the production supmi.~.ur was Lcr0_ \. Young.
`The cover was designed by Jmcph (J .
`.
`Th: drawings. were done by Bell l..eibur;mrics. incorponimi.
`Halliday Lithograph Curpm-.al':nn was pnme: and bi.-.;lcr.
`
`VLSI TECHNOLOGY
`
`Cupyrigh “Q 1933 by Bell T;-lcphonc Laborawrien. Incn1~.nr.-izcd. All rig‘r.L~. n:.s<:."u.‘('.. Primed in
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`.-\-.1 or
`1976. no pan of this publicalzon .-my be reproduced or dianibuzcd in u::_v fur-:. nr h_~.' :m_\
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`-.-.-nhnu: the prior xv.-.n:-n permission of Bull Talc-
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`
`L-'3:i56'FR.9()H.-‘\LHALS9S76S4
`
`ISBN CI-D?-Dl=El=&L=-3
`
`Library of Congress Oatalogiiig ix: Puhlication Data
`IN-Iain entry under title:
`VI SI (ethnology.
`
`(.\1cGr4w-Hail series in electrical cnginccring.
`Elommnics and electronic cin:uit<i
`Includcs index.
`
`Inzegrared cim-u;ts—V’ciy large mu:
`1.
`inlzgn-itzon
`I. Sze. S. M.. datc
`II. Series.
`19543
`Ti(73':'4.\«’566
`ISBN 04)?-062686-3
`
`6”} .38! ‘?3
`
`Ex.1020 p.3
`
`
`
`CHAPTER
`
`EIGHT
`
`DRY ETCHING
`
`C. J. MOGAB
`
`SJ INTRODUCTION
`
`ist pattems defined by the lithographic techniques described in Chapter 7 are not
`.
`tcrmanent elements of the final device but only replicas of circuit features. To pro~
`;;:e circuit features. these resist patterns must be transferred into the layers compris-
`ig the device. One method of trunsfening the pattems is to selt:ctively remove
`-2‘.3Zl21Si'(€(I portions of a layer. a process generally known
`etching.
`As the title of this chapter suggests. "dry etching" methods are particularly suit-
`zbie for VLSI processing. Dry etcliing is syntiriyrrrous with plasma-assisted etching’
`-~'nic':t denotes several‘ techniques that use plasmas in the form of low-pressure gas-
`:3us discharges. These techniques are commonly used in VLSI processing because of
`2-eeir putcttlial for very—liigh-fidelity transfer of resist pattems.
`The earliest application of pi:lSIT.aS to silicon lCs dates back to the late 19605.
`«hen oxygen plasmas were being explored for the stripping of pi't0t0t'esi5ts.: Work on
`:;-it- use of plasmas for etching silicon was also initiated in the late 1960s and was sig-
`naled hy a patent} detailing the use of Cf-‘,—0;
`mixtures. At that time. there was
`-in universal endorsement of dry methods which were largely novel replacements for
`e\isting wet chemical lccliniqttcs.
`This early work set the stage for an important period in the evolution of [C tt:t:h—
`rzulog}-‘. From 1972 to 1974. workers at several major laboratories were heavily
`:nvulveL'i iii the d$\'€lUpmClll of an irtorganic pa.ssi\-‘utiort layer for .\'IOS devices. The
`jarctcrrcd passivutitin turned out to be a plasma-deposited silicon nitride layer. While
`:':tis material exhibited many desirable characteristics. there was one immediate diffr-
`;ult_v. No suitable net chemical etchant could be found to etch windows in the nirrjdc
`zn order to
`underlyirtg metallization for subsequent bonding. This problem
`
`303
`
`Ex.1020 p.4
`
`
`
`304 VLSI TT_Cl-{XOl_OC:Y
`
`was circumvented by the use of CF;-O3 plasma etching.‘ Concurrently. CF; —O_~
`plasma etching_ was developed for patterning CVD silicon nitride layers being used as
`junction seals.’ These efforts marked the first significant applications of plasma etch-
`ing in IC manufacture and the beginning of li1TgL'—.\'Clll<3 etlotts to develop plasma etch-
`ing techniques.
`Not long after this. an awareness of the potential of plasrna techniques for highly
`anisotropic etching evolved.
`In particular. there were many observations of a vertical
`etch rate that greatly exceeded the lateral etch rate when etching through a layer of
`material.
`will become apparent. anisotropy is necessary for high-rcsoiulittn pat-
`tern transfer. The s-ignit"ieancc of etch anisotropy was recognized by researchers who
`were hoping to achieve ever larger scales of integration by designing circuits with
`ever smaller features. By the mid—19?(ls. t'nerefore. rnost major IC manufacturers hail
`mounted substantial efforts to develop plassna-assisted etching methods. These
`methods were no longer seen as merely novel substitutes for wet etching. but rather as
`techniques having capabilities uniquely suited to meeting forseeable requirements on
`pattern transfer.
`
`8.2 PATTER.l\' TRANSFER
`
`"Pattern transfer" refers to the transfer of a pattern. tlcfinetl by a masking layer. into
`a film or substrate by chemical or physical methods that produce surface relic-l‘.
`
`8.2.1 Subtractive and Additive Methods
`
`la. the film is tlcpositeti
`In the .mbrracm~e method of pattern transfer shown in Fig.
`first. a patterned masking layer is then generated litnograpitically. and the unmasketi
`portions of the film are removed by etching.
`In the ua’di':i'n» tor lift-offi metho:
`shown in Fig.
`lb. the lithographic mask is generated first. the film is then deposited
`over the mask and substrate. and those portions of the film over the mask are I'&tI‘l0V€C
`by selectively dissolving the masking layer in an appropriate liquid so that the overly-
`ing film is lifted off and removed.
`The subtractive methods collectively known as dry etching are the preferred
`means for pattem transfer in VLSI processing today. The lift-off process is capable of
`high resolution. but is not as widely applicable as dry etching.
`
`8.2.2 Resolution and Edge Profiles in Subtractive Pattern Transfer
`
`The resolution of an etching process is a rneasure of the fidelity of pattem transfer.
`which can be quantified by two parameters. Bias is the difterenee in lateral dimen-
`sion between the ezched image and the mask image. defined as shown in Fig. 2
`Tolerance is a measure of the statistical distribution of bias values that characterize~
`the lateral uniformity of etching.
`
`Ex.1020 p.5
`
`
`
`DRY ETCHL\’G 305
`
`"5
`suasr-7:1:
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`LITHC-'..‘-R-’AP.-(Y T
`‘:
`suas*m-.r:
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`
`,
`‘
`
`3E°OsIr—~;'II
`
`Fig.
`
`l Suitcmzali.‘iJJ'.;aIl'aIzulI><Ir¥z:I>.;i:-Zr;Lc11wand-Ch;L:;iilI?I'.'::1):Ih1xJsnfp;merI)lruns.ix:r.
`
`A zcm~bia.~: pl‘0CL‘.\‘.~' produces a vefiitai edge profilu coincident with the edgc of
`1:: :nu:~3-<. as shown in Fig. 3:1.
`In this case. there is no etching in Ihc lateral direction
`:6 the paztcm is tran.~;fcn'cd with perfect fidelity. This casc represents the extreme of
`.‘.".'V(lIf()[)ir‘ etching. When the xjenicul and lateral clch rates an equal or. more: pre-
`_-~.-ly. when the nxch ratc :~ mdepcnticn: of direction. the cdge profile appears as a
`.‘.'.::1cr-circlc after etching has bccn curried just to completion. as shown in Fig. 3b.
`:his case of z'5o!ropi(' etching. the bias i.~. twice til: fnim thickness.
`
`'J.‘..'rC .1?" rice un‘.nu"l l‘._\ -vhzch :5: .-Lu}-.«:<.l film ..'nd.-.'n.'ul\ '..'.C iiwsk ul (Etc ir.4.~">:-film
`
`Ex.1020 p.6