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UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`INTEL CORPORATION, GLOBALFOUNDRIES U.S., INC.,
`MICRON TECHNOLOGY, INC. and
`SAMSUNG ELECTRONICS COMPANY, LTD.,
`Petitioners,
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`v.
`
`DANIEL L. FLAMM,
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`Patent Owner.
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`PTAB Case No. IPR2017-002821
`Patent No. RE40,264 E
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`REPLY DECLARATION OF DR. JOHN BRAVMAN IN SUPPORT OF PE-
`TITION FOR INTER PARTES REVIEW OF U.S. PATENT NO. RE40,264
`AND REPLY TO PATENT OWNER’S RESPONSE
`(Claims 56-63 and 70-71)
`
`
`
` 1
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` Samsung Electronics Company, Ltd. was joined as a party to this proceeding via a
`Motion for Joinder in IPR2017-01752.
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`TABLE OF CONTENTS
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`Page
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`I.
`II.
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`Introduction ..................................................................................................... 1
`Responses to Arguments Raised by Dr. Flamm ............................................. 3
`A.
`The ’264 patent ..................................................................................... 3
`B.
`Kadomura ............................................................................................. 4
`C. Matsumura ............................................................................................ 9
`D. Kadomura and Matsumura rendered claims 56 and 60 obvious ........ 13
`E.
`Kadomura, Matsumura, and Wang rendered claim 60 obvious ......... 30
`F.
`Kadomura, Matsumura, and Muller rendered claim 57 obvious ....... 32
`G. Kadomura, Matsumura, Kikuchi, and Wang rendered claim 63
`obvious ............................................................................................... 39
`H. Muller, Matsumura, and Wang rendered claim 60 obvious ............... 44
`I.
`Muller, Matsumura, Kikuchi, and Wang rendered claim 63
`obvious ............................................................................................... 48
`III. Conclusion .................................................................................................... 52
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`-i-
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`I. Introduction
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`
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` My name is John Bravman. I have been retained in the above-1.
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`referenced inter partes review proceeding by Petitioners to evaluate United States
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`Patent No. RE40,264 (the “’264 patent”) against certain prior art references, in-
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`cluding U.S. Patent Nos. 6,063,710, 5,151,871, 5,226,056, 5,605,600, and
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`4,992,391, as well as the knowledge of a person of ordinary skill in the art at the
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`time of the purported invention, including as demonstrated by various state of the
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`art references. I submitted the Declaration of Dr. John Bravman in Support of Pe-
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`tition for Inter Partes Review of U.S. Patent No. RE40,264 in this matter (“Open-
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`ing Declaration,” Ex. 1006) in connection with Petitioners’ Petition for Inter
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`Partes Review of U.S. Patent No. RE40,264 (“Petition”) seeking review of claims
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`56-63 and 70-71 of the ’264 patent. Since then, the Patent Trial and Appeal Board
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`(“PTAB” or “Board”) has instituted review of all challenged claims.
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`2.
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`Patent Owner Daniel L. Flamm (“Dr. Flamm”) recently filed a Patent
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`Owner’s Response to the Petition (“Response,” Paper No. 13). I have reviewed the
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`Response and its exhibits. I have also reviewed documents relating to IPR2016-
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`01510, IPR2016-01512, and IPR2017-01072, which concern claims in the ’264 pa-
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`tent. I now submit this Reply Declaration in support of Petitioners’ Reply to ad-
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`dress arguments raised by Dr. Flamm in the Response and in the Declaration of
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`Daniel L. Flamm in Support of Patent Owner’s Response (“Flamm Declaration,”
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`- 1 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
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`Ex. 2001). As described below, it remains my opinion that each of the challenged
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`claims is rendered obvious by prior art references that predate the priority date of
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`the ’264 patent. I am prepared to testify about my opinions expressed in my Open-
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`ing Declaration and in this Reply Declaration.
`
` My Opening Declaration describes my qualifications, materials I re-
`3.
`
`viewed for this matter, and my opinions on issues such as background relating to
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`the ’264 patent and the challenged claims, the level of ordinary skill in the relevant
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`technical art at the time of the alleged invention, the priority date of the ’264 pa-
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`tent, the state of the prior art at the time of the alleged invention, and claim con-
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`struction issues relating to the ’264 patent. (Opening Declaration at ¶¶ 2-54 (Ex.
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`1006)) It is my understanding that the Response does not challenge my qualifica-
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`tions or my opinions relating to the level of ordinary skill in the relevant technical
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`art at the time of the alleged invention and the priority date of the ’264 patent. I
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`also discussed in my Opening Declaration my understanding of the legal standards
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`relating to invalidity, background relating to prior art references, how the prior art
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`disclosed what is claimed in the ’264 patent, and why a person or ordinary skill in
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`the art at the time of the alleged invention would have combined different prior art
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`references. (Opening Declaration at ¶¶ 55-274 (Ex. 1006))
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`4.
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`I note that the claims of the ’264 patent are lengthy and recite numer-
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`ous conventional elements that existed in the prior art and that Dr. Flamm does not
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`- 2 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
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`purport to have invented. The number of references used in combination to chal-
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`lenge the validity of claims of the ’264 patent is a consequence of Flamm’s deci-
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`sion to seek claims that recite numerous conventional prior art elements that were
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`well known at the time of the alleged invention.
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`II. Responses to Arguments Raised by Dr. Flamm
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`A. The ’264 patent
`
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`5.
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`As noted in my Opening Declaration, the ’264 patent relates to meth-
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`ods for semiconductor processing where a substrate is processed at two tempera-
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`tures. (Opening Declaration at ¶ 43 (Ex. 1006)) The ’264 patent purports to de-
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`scribe a novel method for employing a sequence of wafer processing steps at dif-
`
`ferent temperatures where the temperature is changed while the wafer remains on
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`the same substrate holder during the processing steps. (’264 patent at Fig. 10,
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`18:22-26, 18:54-57 (Ex. 1001); Opening Declaration at ¶ 45 (Ex. 1006))
`
`
`6.
`
`Dr. Flamm acknowledges that methods involving the use of various
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`temperatures for manufacturing semiconductors were known in the prior art that
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`predates the ’264 patent. (Response at 3 (Paper No. 13); Flamm Declaration at
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`¶ 10 (Ex. 2001)) The Response characterizes the supposed innovation of the ’264
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`patent as describing temperature changes within a preselected time period in a
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`manner not previously disclosed in the prior art. (Response at 1-3 (Paper No. 13);
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`Flamm Declaration at ¶¶ 9-10 (Ex. 2001)) As explained in my Opening Declara-
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`- 3 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`tion and as further explained below, however, it was known in the prior art to per-
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`form multi-temperature semiconductor processes where a substrate’s temperature
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`was changed “within a preselected time [period].”
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`7.
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`For example, Matsumura disclosed preprogramming a controller with
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`semiconductor processing recipes that changed substrate temperature “within a
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`preselected time [period],” as explained in my Opening Declaration. (Opening
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`Declaration ¶¶ 144-146, 151 (Ex. 1006); Matsumura at Figs. 8, 9 (Ex. 1003)) And
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`as further explained, it would have been obvious to combine Kadomura and
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`Matsumura to apply Matsumura’s teachings in Kadomura’s system. (Opening
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`Declaration ¶¶ 76-81, 147-152 (Ex. 1006))
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`B. Kadomura
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`8.
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`
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`Dr. Flamm characterizes Kadomura as being directed to a “cryogenic
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`etching process.” (Response at 3-7 (Paper No. 13); Flamm Declaration at ¶¶ 11, 13
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`(Ex. 2001)) I disagree. In addition, Dr. Flamm does not fully describe the objec-
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`tives of the system taught in Kadomura.
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`9.
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`In my Opening Declaration, I discussed Kadomura at length. (E.g.,
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`Opening Declaration at ¶¶ 59-68, 125-212 (Ex. 1006)) Specifically, I identified
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`Kadomura’s disclosure of three separate embodiments, each directed to plasma
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`etching with temperature control, where different portions of films are etched at
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`different temperatures. (Opening Declaration at ¶¶ 63-65 (Ex. 1006); Kadomura at
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`- 4 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`6:1-10:62 (Ex. 1005)) In the first embodiment, Kadomura disclosed processing a
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`polycide layer by etching a portion of a polysilicon layer at 20ºC, followed by
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`etching the remaining portion of the polysilicon layer and a silicide layer at -30ºC.
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`(Opening Declaration at ¶ 63 (Ex. 1006); Kadomura at 6:5-29, 6:63-7:7 (Ex.
`
`1005)) In the second embodiment, Kadomura disclosed etching a silicon dioxide
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`layer at -20ºC, followed by overetching the remaining silicon dioxide layer
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`at -50ºC. (Opening Declaration at ¶ 64 (Ex. 1006); Kadomura at 8:5-16, 8:51-64
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`(Ex. 1005)) In a third embodiment, Kadomura disclosed etching a polysilicon lay-
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`er at -30ºC, followed by an overetching step on the polysilicon layer at 50ºC.
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`(Opening Declaration at ¶ 65 (Ex. 1006); Kadomura at 9:54-62, 10:17-27 (Ex.
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`1005)) Kadomura disclosed it was beneficial to quickly change the temperature
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`between etching steps (within about 30 or 50 seconds) so that the temperature
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`change occurred within the time period required to exchange the etching gases.
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`(Opening Declaration at ¶ 68 (Ex. 1006); Kadomura at 6:52-55, 8:40-50, 10:11-16
`
`(Ex. 1005))
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`10.
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`
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`I also explained how Kadomura disclosed details of a proposed etch-
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`ing apparatus in which the in-situ multi-temperature processes would be per-
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`formed. (Opening Declaration at ¶¶ 66-67 (Ex. 1006); Kadomura at Figs. 4-5,
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`11:14-12:48 (Ex. 1005)) Specifically, Kadomura disclosed an etching apparatus
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`that included an electrostatic chuck to support the wafer 12, a thermocouple to
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`- 5 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`sense the wafer’s temperature 18, and a feedback controller that included a PID
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`controller. (Opening Declaration at ¶ 66 (Ex. 1006); Kadomura at 11:36-59,
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`12:37-48 (Ex. 1005)) Kadomura also disclosed that the apparatus had a heater in
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`the chuck and a cooling system that was used to cool the wafer. (Opening Declara-
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`tion at ¶ 67 (Ex. 1006); Kadomura at Fig. 4, 11:42-59 (Ex. 1005))
`
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`11.
`
`I disagree with Dr. Flamm’s statement that Kadomura is directed to a
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`“cryogenic etching process.” Kadomura does not use the term “cryogenic.” In my
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`opinion, “cryogenic etching” refers to etching that is performed at extremely low
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`temperatures. Kadomura cannot be characterized as “cryogenic” because it dis-
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`closed etching temperatures at about room temperature (20ºC in embodiment 1)
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`and well above room temperature (50ºC in embodiment 3). Given those disclo-
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`sures, it would be inaccurate to characterize Kadomura as directed to a “cryogenic
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`etching process,” and I disagree with Dr. Flamm’s suggestion that a person of or-
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`dinary skill in the art at the time of the alleged invention would have regarded Ka-
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`domura as limited to “cryogenic” etching.
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`12.
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`In addition, Dr. Flamm’s description of the objectives of the Kadomu-
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`ra system is incomplete. Dr. Flamm characterizes the objectives of Kadomura as
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`attaining “high accuracy and fine fabrication simultaneously, as well as actually
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`putting the low temperature etching technique into practical use.” (Response at 4-5
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`(Paper No. 13); Flamm Declaration at ¶ 11 (Ex. 2001)) As noted in my Opening
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`- 6 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`Declaration, however, Kadomura repeatedly
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`identifies avoiding decreased
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`throughput as an objective, including by adjusting temperature change times to en-
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`sure they occur within the time for an exchange of etchant gases between pro-
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`cessing steps. (Opening Declaration ¶¶ 79-80, 99, 117-118, 149-150, 152, 155;
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`Kadomura at 4:46-54 (“Further, since each of the etching treatments is conducted
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`in the identical processing apparatus, the time for the [sic] changing the specimen
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`temperature between the steps can be shortened. Accordingly, if the change of the
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`specimen temperature is conducted about within a time required for a series of op-
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`erations, for example, interruption of electric discharge or alternation of etching
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`gases between the steps, dry etching treatment comprising a plurality of steps can
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`be applied without deteriorating the throughput.”), 5:18-26 (“In addition, since the
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`temperature of the semiconductor substrate can be changed rapidly in a short peri-
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`od of time between the steps, the temperature can be changed about within a time
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`required for a series of operations such as interruption of electric discharge or al-
`
`teration of etching gases between the steps and, accordingly, the dry etching treat-
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`ment comprising a plurality of steps can be conducted rapidly without lowering the
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`throughput.”), 7:19-30 (“In the dry etching method described above, it is possible
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`to attain both the high selectivity and ensurance for the anisotropic shape, that is,
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`fine fabrication at high accuracy and, in addition, the temperature for the specimen
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`can be changed easily and in a short period of time by conducting each of the steps
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`
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`- 7 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
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`in one identical etching device, so that the temperature can be changed about with-
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`in a period of time required for a series of operations such as interruption of dis-
`
`charge or alteration of etching gases between the steps and, accordingly, the dry
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`etching treatment comprising a plurality of steps can be applied rapidly without
`
`lowering the throughput.”), 9:16-20 (“Accordingly, it is possible also in this dry
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`etching method, to attain both high selectivity and ensurance for the anisotropic
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`shape, that is, fine fabrication at a high accuracy, and the dry etching treatment
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`comprising a plurality of steps can be applied without lowering the throughput.”),
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`10:36-41 (“Accordingly, also in this dry etching method, it is possible to attain
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`both the high selectivity and ensurance of the anisotropic shape, that is, fine fabri-
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`cation at a high accuracy like that in the first and the second embodiments, and dry
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`etching treatment comprising a plurality of steps can be applied without lowering
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`the throughput.”) (Ex. 1005))
`
` Notwithstanding his incomplete description of the objectives of Ka-
`13.
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`domura, Dr. Flamm appears to agree that Kadomura was concerned with through-
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`put, since he states in the Response that “Kadomura, along with the semiconductor
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`industry in general, was concerned about throughput” (Response at 10 (Paper No.
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`13)) and points to many of the same portions of Kadomura for support (Response
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`at 10 n.3 (Paper No. 13)) that I rely upon in support of my opinions above.
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`14.
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`In discussing Kadomura, Dr. Flamm states that Kadomura’s tempera-
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`- 8 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

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`
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`ture change time of, for example, “about 30” seconds is “relatively long” and
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`“teaches away” from the ’264 patent because the patent describes a time interval of
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`“several seconds” that is “an order of magnitude shorter than anything in Kadomu-
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`ra.” (Response at 5 (Paper No. 13); Flamm Declaration at ¶ 11 (Ex. 2001)) I disa-
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`gree. Claims 56 and 60 of the ’264 patent and their dependent claims do not re-
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`quire any specific length for the recited “preselected time [period]” for temperature
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`change. For that reason, the length of Kadomura’s temperature change periods is
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`immaterial to claims 56 and 60 and their dependent claims.
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`C. Matsumura
`
` Dr. Flamm argues that Matsumura “does not teach anything about
`15.
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`etching” and thus “teaches away” from the invention of the ’264 patent. (Response
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`at 6-7 (Paper No. 13); Flamm Declaration at ¶ 12 (Ex. 2001)) I disagree because,
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`as discussed in my Opening Declaration, Matsumura disclosed that its processing
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`techniques can be applied to etching and ashing processes. (Opening Declaration
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`¶¶ 71, 78, 89, 219, 229 (Ex. 1006); Matsumura at 10:3-7 (Ex. 1003))
`
`
`16.
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`In my Opening Declaration, I discussed Matsumura’s disclosures.
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`(Opening Declaration at ¶¶ 70-75 (Ex. 1006)) Specifically, Matsumura disclosed a
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`temperature control system for semiconductor processing that included a computer
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`programmed to control temperature, processing time, and temperature change time.
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`(Opening Declaration at ¶¶ 72-73 (Ex. 1006); Matsumura at Abstract, Figs. 5A, 8-9
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`- 9 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
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`(Ex. 1003)) Matsumura further taught a system that included a thermometer, a
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`temperature sensor for a wafer stage, and a CPU to control the heating and cooling
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`system, where the control system could take input from a user regarding heating
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`and other conditions of the system. (Opening Declaration at ¶¶ 73-74 (Ex. 1006);
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`Matsumura at Fig. 5A, 5:32-63, 5:67-6:9 (Ex. 1003))
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` Although Dr. Flamm argues Matsumura’s disclosure is not sufficient,
`17.
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`he does not explain his contention that “Matsumura does not teach anything about
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`etching.” (Response at 6 (Paper No. 13); Flamm Declaration at ¶ 12 (Ex. 2001))
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`Indeed, Matsumura expressly teaches applying its techniques to etching. (Matsu-
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`mura at 10:3-7 (Ex. 1003)) Based on Matsumura’s disclosure, it would have been
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`obvious to use Matsumura’s preprogrammed recipe approach in an etching pro-
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`cess. (Opening Declaration ¶¶ 71, 78 (Ex. 1006); Matsumura at 10:3-7 (Ex. 1003))
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` A person of ordinary skill in the art at the time of the alleged inven-
`18.
`
`tion would have known how to use the recipes and control circuits disclosed by
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`Matsumura in common processing techniques, such as etching, and been motivated
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`to implement those techniques. As explained in my Opening Declaration, using
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`control apparatuses and programmed recipes was well known in the prior art, and a
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`person of ordinary skill in the art at the time of the alleged invention would have
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`understood that using programmed recipes and a control system, such as the one
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`disclosed by Matsumura, would have improved a process by ensuring higher
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`- 10 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
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`throughput and increasing efficiency, control, accuracy, reliability, and predictabil-
`
`ity. (Opening Declaration at ¶¶ 80, 147, 150-152 (Ex. 1006)) As noted in Matsu-
`
`mura, its preprogrammed recipe approach for controlling temperature, processing
`
`time, and temperature change time resulted in more accurate and reliable control of
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`processing temperatures. (Matsumura at 10:22-27 (“Further, when the semicon-
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`ductor devices of same kind are to be heated and cooled, their thermal history
`
`curve can be controlled accurately same [sic] at their heating and cooling times,
`
`thereby enhancing their reliability. Particularly, their thermal history curve can be
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`made accurately same.”) (Ex. 1003); Opening Declaration at ¶ 151 (Ex. 1006))
`
`These benefits would have applied to using preprogrammed recipes in etching,
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`which was a widely known and commonly used processing technique at the time of
`
`the alleged invention. There is nothing about an etching process that is incompati-
`
`ble with Matsumura’s techniques.
`
` Dr. Flamm states that Matsumura “strongly suggests” its approach had
`19.
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`not been used “with any type of etching.” (Response at 7 n.2 (Paper No. 13)) As
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`explained above, however, Matsumura expressly teaches that its techniques were
`
`applicable to etching processes. Given the common knowledge and widespread
`
`use of preprogrammed recipes, it was not necessary for Matsumura to provide a
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`detailed explanation of how to implement its techniques in an etching process. It
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`would have been straightforward for a person of ordinary skill in the art at the time
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`- 11 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
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`

`

`
`
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`of the alleged invention to follow Matsumura’s suggestion to obtain the benefits
`
`that the reference describes in an etching context.
`
` Although Dr. Flamm asserts that Matsumura “does not teach anything
`20.
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`about etching” (Response at 6 (Paper No. 13); Flamm Declaration at ¶ 12 (Ex.
`
`2001)), he does not offer any reasoning or explanation for why a person of ordi-
`
`nary skill in the art at the time of the alleged invention would not have been able to
`
`utilize Matsumura’s techniques in etching processes. In particular, he does not
`
`identify any features of etching processes or distinctions between heating and etch-
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`ing techniques that would have precluded a person of ordinary skill in the art at the
`
`time of the alleged invention from applying Matsumura’s techniques to etching
`
`processes, as Matsumura itself explicitly states would have been done. In addition,
`
`Dr. Flamm recognizes that Matsumura’s automated approach using a controller to
`
`carry out programmed process steps (recipes) was common knowledge in the prior
`
`art, obvious, and widely implemented. (Response at 16-18 (Paper No. 13); Flamm
`
`Declaration at ¶ 16 (Ex. 2001)).
`
`
`21.
`
`I also disagree with Dr. Flamm’s description of Matsumura as disclos-
`
`ing only “a single predetermined temperature.” (Response at 7 (Paper No. 13);
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`Flamm Declaration at ¶ 12 (Ex. 1006)) Matsumura taught preprogrammed recipes
`
`that include processing steps at multiple predetermined temperatures. For exam-
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`ple, Matsumura taught an embodiment with two predetermined temperatures of
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`- 12 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
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`

`

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`
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`90ºC and 140ºC with a predetermined temperature change time of 20 seconds, as
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`reflected below in Matsumura’s Figure 9. (Matsumura at 8:62-68 (“In the case of
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`this recipe, the heating speed at a first step is 70º C. per minute, the temperature to
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`be held at a first step is 90º C. the heating speed at a second step is 150º C. per mi-
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`nute, the temperature to be held at a second step is 140º C. and the cooling speed is
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`2º C. The time during which the temperature is held at the first and second steps,
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`respectively, is 30 seconds.”) (Ex. 1003))
`
`
`D. Kadomura and Matsumura rendered claims 56 and 60 obvious
`
` Dr. Flamm states that claims 56 and 60 are patentable because it
`22.
`
`would not have been obvious to combine Kadomura with Matsumura. I disagree
`
`with Dr. Flamm because, as explained below and in my Opening Declaration, there
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`were many reasons why a person of ordinary skill in the art at the time of the al-
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`- 13 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
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`

`

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`
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`leged invention would have been motivated to combine Kadomura and Matsumura.
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`(Opening Declaration ¶¶ 76-81, 133, 147-154 (Ex. 1006))
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` Specifically, a person of ordinary skill in the art at the time of the al-
`23.
`
`leged invention would have been motivated to incorporate Matsumura’s explicit
`
`disclosure of a substrate holder temperature sensor into Kadomura’s processing
`
`tool and would have further been motivated to incorporate Matsumura’s disclosure
`
`of an apparatus and method for programming time-temperature recipes into the
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`controller disclosed in Kadomura. (Opening Declaration ¶¶ 76-81, 133, 147-154
`
`(Ex. 1006)) As described in my Opening Declaration, the combination of Ka-
`
`domura and Matsumura rendered claim 56 obvious. (Opening Declaration at
`
`¶¶ 125-166 (Ex. 1006)) As further described in my Opening Declaration, the com-
`
`bination of Kadomura, Matsumura, and Wang rendered claim 60 obvious. (Open-
`
`ing Declaration at ¶¶ 177-191 (Ex. 1006))
`
` Claim 56, limitation [b] requires “sensing a substrate holder tempera-
`24.
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`ture.” Claim 60, limitation [b] similarly requires “sensing the substrate holder
`
`temperature.” As explained in my Opening Declaration, Kadomura taught a sub-
`
`strate holder in the form of stage 12 “for supporting and fixing the specimen W
`
`[wafer],” as shown in the annotated version of Kadomura’s Figure 4 below (top).
`
`(Kadomura at 11:36-42 (Ex. 1005); Opening Declaration ¶¶ 128, 182 (Ex. 1006))
`
`Stage 12 has an electrostatic chuck having a heater (not shown in annotated Figure
`
`
`
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`- 14 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
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`

`

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`
`
`4 below but represented by a red line). (Kadomura at 6:30-35, 7:38-47, 8:17-23,
`
`10:7-10, 11:42-47 (Ex. 1005); Opening Declaration ¶ 128 (Ex. 1006)) Matsumura
`
`similarly disclosed a heater, conductive thin film 14, which was attached to ther-
`
`mal sensor 25 and part of stage 12. (Matsumura at 5:34-35, 5:42-45, 6:2-4 (Ex.
`
`1003); Opening Declaration ¶¶ 132, 185 (Ex. 1006)) Sensor 25 detected the tem-
`
`perature of thin film 14 in stage 12. (Matsumura at 7:19-21 (Ex. 1003); Opening
`
`Declaration ¶¶ 132, 185 (Ex. 1006)) Sensor 25 (highlighted in yellow), stage 12
`
`(highlighted in purple), and conductive thin film 14 (highlighted in red), are shown
`
`in the annotated version of Matsumura’s Figure 5A below (bottom).
`
`(Kadomura at Fig. 4 (Ex. 1005); Opening Declaration at ¶ 128 (Ex. 1006))
`
`
`
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`
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`- 15 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
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`

`

`
`
`
`
`
`(Matsumura at Fig. 5A (Ex. 1003); Opening Declaration at ¶ 132 (Ex. 1006))
`
` Claim 56, limitation [e] requires changing the substrate temperature
`25.
`
`“within a preselected time period that is less than the overall process time associat-
`
`ed with the etching the first silicon-containing layer and the second silicon-
`
`containing layer.” Claim 60, limitation [f] requires that “the first substrate temper-
`
`ature is changed to the second substrate temperature with a substrate temperature
`
`control circuit within a preselected time to etch the silicide layer.” As explained in
`
`my Opening Declaration, the combination of Matsumura and Kadomura taught
`
`these limitations. (Opening Declaration ¶¶ 138-156, 191 (Ex. 1006)) Kadomura
`
`taught several examples of temperature changes. (Kadomura at 6:18-29, 6:52-55,
`
`6:63-7:7, 8:5-16, 8:51-64, 9:54-62, 10:7-27 (Ex. 1005); Opening Declaration
`
`
`
`
`- 16 -
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`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`¶¶ 63-65, 143 (Ex. 1006)) Kadomura also disclosed a feedback control device 25
`
`with a PID controller that detected the substrate’s temperature with thermometer
`
`18 and used that information to adjust the “detected temperature” of the wafer to
`
`match a “predetermined temperature,” for example 20ºC, -30ºC, or 50ºC. (Ka-
`
`domura at 12:38-48 (Ex. 1005); Opening Declaration ¶¶ 66, 131, 184 (Ex. 1006))
`
`Control device 25 (highlighted in orange) and thermometer 18 (highlighted in yel-
`
`low) are shown in the annotated version of Kadomura’s Figure 4 below (top).
`
`Matsumura taught a semiconductor processing method based on “predetermined
`
`recipe[s]” that were used to heat or cool a substrate to or from a predetermined
`
`temperature over a “predetermined period of time.” (Matsumura at 3:1-7, Figs. 8
`
`& 9 (Ex. 1003); Opening Declaration ¶¶ 145, 151, 237 (Ex. 1006)) A control sys-
`
`tem 20 with a CPU and PID controller responded to “inputted recipes and tempera-
`
`ture detecting signal[s]” to ensured proper execution of the recipes. (Matsumura at
`
`5:60-63 (Ex. 1003); Opening Declaration ¶¶ 145-146, 237-238 (Ex. 1006)) Con-
`
`trol system 20 (highlighted in orange) is shown below in the annotated version of
`
`Matsumura’s Figure 5A below (bottom).
`
`
`
`
`- 17 -
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`(Kadomura at Fig. 4 (Ex. 1005); Opening Declaration at ¶ 143 (Ex. 1006))
`
`
`
`(Matsumura at Fig. 5A (Ex. 1003); Opening Declaration at ¶ 145 (Ex. 1006))
`
` As described in my Opening Declaration, a person of ordinary skill in
`26.
`
`
`
`
`
`
`- 18 -
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`the art at the time of the alleged invention would have incorporated Matsumura’s
`
`substrate holder temperature sensor into Kadomura’s processing system because,
`
`for example:
`
`• Kadomura disclosed setting and changing the temperature of stage 12
`
`and it would have been obvious to use a sensor to measure the stage
`
`temperature and to confirm that the selected temperature had been
`
`reached, recognizing that measuring the substrate holder temperature
`
`was a known technique. (Kadomura at 3:23-49 (Ex. 1005); Matsumu-
`
`ra at 5:42-45, 6:2-4, 7:19-21 (Ex. 1003); Opening Declaration ¶¶ 77,
`
`133 (Ex. 1006))
`
`• Both Kadomura and Matsumura disclosed PID controllers that adjust-
`
`ed substrate holder temperature based on detected temperatures, and
`
`Matsumura’s approach would have added the ability to control tem-
`
`perature change times and processing times. (Kadomura at 12:35-48
`
`(Ex. 1005); Matsumura at 2:21-57, 5:58-6:2, 6:35-7:53, 8:29-31 (Ex.
`
`1003); Opening Declaration ¶¶ 39, 66, 75, 77, 80, 131, 138, 145, 149-
`
`152 (Ex. 1006))
`
`• Measuring the substrate holder temperature in Kadomura’s system (as
`
`taught in Matsumura) would have provided greater precision and in-
`
`sight into the effectiveness of heat transfer between the substrate and
`
`
`
`
`- 19 -
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`the substrate holder, allowed for more accurate measurements during
`
`the temperature changes in Kadomura rather than using a correlation-
`
`based method, and provided useful data for analyzing how to acceler-
`
`ate temperature change times, increase throughput, and increase effi-
`
`ciency. (Kadomura at 3:19-22, 5:18-26, 11:48-51 (Ex. 1005); Open-
`
`ing Declaration ¶¶ 79-80, 133 (Ex. 1006))
`
` As further described in my Opening Declaration, a person of ordinary
`27.
`
`skill in the art at the time of the alleged invention would have been motivated to
`
`incorporate Matsumura’s programmable CPU and predetermined recipe techniques
`
`into the apparatus disclosed by Kadomura because, for example:
`
`• Using programmed recipes to control temperature, processing time,
`
`and temperature change time would have increased efficiency, con-
`
`trol, accuracy, reliability, and predictability. (Matsumura at 10:22-29
`
`(Ex. 1003); Opening Declaration ¶¶ 80, 147, 150-152 (Ex. 1006))
`
`• Programming Kadomura’s control device 25, which included a PID
`
`controller, to use predetermined recipes like those disclosed in
`
`Matsumura would have helped ensure that the temperature change
`
`time in Kadomura would have reliably and consistently occurred more
`
`quickly than the time required for gas exchange. (Opening Declara-
`
`tion ¶¶ 80, 133-135 (Ex. 1006))
`
`
`
`
`- 20 -
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`• Using Matsumura’s preprogrammed recipe approach for controlling
`
`temperature, processing time, and temperature change time would
`
`have helped achieve Kadomura’s goal of increased throughput and se-
`
`lectivity. (Kadomura at 6:52-62, 7:19-30, 10:11-16 (Ex. 1005);
`
`Matsumura at Fig. 5A, 6:4-9 (Ex. 1003); Opening Declaration ¶¶ 80,
`
`150 (Ex. 1006))
`
`
`28.
`
`In addition, Kadomura and Matsumura contain similar and overlap-
`
`ping disclosures relating to semiconductor processing. (Opening Declaration
`
`¶¶ 78, 148 (Ex. 1006))
`
` Dr. Flamm asserts that Kadomura’s system would not have benefited
`29.
`
`from a combination with Matsumura. (Response at 8-15 (Paper No. 13); Flamm
`
`Declaration at ¶¶ 11, 13-14, 16 (Ex. 2001)) Dr. Flamm states that my Opening
`
`Declaration fails to explain “how Matsumura’s ‘preprogrammed recipes’ could
`
`possibly increase throughput in Kadomura” or why implementing an exact temper-
`
`ature change would have been beneficial in Kadomura’s system. (Response at 11
`
`(Paper No. 13)) As explained in my Opening Declaration, however, the combina-
`
`tion of Kadomura and Matsumura would have achieved the goal of increased
`
`throughput and benefited Kadomura in several other ways. (Opening Declaration
`
`at ¶¶ 80, 147, 150-152 (Ex. 1006))
`
` Dr. Flamm’s argument is based on the mistaken assumption that
`30.
`
`
`
`
`- 21 -
`
`Intel, Exhibit 1023
`Intel v. Flamm, IPR2017-00282
`
`

`

`
`
`
`throughput is irrelevant to Kadomura. Dr. Flamm asserts that Kadomura taught a
`
`temperature change time that must necessarily be shorter than a gas exchange time
`
`so that a person of ordinary skill in the art at the time of the alleged invention
`
`would not have used Matsumura’s preprogrammed recipe approach for controlling
`
`temperature, processing time, and temperature change time to implement a prese-
`
`lected time per

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