By: Christopher Frerking (chris@ntknet.com)
`Reg. No. 42,557
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`INTEL CORPORATION GLOBALFOUNDRIES U.S., INC.
`
`AND MICRON TECHNOLOGY, INC.,
`
`Petitioners
`
`V.
`
`DANIEL L. FLAMM,
`
`Patent Owner
`
`CASE IPR2017-002821
`
`US. Patent No. RE40,264 E
`
`DECLARATION OF DANIEL L. FLAMM IN
`
`SUPPORT OF PATENT OWNER’S RESPONSE
`
`
`Mail StgrLPATENT BOARD
`Patent Trial and Appeal Board
`US. Patent & Trademark Office
`
`PO. Box 1450
`
`Alexandria, VA 22313—1450
`
`1 Samsung Electronics Company, Ltd. Was joined as a party to this proceeding
`1
`via a Motion for Joinder in IPR2017—01752
`
`Exhibit 2001
`
`IPR2017—00282
`
`
`Reg. No. 42,557
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`INTEL CORPORATION GLOBALFOUNDRIES U.S., INC.
`
`AND MICRON TECHNOLOGY, INC.,
`
`Petitioners
`
`V.
`
`DANIEL L. FLAMM,
`
`Patent Owner
`
`CASE IPR2017-002821
`
`US. Patent No. RE40,264 E
`
`DECLARATION OF DANIEL L. FLAMM IN
`
`SUPPORT OF PATENT OWNER’S RESPONSE
`
`
`Mail StgrLPATENT BOARD
`Patent Trial and Appeal Board
`US. Patent & Trademark Office
`
`PO. Box 1450
`
`Alexandria, VA 22313—1450
`
`1 Samsung Electronics Company, Ltd. Was joined as a party to this proceeding
`1
`via a Motion for Joinder in IPR2017—01752
`
`Exhibit 2001
`
`IPR2017—00282
`
`
`
`Inter Partes Review of US. Patent No. RE40,264
`lPR2017—00282
`
`1, Daniel L. Flamm, Sc.D., hereby declare as follows:
`
`1.
`
`I worked in academia, research, and industry in various roles for more than 50
`
`years. My curriculum vitae, which includes a more detailed summary of my
`
`background, experience, and publication, is attached as Appendix A.
`
`2.
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`l have been a leading researcher and educator in the fields of semiconductor
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`processing technology, air pollution control, materials science, and other areas of
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`chemical engineering. My research has been funded by NASA, National Science
`
`Foundation, Environmental Protection Agency, and AT&T Bell Laboratories.
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`While a Distinguished Member of Technical Staff at Bell Laboratories, 1 led a
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`semiconductor processing research group comprised of research colleagues,
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`visiting university scientists, post-doctoral associates, and summer students.
`
`I
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`have also served as a technical consultant to various semiconductor device and
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`processing equipment manufacturers.
`
`3.
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`l have published over one hundred and fifty (150) technical journal articles
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`and books, and dozens of articles in conference proceedings, most of them in
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`highly competitive referred conferences and rigorously reviewed journals.
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`I am
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`an inventor listed in more than 20 US. patents, a number of which have been
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`licensed through the
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`industry, and most being in the general
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`field of
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`semiconductor processing technology.
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`4.
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`I had experience studying and analyzing patents and patent claims from the
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`1
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`Inter Partes Review of U.S. Patent No. RE40,264
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`IPR2017—00282
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`perspective of a personal having ordinary skilled in the art (“PHOSTIA”) starting
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`at least at the time of my employment at AT&T Bell laboratories in 1977. At
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`AT&T Bell Laboratories, I served as a member of the patent licensing review
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`committee where I was responsible for reviewing hundreds of patents for
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`potential utility and licensing potential.
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`I have also served as a technical expert
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`in patent disputes and litigation.
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`5.
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`I was admitted to the patent bar as an Agent in 2003 and have been registered
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`as a Patent Attorney since 2006.
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`I am also a member of the California State Bar.
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`6.
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`I am the inventor of U.S. Patent NO. RE40,264E, in the name of Daniel L
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`F lamm and titled “(“the ‘264 Patent”).
`
`7.
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`I have read the Petitioners Petition for Inter Partes Review in this matter and
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`the various art cited therein, including, among other.
`
`8.
`
`The
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`‘264 patent describes methods of fabricating semiconductors,
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`preferably using a plasma discharge. Multiple substrate temperatures are
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`employed in a continuous process for etching films, where temperature changing
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`is achieved within a preselected time period.
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`9. Low temperatures generally results in slower processing.
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`The present
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`invention can overcome these disadvantages of conventional processes by rapidly
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`removing a majority of material at a higher temperature after an ion implanted
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`resist
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`layer
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`is removed without substantial particle generation at a lower
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`2
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`Inter Partes Review of US. Patent No. RE40,264
`IPR2017—00282
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`temperature (id. at 2:26-30) The invention achieves “high etch rates while
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`simultaneously maintaining high etch selectivity...” (id. at 2:32-33).
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`10.While methods involving the use of various temperatures for manufacturing
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`semiconductors were known in the art prior to the ‘264 patent, none of the prior
`
`art discloses etching or processing where the temperature of the substrate is
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`changed “within a preselected time interval for processing” (Claim 27) or “within
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`a preselected time period to process the film” (Claim 37) in the manner claimed.
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`11.
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`Kadomura teaches a cryogenic two-step etching treatment, wherein
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`the etching is suspended between the first and second etches. During the
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`suspension, the first etching gas is discharged and is replaced by a second etching
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`gas for the second etching step.
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`In this case, since the series of operations
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`described above is a series of operations of interrupting discharge, exhausting
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`remaining gases in the diffusion chamber
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`and,
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`further,
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`introducing and
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`stabilizing a fresh etching gas take a time equal with or more than the time
`
`required for rapid cooling,
`
`the time required for the rapid cooling does not
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`constitute a factor of delaying the time required for the etching treatment of the
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`specimen. Kadomura teaches nothing about a preselected time interval for
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`changing temperature and specifically teaches that while the temperature is being
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`changed, no processing is performed. The maximum time interval available for
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`the temperature change in Kadomura is a function of the time it takes to discharge
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`3
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`Inter Partes Review of US. Patent No. RE40,264
`IPR2017—00282
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`the first gas, and then to introduce the second gas and stabilize the second gas.
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`There would be no benefit from attempting to preselect a time period to change
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`the Kadomura temperature since there is no processing during the temperature
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`change that would be affected by the duration of the change, and foreshortening
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`the time for changing temperature would not otherwise improve the Kadomura
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`process. ) At the time of the ‘264 invention, cryogenic etching was merely a
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`laboratory curiosity that had been impractical owing to its various requirements
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`to use ultracold fluids and gases, the difficulties in finding production worthy
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`materials that could tolerate repeated cycling between room and low temperature
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`without premature deterioration, brittle fractures, and leaks, and the relatively
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`long times required to effectuate heating, cooling, and equilibration to attain
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`sufficiently uniform and stable substrate temperatures. The objects of the
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`Kadomura cryogenic etching process were to attain “high accuracy and fine
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`fabrication simultaneously, as well as actually putting the low temperature
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`etching technique into practical use.” By contrast, my primary objectives was to
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`increase throughput and selectivity of conventional plasma processes: “[the
`
`invention] overcomes serious disadvantages of prior art methods in which
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`throughput and etching rate were lowered in order to avoid excessive device
`
`damage to a workpiece.” (Ex. 1001 at 2:11—14) Kadomura’s technique of
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`exhausting and replacing the gas between etches and employing very cold
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`4
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`Inter Partes Review of US. Patent No. RE40,264
`IPR2017—00282
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`temperature results in relatively long intervals between etches, “about 30 sec,”
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`which teaches away from the ‘264 patent (Ex. 1005 at 6:54, 8:42, In furtherance
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`of increased throughput, my ‘264 patent teaches a time interval of “several
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`seconds” (EX. 1001 at 19:8—12 & Fig. 10), which is at least an order of magnitude
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`shorter than anything in Kadomura. According to Kadomura, a specific time
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`interval for changing the temperature is of no importance, since the time interval
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`to change the temperature is equal or less than the time interval to change the gas.
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`Accordingly, Kadomura teaches away from the concept of a preselected time
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`period in the ‘264 Patent.
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`12.The object of Matsumura was the different processing steps and modules for
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`laying a uniform film of photoresist onto a substrate before exposing the
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`photoresist to light. After the resist is applied and baked, it is exposed through a
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`pattern mask to light, thereby forming a latent image. The resist having the latent
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`image is then processed to form a layer of patterned photoresist on the substrate.
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`Matsumura recognized that controlling heating and cooling during the “adhesion
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`and baking processes” when precursor liquids are applied to semiconductor
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`wafers and baked improved quality and reproducibility; Matsumura does not
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`teach anything about etching. (Ex. 1003 at 1:15-20, 4:56-59, Figs.
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`1 & 4
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`Matsumura’s “resist processing system,” is depicted in the block diagram Fig. 4
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`as the box 40. (Ex. 1003, 4:56—59 and Fig. 4.) Specifically,
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`it comprises a
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`5
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`Inter Partes Review of US. Patent No. RE40,264
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`lPR2017—00282
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`“Sender,” 41, for transporting the wafer to the “Adhesion Unit,” 42, which
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`applies HMDS to the wafer to enhance the adhesion of the resist while the
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`predetermined temperature (7:33—36), the resist is applied by the “Coating unit,”
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`43, and then it is baked in the “Baking Unit,” 44. The “Receiver unit,” 45, then
`
`forwards the wafer to an “interface (not shown)” which transfers the wafer to an
`
`external “exposure unit (not shown).” (at 5:5- 12 and Fig. 4.) The crux of
`
`Matsumura’s inventive solution for baking resist was to heat
`
`the wafer
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`“according to a schedule contoured to the baking process by means of a
`
`conductive thin film embedded in the substrate support structure in accordance
`
`with the schedule information” in a stored recipe. ( at 3: 10—11, 2:66—3:16, 3:17—
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`51,) To improve adhesion before the resist is first applied to the substrate, the
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`wafer is heated to a single predetermined temperature and maintained at that
`
`single temperature while a treatment with HDMS is performed. Matsumura
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`teaches away from the invention of the ‘264 Patent.
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`13.Kadomura is very clear in its teaching that the time interval to change the
`
`temperature is of no consequence as long as it is not longer than the time interval
`
`to change out the etching gas.
`
`In each embodiment of Kadomura’s process, the
`
`length of time to change the temperature, which was a “short period of time of
`
`about 30 seconds,” was shorter than the time to change the gas (Ex. 1005 6:52—
`
`62, 7:19-30, 8:40-50, 10:11-16).
`
`Kadomura understood that since both
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`Inter Partes Review of US. Patent No. RE40,264
`lPR2017—00282
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`operations need to be completed before the second etch can proceed, the only
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`time period that mattered was the longest. He said “In this case, since the series
`
`of operations described above,
`
`that,
`
`is a series of operations of interrupting
`
`discharge, exhausting remaining gases in the diffusion chamber 2 and, further,
`
`introducing and stabilizing a fresh etching gas take a time equal with or more
`
`than the time required for rapid cooling, the time required for the rapid cooling
`
`does not constitute a factor of delaying the time requiredfor the etching treatment
`
`ofthe specimen W.
`
`(Ia’. 6:55-62, emphasis added).
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`14. Matsumura’s “predetermined recipes” do not change anything in Kadomura,
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`much less provide any benefit. Assuming someone practicing Kadomura’s
`
`process found that the time interval to change the temperature were longer than
`
`the time to change the gas, would combining Matsumura’s “predetermined
`
`recipes” improve this application of Kadomura? The answer again is no. Under
`
`those circumstances, given that Kadomura, along with the semiconductor
`
`industry in general, was concerned about throughput, the task at hand would be
`
`readily apparent — attempt to reduce the time interval for the temperature change.
`
`In this regard, Matsumura’s “predetermined recipes” would again be utterly
`
`useless.
`
`15. As extensively discussed with independent claim 56 there would be no
`
`benefit from attempting to combine Kadomura and Matsumura and would there
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`7
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`Inter Partes Review of US. Patent No. RE40,264
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`be any motivation to combine them. The question presented in this Ground 3 is
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`whether Wang adds anything that would bring about a benefit from combing the
`
`three references, Kadomura, Matsumura and Wang or provide a motive to
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`combine them. The answer is no. Wang would not contribute anything that
`
`would change the fact that there would be absolutely no benefit to combine
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`Kadomura and Matsumura and there would be no motive to combine them.
`
`Nothing in Wang teaches anything about the limitation, changing the temperature,
`
`from the first temperature to the second temperature “within a preselected time.”
`
`16. At most, even pushing aside all of the above arguments, the only thing in
`
`Matsumura that
`
`is not mentioned by Kadomura is using a computer or
`
`microcontroller to effectuate a process. Kadomura does not expressly state that
`
`his
`
`sequence of
`
`steps were
`
`or
`
`could
`
`be
`
`effectuated
`
`by
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`a
`
`digital
`
`controller. Accordingly it is unknown whether each or some of the process steps
`
`and settings described by Kadomura were performed by a microcontroller using
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`instructions or data comprising a recipe stored in tangible media. That question
`
`is irrelevant since digital process control in the field of semiconductor processing
`
`was common knowledge long before the Kadomura priority dates. Whether the
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`claims ofthe ‘264 are obvious or not has nothing to do with whether Kadomura,
`
`or
`
`for
`
`that matter any other
`
`reference, used a digital computer, CPU,
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`microprocessor, or the like to sequence various process steps based on data in
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`8
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`Inter Partes Review of US. Patent No. RE40,264
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`IPR2017-00282
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`memory (e.g. without human interaction). Petitioner’s repeated “argument”
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`throughout its petition that a PHOSITA would have looked to Matsumura for
`
`using a CPU and a recipe to improve control of temperature etc. amount to no
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`more than a vacuous incantation that process steps can be automated using a
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`digital microcontroller, or the like. No PHOSITA would have considered
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`Matsumura for this at least since this type of automation was common knowledge
`
`at the time and its implementation in production worthy processing equipment
`
`was pervasive and obvious. Accordingly this is no argument to combine. As for
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`the rest, Matsumura is in a different field of art, and even if that fact is ignored,
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`Matsumura’s recipes would have been useless for performing any plasma etching.
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`The fundamental questions only depend on the processes disclosed, whether the
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`various equipment disclosed in the prior art cited was operable to perform those
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`processes, and whether any of Petitioner’s specific proposals for a combination
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`(e.g. a combination that is definite, operable, and logically understandable in
`
`detail) would have been obvious without 20/20 hindsight garnered from the
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`specification and claims ofthe ‘264.
`
`17. Patent Owner asserts that claim 57 is not obvious based upon the combined
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`teachings of Kadomura, Matsumura, and Muller. Pet. 44—48. A PHOSITA would
`
`not combine the teachings of Kadomura, Matsumura, and Muller. A PHOSITA
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`would not combine Kadomura, which teaches exhausting the etching gas between
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`9
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`Inter Partes Review of US. Patent No. RE40,264
`IPR2017—00282
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`etching steps, and changing the temperature during the time used to exhaust the
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`gas, with the continuous process of Muller. Muller relates to a deep trench etching
`
`process, which would be compromised and not work, if combined with the multi-
`
`step process of Kadomura. Muller specifically emphasizes “etch profile shaping
`
`through variations of wafer temperature during etching...for all etch processes
`
`involving a side wall passivation film where the deposition of the passivation
`
`film is temperature dependent,” (Ex. 1002 Figures 6A—6C and accompanying
`
`text) which would be inoperable with Kadomura’s teaching of exhausting the gas
`
`during processing according to a PHOSITA. Additionally, based upon the earlier
`
`arguments associated with independent claim 56, the combination of the cited art
`
`including Muller fails to teach claim 57.
`
`18.Patent Owner asserts
`
`that claim 63 is non—obvious over Kadomura,
`
`Matsumura, Kikuchi, and Wang and over Muller, Matsumura, Wang, and
`
`Kikuchi. Kikuchi teaches away from Muller’s and Kadomura’s processes by
`
`using infrared lamps to heat a wafer for an etching process. In particular, Kikuchi
`
`3
`relates to an “etching process,’ as opposed to a deep trench silicon etching
`
`process of Muller (Ex. 1002 Abstract) or the multi—step process of Kadomura.
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`19.1 declare under penalty of perjury under the laws of the United States of
`
`America that the foregoing is true and correct. Kikuchi teaches “a plurality of
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`supports, which may be movably disposed within a vacuum treatment chamber
`
`10
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`Inter Partes Review of US. Patent No. RE40,264
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`IPR2017-00282
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`for moving the substrate away from a source of heat and for moving the substrate
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`into contact with the heating source.” (Ex.1002 Abstract) Kikuchi
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`takes
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`affirmative measures to teach away from Muller’s source of heat, which is its
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`chuck. A PHOSITA would not combine Muller with Kikuchi’s infrared lamps
`
`since it would defeat the purpose of either Kikuchi or Muller. Likewise, Kikuchi
`
`also teaches away from Kadomura’s source of heat.
`
`Executed on this 20th day of September, 2017
`
`/
`
`Daniel L. Flamm
`
`11
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`
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