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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`INTEL CORPORATION, GLOBALFOUNDRIES U.S., INC.,
`AND MICRON TECHNOLOGY, INC.,
`Petitioners,
`
`v.
`
`DANIEL L. FLAMM,
`
`Patent Owner.
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`
`
`PTAB Case No. IPR2017-00280
`Patent No. RE40,264 E
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`
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`DECLARATION OF DR. JOHN BRAVMAN IN SUPPORT OF PETITION
`FOR INTER PARTES REVIEW OF U.S. PATENT NO. RE40,264
`(Claims 27-36, 51-55, 66, 68-69)
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`
`
`Page
`
`
`
`
`I.
`
`II.
`
`INTRODUCTION AND SUMMARY OF TESTIMONY ............................ 1
`A. Qualifications ....................................................................................... 1
`1.
`Education ................................................................................... 1
`2.
`Career ......................................................................................... 2
`3.
`Publications ................................................................................ 4
`4.
`Curriculum Vitae ........................................................................ 5
`Compensation ....................................................................................... 5
`B.
`C. Materials Reviewed .............................................................................. 5
`D.
`Level of Ordinary Skill in the Art ........................................................ 7
`OVERVIEW REGARDING TECHNOLOGY .............................................. 9
`A.
`Priority Date ......................................................................................... 9
`1.
`The Challenged Independent Claims ....................................... 10
`2.
`The Disclosure of Application No. 08/567,224, Filed on
`December 4, 1995 .................................................................... 12
`State of the Art from the Perspective of a Person of Ordinary
`Skill in the Art at the Time of the Alleged Invention ........................ 16
`Background and General Description of the ’264 Patent .................. 20
`C.
`Claim Construction ............................................................................ 25
`D.
`III. OVERVIEW OF THE PRIOR ART ............................................................ 25
`A.
`Standard for Invalidity........................................................................ 25
`B.
`Background on Kadomura ................................................................. 27
`1.
`General Overview of Kadomura .............................................. 27
`2.
`Summary of Kadomura ............................................................ 35
`Background on Matsumura ................................................................ 36
`
`B.
`
`C.
`
`
`
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`-i-
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`Page
`
`
`
`D.
`E.
`
`F.
`G.
`H.
`
`1.
`General Overview of Matsumura............................................. 36
`Summary of Matsumura .......................................................... 40
`2.
`Reasons to Combine Kadomura with Matsumura ............................. 40
`Background on Kikuchi ..................................................................... 44
`1.
`General Overview of Kikuchi .................................................. 44
`2.
`Summary of Kikuchi ................................................................ 49
`Reasons to Combine Kikuchi with Kadomura and Matsumura ......... 49
`Reasons to Combine Kikuchi with Matsumura ................................. 53
`Background on Muller ....................................................................... 58
`1.
`General Overview of Muller .................................................... 58
`2.
`Summary of Muller .................................................................. 62
`Reasons to combine Muller with Kadomura and Matsumura ........... 62
`I.
`Reasons to combine Muller with Kikuchi and Matsumura................ 66
`J.
`IV. KADOMURA, MATSUMURA, MULLER, AND KIKUCHI
`RENDERED CLAIMS 27-36, 51-55, 66 AND 68-69 OBVIOUS .............. 71
`A. Kadomura and Matsumura rendered claim 27 obvious ..................... 72
`1.
`Kadomura disclosed what is recited in the preamble of
`claim 27 .................................................................................... 72
`Kadomura and Matsumura disclosed claim 27, limitation
`[a] ............................................................................................. 72
`Kadomura disclosed claim 27, limitation [b]........................... 77
`Kadomura disclosed claim 27, limitation [c] ........................... 78
`Kadomura disclosed claim 27, limitation [d]........................... 79
`Kadomura and Matsumura disclosed claim 27, limitation
`[e] ............................................................................................. 80
`Kadomura rendered claim 27, limitation [f] obvious .............. 87
`
`2.
`
`3.
`4.
`5.
`6.
`
`7.
`
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`
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`-ii-
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`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`Page
`
`B.
`
`E.
`
`Kadomura and Matsumura in view of Muller rendered claim 28
`obvious ............................................................................................... 90
`Kadomura and Matsumura rendered claim 29 obvious ..................... 93
`C.
`D. Kadomura and Matsumura in view of Muller rendered claim 30
`obvious ............................................................................................... 94
`Kadomura and Matsumura in view of Kikuchi rendered claim
`31 obvious .......................................................................................... 98
`Kadomura and Matsumura rendered claim 32 obvious ................... 100
`F.
`G. Kadomura and Matsumura in view of Muller rendered claim 33
`obvious ............................................................................................. 102
`H. Kadomura and Matsumura rendered claim 34 obvious ................... 103
`I.
`Kadomura and Matsumura in view of Kikuchi rendered claim
`35 obvious ........................................................................................ 103
`Kadomura and Matsumura rendered claim 36 obvious ................... 104
`J.
`K. Kadomura and Matsumura rendered claim 66 obvious ................... 104
`L.
`Kadomura and Matsumura in view of Muller rendered claim 51
`obvious ............................................................................................. 105
`1.
`Kadomura disclosed what is recited in the preamble of
`claim 51 .................................................................................. 105
`Kadomura disclosed claim 51, limitation [a] ......................... 106
`Kadomura and Matsumura disclosed claim 51, limitation
`[b] ........................................................................................... 106
`Kadomura disclosed claim 51, limitation [c] ......................... 111
`4.
`Kadomura disclosed claim 51, limitation [d]......................... 111
`5.
`Kadomura and Muller disclosed claim 51, limitation [e] ...... 111
`6.
`Kadomura disclosed claim 51, limitation [f] ......................... 113
`7.
`M. Kadomura and Matsumura in view of Muller rendered claim 52
`obvious ............................................................................................. 114
`
`2.
`3.
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`-iii-
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`
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`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`Page
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`
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`P.
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`R.
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`N. Kadomura and Matsumura in view of Muller rendered claim 53
`obvious ............................................................................................. 121
`O. Kadomura and Matsumura in view of Muller rendered claim 54
`obvious ............................................................................................. 122
`Kadomura and Matsumura in view of Muller rendered claim 55
`obvious ............................................................................................. 122
`Q. Kadomura and Matsumura in view of Muller rendered claim 68
`obvious ............................................................................................. 130
`Kadomura and Matsumura in view of Muller rendered claim 69
`obvious ............................................................................................. 131
`V. KIKUCHI, MATSUMURA, AND MULLER RENDERED CLAIMS
`27-36, 51-55, 66 AND 68-69 OBVIOUS ................................................... 132
`A. Kikuchi and Matsumura rendered claim 27 obvious ....................... 132
`1.
`Kikuchi disclosed what is recited in the preamble of
`claim 27 .................................................................................. 132
`Kikuchi and Matsumura disclosed claim 27, limitation
`[a] ........................................................................................... 133
`Kikuchi disclosed claim 27, limitation [b]............................. 137
`Kikuchi discloses claim 27, limitation [c] ............................. 138
`Kikuchi disclosed claim 27, limitation [d]............................. 141
`Kikuchi and Matsumura rendered obvious claim 27,
`limitation [e] ........................................................................... 141
`Kikuchi rendered claim 27, limitation [f] obvious ................ 149
`7.
`Kikuchi and Matsumura rendered claim 28 obvious ....................... 149
`Kikuchi and Matsumura in view of Muller rendered claim 29
`obvious ............................................................................................. 151
`D. Kikuchi and Matsumura in view of Muller rendered claim 30
`obvious ............................................................................................. 154
`
`2.
`
`3.
`4.
`5.
`6.
`
`B.
`C.
`
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`-iv-
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`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`Page
`
`E.
`Kikuchi and Matsumura rendered claim 31 obvious ....................... 158
`Kikuchi and Matsumura rendered claim 32 obvious ....................... 160
`F.
`G. Kikuchi and Matsumura rendered claim 33 obvious ....................... 160
`H. Kikuchi and Matsumura alone or in view of Muller rendered
`claim 34 obvious .............................................................................. 161
`Kikuchi and Matsumura rendered claim 35 obvious ....................... 170
`I.
`Kikuchi and Matsumura rendered claim 36 obvious ....................... 170
`J.
`K. Kikuchi and Matsumura rendered claim 66 obvious ....................... 170
`L.
`Kikuchi and Matsumura rendered claim 51 obvious ....................... 171
`1.
`Kikuchi disclosed what is recited in the preamble of
`claim 51 .................................................................................. 171
`Kikuchi disclosed claim 51, limitation [a] ............................. 171
`Kikuchi and Matsumura rendered obvious claim 51,
`limitation [b] .......................................................................... 172
`Kikuchi disclosed claim 51, limitation [c] ............................. 176
`Kikuchi disclosed claim 51, limitation [d]............................. 176
`Kikuchi and Matsumura disclosed claim 51, limitation
`[e] ........................................................................................... 176
`Kikuchi and Matsumura disclosed claim 51, limitation [f] ... 176
`7.
`M. Kikuchi and Matsumura rendered claim 52 obvious ....................... 177
`N. Kikuchi and Matsumura rendered claim 53 obvious ....................... 180
`O. Kikuchi and Matsumura rendered claim 54 obvious ....................... 185
`P.
`Kikuchi and Matsumura in view of Muller rendered claim 55
`obvious ............................................................................................. 185
`Q. Kikuchi and Matsumura alone or in view of Muller rendered
`claim 68 obvious .............................................................................. 192
`Kikuchi and Matsumura rendered claim 69 obvious ....................... 193
`
`2.
`3.
`
`4.
`5.
`6.
`
`R.
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`-v-
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`
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`TABLE OF CONTENTS
`(continued)
`
`
`VI. CONCLUSION ........................................................................................... 193
`
`
`Page
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`-vi-
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`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
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`
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`I. Introduction and summary of testimony
`
`
`
` My name is John Bravman. I have been retained in the above-1.
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`referenced inter partes review proceeding by Intel Corporation, Micron Technolo-
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`gy, Inc., and GlobalFoundries U.S., Inc. (collectively, “Petitioners”) to evaluate
`
`United States Patent No. RE40,264 (the “’264 patent”) against certain prior art ref-
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`erences, specifically U.S. Patent Nos. 6,063,710, 5,151,871, 5,226,056, and
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`5,605,600, as well as the knowledge of a person of skill in the art at the time of the
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`purported invention. The ’264 patent is attached as Exhibit 1001 to Petitioners’
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`petition for Inter Partes Review of U.S. Patent No. RE40,264 (“Petition”). I un-
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`derstand that Petitioners seek review of claims 27-36, 51-55, 66, 68, and 69 in their
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`Petition. As detailed in this declaration, it is my opinion that each of the chal-
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`lenged claims is rendered obvious by prior art references that predate the priority
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`date of the ’264 patent. If requested by the Patent Trial and Appeal Board
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`(“PTAB” or “Board”), I am prepared to testify about my opinions expressed in this
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`declaration.
`
`A. Qualifications
`
`1.
`
`2.
`
`Education
`
`I received my Bachelors of Science degree in Materials Science and
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`Engineering at Stanford University in 1979. I later received a Master’s of Science
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`in Materials Science and Engineering from Stanford University in 1981, and I was
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`- 1 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
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`awarded a Ph.D. in Materials Science and Engineering from Stanford University in
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`1984, specializing in semiconductor processing and materials analysis. My thesis
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`was entitled “Morphological Aspects of Silicon - Silicon Dioxide VLSI Interfac-
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`es,” and concerned structural analyses of silicon-silicon dioxide interfaces, as
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`found in integrated circuit devices—specifically very-large-scale integration devic-
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`es.
`
`2.
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`3.
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`Career
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`I will discuss my current position first, followed by a synopsis of my
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`career and work from when I received my Ph.D. to the present.
`
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`4.
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`I am currently employed as the President and as a Professor of Elec-
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`trical Engineering at Bucknell University in Lewisburg, Pennsylvania. As the
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`President of Bucknell, I am the chief administrator at the university and am re-
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`sponsible for helping to set university policy and priorities, alumni relations, and
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`university advancement.
`
`
`5.
`
`From 1979 to 1984, while a graduate student at Stanford, I was em-
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`ployed part-time by Fairchild Semiconductor in their Palo Alto Advanced Re-
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`search Laboratory. I worked in the Materials Characterization group. In 1985, up-
`
`on completion of my doctorate, I joined the faculty at Stanford as Assistant Profes-
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`sor of Materials Science and Engineering. I was promoted to Associate Professor
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`with tenure in 1991, and achieved the rank of Professor in 1995. In 1997 I was
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`
`
`
`- 2 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
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`named to the Bing Professorship.
`
`
`6.
`
`I served as Chairman of Stanford University’s Department of Materi-
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`als Science and Engineering from 1996-1999, and the Director of Stanford’s Cen-
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`ter for Materials Research from 1998-1999. I served as Senior Associate Dean of
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`the School of Engineering from 1992 to 2001 and the Vice Provost for Undergrad-
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`uate Education from 1999 to 2010.
`
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`7.
`
`On July 1, 2010, I retired from Stanford University and began service
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`as the President of Bucknell University, where I also became a Professor of Elec-
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`trical Engineering.
`
`
`8.
`
`I have worked for more than 25 years in the areas of thin film materi-
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`als processing and analysis. Much of my work has involved materials for use in
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`microelectronic interconnects and packaging, and in superconducting structures
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`and systems. I have also led multiple development efforts of specialized equip-
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`ment and methods for determining the microstructural and mechanical properties
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`of materials and structures.
`
`
`9.
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`I have taught a wide variety of courses at the undergraduate and grad-
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`uate level in materials science and engineering, emphasizing both basic science
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`and applied technology, including coursework in the areas of integrated circuit ma-
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`terials and processing. More than two thousand students have taken my classes,
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`and I have trained 24 doctoral students, most of whom now work in the microelec-
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`
`
`
`- 3 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
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`
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`tronics and semiconductor processing industries.
`
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`10.
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`In the course of my research, my research group made extensive use
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`of plasma semiconductor processing equipment for depositing and etching films of
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`both simple (e.g., elemental) and complex (e.g., multi-element compound) materi-
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`als, including semiconductor processing that monitored and controlled temperature
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`during processing.
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`11.
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`I am or have been a member of many professional societies, including
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`the Materials Research Society, the Institute of Electrical and Electronic Engineers,
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`Electron Microscopy Society of America, the American Society of Metals, the
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`Metallurgical Society of AIME, the American Chemical Society, and the American
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`Physical Society. I served as President of the Materials Research Society in 1994.
`
`3.
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`12.
`
`Publications
`
`I am a named inventor on two United States patents relating to the de-
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`livery of medicinal compounds using particular material compositions. The patent
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`numbers and titles as well as my co-inventors are listed on my curriculum vitae at-
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`tached to this declaration as Appendix A.
`
`
`13.
`
`I am author or co-author of over 160 peer-reviewed articles and con-
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`ference proceedings, nearly all of which relate to semiconductor processing and/or
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`integrated circuits. The titles, publication information and my co-authors are listed
`
`on my curriculum vitae attached to this declaration as Appendix A.
`
`
`
`
`- 4 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`
`14.
`
`I am also the author, co-author, or editor of 8 edited works related to
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`semiconductor processing or materials.
`
`4.
`Curriculum Vitae
` Additional details of my education and employment history, recent
`15.
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`professional service, patents, publications, and other testimony are set forth in my
`
`current curriculum vitae, attached to this declaration as Appendix A.
`
`B. Compensation
`
`
`16.
`
`In connection with my work as an expert, I am being compensated at a
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`rate of $450.00 per hour for consulting services including time spent testifying at
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`any hearing that may be held. I am also being reimbursed for reasonable and cus-
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`tomary expenses associated with my work in this case. I receive no other forms of
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`compensation related to this case. No portion of my compensation is dependent or
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`otherwise contingent upon the results of this proceeding or the specifics of my tes-
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`timony.
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`C. Materials Reviewed
`
`
`17.
`
`In formulating my opinions in this matter, I have reviewed the ’264
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`patent (Ex. 10011) and its prosecution history. I have also reviewed the following
`
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`The citations in this declaration to an “Exhibit” or “Ex.” refer to the Exhibits
`
`to the Petition.
`
` 1
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`
`
`
`- 5 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`materials:
`
`Ex. 1001 U.S. Patent No. RE40,264 (“’264 patent”)
`
`Ex. 1002 U.S. Patent 5,605,600 (“Muller”)
`
`Ex. 1003 U.S. Patent 5,151,871 (“Matsumura”)
`
`Ex. 1004 U.S. Patent 5,226,056 (“Kikuchi”)
`
`Ex. 1005 U.S. Patent 6,063,710 (“Kadomura”)
`
`Ex. 1007 U.S. Patent Application No. 08/567,224 (“’224 application”)
`
`Ex. 1008 Wright, D.R. et al., A Closed Loop Temperature Control System for
`a Low-Temperature Etch Chuck, Advanced Techniques for Integrat-
`ed Processing II, Vol. 1803 (1992), pp. 321–329 (“Wright”)
`
`Ex. 1009 U.S. Patent No. 5,711,849 (“’849 patent”)
`
`Ex. 1010 U.S. Patent No. 4,331,485 (“Gat”)
`
`Ex. 1011 U.S. Patent No. 5,393,374 (“Sato”)
`
`Ex. 1012
`
`Ex. 1013
`
`Ex. 1014
`
`Ex. 1015
`
`PTAB Decision Denying Institution of Inter Partes Review, Lam
`Research Corp. v. Daniel L. Flamm, IPR2016-00470, Paper 6 (July
`1, 2016).
`
`PTAB Institution of Inter Partes Review, Lam Research Corp. v.
`Daniel L. Flamm, IPR2015-01768, Paper 7 (February 24, 2016)
`
`Petition for Inter Partes Review of U.S. Patent No. RE40,264 E
`Fourth Petition, Lam Research Corp. v. Daniel L. Flamm, IPR2015-
`01768, Paper 1 (August 18, 2015)
`
`PTAB Decision Denying Institution of Inter Partes Review, Lam
`Research Corp. v. Daniel L. Flamm, IPR2016-00469, Paper 6 (July
`1, 2016)
`
`
`
`
`- 6 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`Ex. 1016
`
`PTAB Institution of Inter Partes Review, Lam Research Corp. v.
`Daniel L. Flamm, IPR2015-01764, Paper 7 (February 24, 2016)
`
`Ex. 1017 U.S. Patent No. 5,446,824 (“Moslehi ’824”)
`
`Ex. 1018 U.S. Patent No. 5,628,871 (“Shinagawa”)
`
`Ex. 1019 U.S. Patent No. 5,174,856 (“Hwang”)
`
`Ex. 1020 Declaration of Rachel J. Watters regarding Exhibit 1008
`
`I also refer to my curriculum vitae, which is attached as Appendix A to this decla-
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`ration.
`
`
`18.
`
`In connection with live testimony in this proceeding, should I be
`
`asked to provide it, I may use as exhibits various documents that refer to or relate
`
`to the matters contained within this declaration, or which are derived from the re-
`
`sults and analyses discussed in this declaration. Additionally, I may create or su-
`
`pervise the creation of certain demonstrative exhibits to assist me in testifying.
`
`
`19.
`
`I am prepared to use any or all of the above-referenced documents,
`
`and supplemental charts, models, and other representations based on those docu-
`
`ments, to support my live testimony in this proceeding regarding my opinions cov-
`
`ering the ’264 patent. If called upon to do so, I will offer live testimony regarding
`
`the opinions in this declaration.
`
`D. Level of Ordinary Skill in the Art
`
`
`20.
`
`It is my understanding that the claims and specification of a patent
`
`
`
`
`- 7 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
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`must be read and construed through the eyes of a person of ordinary skill in the art
`
`as of the priority date of the claims at issue. Counsel has also advised me that to
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`determine the appropriate level of one of ordinary skill in the art, the following fac-
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`tors may be considered: (a) the types of problems encountered by those working in
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`the field and prior art solutions to those problems; (b) the sophistication of the
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`technology in question, and the rapidity with which innovations occur in the field;
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`(c) the educational level of active workers in the field; and (d) the educational level
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`of the inventor.
`
` The relevant technology fields for the ’264 patent are semiconductor
`21.
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`processing and semiconductor processing equipment. In my opinion, for the pur-
`
`poses of the ’264 patent, a person of ordinary skill in the art, as of the priority date
`
`for the ’264 patent, would have generally have had either (i) a Bachelor’s degree in
`
`chemical engineering, electrical engineering, materials science engineering, phys-
`
`ics, chemistry, or a similar field, and three or four years of work experience in
`
`semiconductor manufacturing or related fields, (ii) a Master’s degree in chemical
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`engineering, electrical engineering, materials science engineering, physics, chemis-
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`try, or a similar field and two or three years of work experience in semiconductor
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`manufacturing or related fields, or (iii) a Ph.D. or equivalent doctoral degree in
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`chemical engineering, electrical engineering, materials science engineering, phys-
`
`ics, chemistry, or a similar field who had performed research related to semicon-
`
`
`
`
`- 8 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`ductor manufacturing or related fields.
`
` Based on this understanding of a person of ordinary skill in the art at
`22.
`
`the time of the alleged invention for the ’264 patent, I believe that I am at least a
`
`person having ordinary skill in the art for purposes of the ’264 patent, and that I
`
`was one prior to September 11, 1997. For example, my qualifications and experi-
`
`ences discussed above, and in my curriculum vitae (Appendix A), demonstrate my
`
`familiarity with and knowledge of the art of the ’264 patent. I therefore believe
`
`that I am qualified to offer this declaration as to how such a person would have in-
`
`terpreted the ’264 patent and the prior art on or about September 11, 1997. Unless
`
`otherwise stated, my statements below refer to the knowledge, beliefs and abilities
`
`of a person having ordinary skill in the art of the ’264 patent at the time of the pur-
`
`ported invention of the ’264 patent.
`
`II. Overview Regarding Technology
`
`A.
`
`
`23.
`
`Priority Date
`
`I have been informed that a claim of a patent is not entitled to the pri-
`
`ority date of an earlier application if that application does not disclose all limita-
`
`tions of the claim in question.
`
` The ’264 patent is a reissue of U.S. Patent No. 6,231,776 (the “’776
`24.
`
`patent”). The ’264 patent issued on April 29, 2008 from a reissue application filed
`
`on May 14, 2003. The ’776 patent issued from Application No. 09/151,163, filed
`
`
`
`
`- 9 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`on September 10, 1998. The ’776 patent claims priority to Provisional Application
`
`No. 60/058,650, filed on September 11, 1997, and further claims priority as a con-
`
`tinuation-in-part of Application No. 08/567,224, filed on December 4, 1995 (the
`
`“’224 application.”)
`
`
`25.
`
`It is my opinion that claims 27-36, 51-55, 66, 68, and 69 of the ’264
`
`patent (“challenged claims”) are not entitled to a priority date earlier than Septem-
`
`ber 11, 1997. I express no opinion regarding the correctness of the September 11,
`
`1997 or September 10, 1998 priority date, but I will use September 11, 1997 for
`
`purposes of this declaration. In my opinion, however, December 4, 1995 is not the
`
`correct priority date for the challenged claims because application No. 08/567,224
`
`does not disclose or adequately support the subject matter claimed in the chal-
`
`lenged claims.
`
`1. The Challenged Independent Claims
`
` Among other limitations, claim 27 recites “etching a first portion of
`26.
`
`the film at a selected first substrate temperature,” “etching a second portion of the
`
`film at a selected second substrate temperature,” and changing the “substrate tem-
`
`perature” from a “selected first substrate temperature to the selected second sub-
`
`strate temperature, using a measured substrate temperature, within a preselected
`
`time interval for processing….” (’264 patent at 22:15-28 (Ex. 1001)) Claim 27
`
`further requires “heating a substrate holder to a first substrate holder temperature
`
`
`
`
`- 10 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`with a heat transfer device, the substrate holder having at least one temperature
`
`sensing unit.” (’264 patent at 22:10-12 (Ex. 1001))
`
` Similarly, claim 51 recites: “performing a first etching of a first por-
`27.
`
`tion of the film at a selected first substrate temperature,” “performing a second
`
`etching of a second portion of the film at a selected second substrate tempera-
`
`ture…,” and “the substrate temperature control circuit effectuates the change from
`
`the first substrate temperature to the second substrate temperature within a prese-
`
`lected time period.” (’264 patent at 24:13-26 (Ex. 1001)) Claim 51 further re-
`
`quires “placing a substrate having a film thereon on a substrate holder in a pro-
`
`cessing chamber; the processing chamber comprising the substrate holder, a sub-
`
`strate control circuit operable to adjust the substrate temperature, a substrate holder
`
`temperature sensor, and a substrate holder control circuit operable to maintain the
`
`substrate holder temperature.” (’264 patent at 24:6-12 (Ex. 1001))
`
` Accordingly, independent claims 27 and 51 recite etching a film on a
`28.
`
`substrate at two different substrate etching temperatures and changing from the
`
`first substrate etching temperature to the second substrate etching temperature
`
`“within a preselected time” period or interval. Claims 27 and 51 also recite ele-
`
`ments that require measuring the temperature of the substrate itself—the use of a
`
`measured substrate temperature (claim 27) and a substrate control circuit to adjust
`
`the substrate temperature (claim 51). Claim 27 additionally requires that one of the
`
`
`
`
`- 11 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`etching temperatures is a substrate temperature above room temperature, while
`
`claim 51 requires that at least one etching step is performed “while heat is being
`
`transferred to the substrate holder with the substrate holder control circuit.”
`
`2. The Disclosure of Application No. 08/567,224, Filed on Decem-
`ber 4, 1995
`
`
`29.
`
`In my opinion, the ’224 application, filed on December 4, 1995, does
`
`not include written description sufficient to support any of claims 27-36, 51-55, 66,
`
`68, and 69 of the ’264 patent. Thus, the challenged claims are entitled to a priority
`
`date of no earlier than September 11, 1997, the date of Provisional Application No.
`
`60/058,650.
`
` Specifically, both claim 27 and claim 51 recite the concepts of etching
`30.
`
`the film at the selected first temperature and etching at a second portion of the film
`
`at the selected second temperature and changing from the first temperature to the
`
`second temperature within a specific preselected time interval/period.
`
`
`31.
`
`I was unable to find any discussion in the ’224 application of chang-
`
`ing the temperature of the substrate from a first temperature to a second tempera-
`
`ture within a preselected time period or within a preselected time interval. Fur-
`
`thermore, the only disclosure of two-temperature processing in the ’224 application
`
`is a disclosure of a technique well known at the time, changing the temperature by
`
`transferring a wafer between substrate holders held at different temperatures (either
`
`in the same processing chamber or in different chambers.) Specifically, the ’224
`
`
`
`
`- 12 -
`
`Intel, Exhibit 1028
`Intel v. Flamm, IPR2017-00279
`(Previously filed as Exhibit 1006 in IPR2017-00280)
`
`
`
`
`
`
`application discloses changing the temperature during plasma ashing by transfer-
`
`ring the wafer from a first resist stripping chamber with a half-wave helical resona-
`
`tor, in which a wafer is processed at a low temperature, to a second chamber with a
`
`resonator operating at a full-wave multiple, in which a wafer is processed at a
`
`higher temperature:
`
`An implant resist stripping process was performed to re-
`move the top implant hardened resist. This occurred by
`stripping using an “un-balanced” phase and anti-phase
`coupling relationship in a half-wave helical resonator.
`The half-wave helical resonator was configured in one of
`the process chambers. In this chamber, the pedestal had a
`temperature of about 40ºC to maintain a low wafer tem-
`perature. This low wafer temperature was maintained. to
`reduce the possibility of “popping.” Popping occurs
`when vapor in the underlying photoresist explodes
`through the implant hardened resist.
`
`After the top hardened layer was removed. The wafer
`was transferred into a chamber operating at a full-wave
`multiple. This chamber operated at a frequ