`ckao@velaw.com
`Brock S. Weber (SBN 261383)
`bweber@velaw.com
`VINSON & ELKINS LLP
`555 Mission Street, Suite 2000
`San Francisco, CA 94105
`Tel.: 415.979.6900
`Fax: 415.651.8786
`
`Christine Yang (SBN 102048)
`cyang@sjclawpc.com
`LAW OFFICE OF S.J. CHRISTINE YANG
`17220 Newhope Street, Suite 101-102
`Fountain Valley, CA 92708
`Tel.: 714.641.4022
`Fax: 714.641.2082
`Attorneys for Defendant
`Kingston Technology Company, Inc.
`UNITED STATES DISTRICT COURT
`CENTRAL DISTRICT OF CALIFORNIA
`
`Case No. 8:16-cv-300 CJC (RAO)
`
`DEFENDANT KINGSTON
`TECHNOLOGY COMPANY, INC.’S
`PRELIMINARY CLAIM
`CONSTRUCTIONS AND
`IDENTIFICATION OF
`SUPPORTING EVIDENCE
`
`POLARIS INNOVATIONS
`LIMITED, an Irish limited company
`
`Plaintiff,
`
`vs.
`
`KINGSTON TECHNOLOGY
`COMPANY, INC., a Delaware
`corporation,
`
`Defendant.
`
`Pursuant to the schedule agreed by the Parties in the Update to Joint Rule 26(f)
`Report (Dkt. 70), Defendant Kingston Technology Company, Inc. provides the
`following proposed claim constructions and identification of supporting evidence:
`Kingston’s Preliminary Claim Constructions and
`1
`Case No. 16-cv-300 CJC (RAO)
`Supporting Evidence
`
`1 2 3 4 5 6 7 8 9
`
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`23
`24
`25
`26
`27
`28
`
`Polaris Innovations Ltd. Exhibit 2002
`Kingston Tech. Comp. v. Polaris Innov. Ltd.
`IPR2017-00238 Page 2002-1
`
`
`
`Claim Term
`
`Claims
`
`Kingston’s Proposed
`Construction
`
`Intrinsic and Extrinsic
`Evidence
`
`Claim preamble
`
`’589 Patent cl. 11 Preamble is limiting
`
`“dynamic semiconductor
`memory device of a
`random access type”
`
`’589 Patent cl. 11 “dynamic random-access
`memory such as DRAM or
`SDRAM”
`
`“initialization circuit”
`
`’589 Patent cl. 11 Governed by 35 U.S.C. § 112
`¶ 6
`Function: Controlling a
`switching-on operation of the
`dynamic semiconductor
`memory device and of its circuit
`components
`Structure: A hardware circuit
`having the structure depicted in
`Figure 1
`
`“switching-on operation”
`
`’589 Patent cl. 11 “initial powering up operation”
`
`’589 Patent, including but not
`limited to: 6:36–54.
`
`’589 Patent, including but not
`limited to: 1:9–11; 1:22–23;
`1:43–46; 1:65–66; 2:46–47;
`3:47–48.
`
`’589 Patent, including but not
`limited to: Fig. 1; 2:15–28; 3:28–
`31; 3:51–4:23.
`
`’589 Patent, including but not
`limited to: Abstract; Fig. 3; 1:9–
`13; 1:16–21; 1:22–35; 1:43–2:5;
`2:7–14; 2:15–28; 2:34–37; 3:48–
`51; 4:3–8; 4:18–20; 4:59–63;
`5:10–21; 6:18–21; 6:60–64.
`
`1 2 3 4 5 6 7 8 9
`
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`
`Kingston’s Preliminary Claim Constructions and
`Supporting Evidence
`
`2
`
`Case No. 16-cv-300 CJC (RAO)
`
`Polaris Innovations Ltd. Exhibit 2002
`Kingston Tech. Comp. v. Polaris Innov. Ltd.
`IPR2017-00238 Page 2002-2
`
`
`
`Claim Term
`
`Claims
`
`Kingston’s Proposed
`Construction
`
`Intrinsic and Extrinsic
`Evidence
`
`“supply voltage stable
`signal”
`
`“enable circuit”
`
`’589 Patent cl. 11 “a signal that becomes active
`only when internal power
`supply voltages have reached
`the values necessary for proper
`operation of the component”
`
`’589 Patent, including but not
`limited to: Abstract; Fig. 3;
`1:13–16; 1:30–35; 2:15–21;
`2:60–62; 3:5–6; 3:61–67; 4:3–8;
`4:41–48.
`
`’589 Patent cl. 11 Governed by 35 U.S.C. § 112
`¶ 6
`Function: Supplying an enable
`signal
`Structure: A hardware circuit
`having the structure depicted in
`Figure 2 or 4
`
`’589 Patent, including but not
`limited to: Figs. 2, 4; 2:21–37;
`2:46–3:9; 3:32–33; 3:36–37;
`4:9–23; 4:24–58; 5:22–29.
`
`“enable signal”
`
`’589 Patent cl. 11 “a signal that is asserted only
`upon completion of an
`initialization sequence in order
`to activate proper operation of a
`device”
`
`’589 Patent, including but not
`limited to: Abstract; Figs. 2, 3, 4;
`2:21–28; 2:31–41; 2:62–64;
`3:32–33; 4:14–20; 4:33–36;
`4:49–58; 4:63–5:3; 5:10–21.
`
`“unlatching of a control
`circuit provided for a
`proper operation of the
`dynamic semiconductor
`memory device”
`
`’589 Patent cl. 11 “switching a control circuit
`from a disabled state to an
`enabled state to activate proper
`operation of the dynamic
`semiconductor memory device”
`
`’589 Patent, including but not
`limited to: Abstract; 1:22–30;
`1:43–2:5; 2:7–14; 2:31–45;
`4:14–20; 4:49–58; 6:18–21;
`6:60–64.
`
`1 2 3 4 5 6 7 8 9
`
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`
`Kingston’s Preliminary Claim Constructions and
`Supporting Evidence
`
`3
`
`Case No. 16-cv-300 CJC (RAO)
`
`Polaris Innovations Ltd. Exhibit 2002
`Kingston Tech. Comp. v. Polaris Innov. Ltd.
`IPR2017-00238 Page 2002-3
`
`