`Petitioner - Apple, Inc.
`Patent Owner - Papst Licensing GmbH & Co., KG.
`IPR2017-00158
`EXH. 2003
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`1
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`to malfunction and which limit data transfer rates between the device connected to the interface
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`and the host device and vice Versa. Further, it is often very difficult to implement such interfaces
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`for portable systems and they offer few possibilities for adaptation with the result that such
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`systems offer little flexibility.
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`[0005]
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`The devices from which data is to be acquired cover the entire electrical
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`engineering spectrum. In a typical case, it is assumed that a customer who operates, for example,
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`a diagnostic radiology system in a medical engineering environment reports a fault. A field
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`service technician of the system manufacturer visits the customer and reads system log files
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`generated by the diagnostic radiology system by means a portable computer or laptop for
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`example. If the fault cannot be localized or if the fault is intermittent, it will be necessary for the
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`service technician to read not only an error log file but also data from current operation.
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`It is
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`apparent that in this case fast data transfer and rapid data analysis are necessary.
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`[0006]
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`Another case requiring the use of an interface could be, for example, when an
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`electronic measuring device, e.g. a multimeter, is attached to a computer system to transfer the
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`data measured by the multimeter to the computer. Particularly when long-term measurements or
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`large volumes of data are involved is it necessary for the interface to support a high data transfer
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`rate.
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`[0007]
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`From these randomly chosen examples it can be seen that an interface may be put
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`to totally different uses.
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`It is therefore desirable that an interface be sufficiently flexible to
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`permit attachment of very different electrical or electronic systems to a host device by means of
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`the interface. To prevent operator error, it is also desirable that a service technician is not
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`required to operate different interfaces in different ways for different applications but that, if
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`2
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`possible, a universal method of operating the interface be provided for a large number of
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`applications.
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`[0008]
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`To increase the data transfer rates across an interface, the route chosen in the
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`second group of data acquisition systems for the interface devices was to specifically match the
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`interface very closely to individual host systems or computer systems. The advantage of this
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`solution is that high data transfer rates are possible. However, a disadvantage is that the drivers
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`for the interfaces of the second group are very closely matched to a single host system with the
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`result that they generally cannot be used with other host systems or their use is very ineffective.
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`Further, such types of interface have the disadvantage that they must be installed inside the
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`computer casing to achieve maximum data transfer rates as they access the internal host bus
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`system. They are therefore generally not suitable for portable host systems in the form of laptops
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`whose minimum possible size leaves little internal space to plug in an interface card.
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`[0009]
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`A solution to this problem is offered by the interface devices of lOtech (business
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`address: 25971 Cannon Road, Cleveland, Ohio 44146, USA) which are suitable for laptops such
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`as the WaveBook/512 (registered trademark). The interface devices are connected by means of a
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`plug-in card, approximately the size of a credit card, to the PCMCIA interface which is now a
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`standard feature in laptops. The plug-in card converts the PCMCIA interface into an interface
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`known in the art as IEEE 1284. The said plug-in card provides a special printer interface which
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`is enhanced as regards the data transfer rate and delivers a data transfer rate of approximately 2
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`MBps as compared with a rate of approx.
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`1 MBps for known printer interfaces. The known
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`interface device generally consists of a driver component, a digital signal processor, a buffer and
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`a hardware module which terminates in a connector to which the device whose data is to be
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`acquired is attached. The driver component is attached directly to the enhanced printer interface
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`3
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`
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`thus permitting the known interface device to establish a connection between a computer and the
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`device whose data is to be acquired.
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`[0010]
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`In order to work with the said interface, an interface-specific driver must be
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`installed on the host device so that the host device can communicate with the digital signal
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`processor of the interface card. As described above, the driver must be installed on the host
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`device.
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`If the driver is a driver developed specifically for the host device, a high data transfer
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`rate is achieved but the driver carmot be easily installed on a different host system. However, if
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`the driver is a general driver which is as flexible as possible and which can be used on many host
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`devices, compromises must be accepted with regard to the data transfer rate.
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`[0011]
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`Particularly in an application for multi-tasking systems in which several different
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`tasks such as data acquisition, data display and editing are to be performed quasi-simultaneously,
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`each task is normally assigned a certain priority by the host system. A driver supporting a
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`special task requests the central processing system of the host device for processor resources in
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`order to perform its task. Depending on the particular priority assignment method and on the
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`driver implementation, a particular share of processor resources is assigned to a special task in
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`particular time slots. Conflicts arise if one or more drivers are implemented in such a way that
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`they have the highest priority by default, i.e. they are incompatible, as happens in practice in
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`many applications.
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`It may occur that both drivers are set to highest priority which, in the worst
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`case, can result in a system crash.
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`[0012]
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`EP 0685799 Al discloses an interface by means of which several peripheral
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`devices can be attached to a bus. An interface is connected between the bus of a host device and
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`various peripheral devices. The interface comprises a finite state machine and several branches
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`each of which is assigned to a peripheral device. Each branch comprises a data manager, cycle
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`4
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`
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`control, user logic and a buffer. This known interface device provides optimal matching between
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`a host device and a specific peripheral device.
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`[0013]
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`The specialist publication IBM Technical Disclosure Bulletin, Vol. 38, No. 05,
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`page 245; "Communication Method between Devices through FDD Interface" discloses an
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`interface which connects a host device to a peripheral device via a floppy disk drive interface.
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`The interface consists in particular of an address generator, an MFM encoder/decoder, a
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`serial/parallel adapter and a format signal generator. The interface makes it possible to attach not
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`only a floppy disk drive but also a further peripheral device to the FDD host controller of a host
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`device. The host device assumes that a floppy disk drive is always attached to its floppy disk
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`drive controller and communication is initiated if the address is correct. However, this document
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`contains no information as to how communication should be possible if the interface is
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`connected to a multi-purpose interface instead of to a floppy disk drive controller.
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`SUMMARY OF THE INVENTION
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`[0014]
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`It
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`is the object of the present
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`invention to provide an interface device for
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`communication between a host device and a data transmit/receive device whose use is host
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`device-independent and which delivers a high data transfer rate.
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`[0015]
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`The present invention is based on the finding that both a high data transfer rate
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`and host device-independent use can be achieved if a driver for an input/output device customary
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`in a host device, normally present in most commercially available host devices,
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`is utilized.
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`Drivers for input/output devices customary in a host device which are found in practically all
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`host devices are, for example, drivers for hard disks, for graphics devices or for printer devices.
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`As however the hard disk interfaces in common host devices which can be, for example, IBM
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`5
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`
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`PCs, IBM-compatible PCs, Commodore PCs, Apple computers or even workstations, are the
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`interfaces with the highest data transfer rate, the hard disk driver is utilized in the preferred
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`embodiment of the interface device of the present invention. Drivers for other storage devices
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`such as floppy disk drives, CD—ROM drives or tape drives could also be utilized in order to
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`implement the interface device according to the present invention.
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`[0016]
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`As described in the following,
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`the interface device according to the present
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`invention is to be attached to a host device by means of a multi-purpose interface of the host
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`device which can be implemented, for example, as an SCSI interface or as an enhanced printer
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`interface. Multi-purpose interfaces comprise both an interface card and specific driver software
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`for the interface card. The driver software can be designed so that it can replace the BIOS driver
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`routines. Communication between the host device and the devices attached to the multi-purpose
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`interface then essentially takes place by means of the specific driver software for the multi-
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`purpose interface and no longer primarily by means of BIOS routines of the host device.
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`Recently however drivers for multi-purpose interfaces can also already be integrated in the BIOS
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`system of the host device as, alongside classical input/output interfaces, multi-purpose interfaces
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`are becoming increasingly common in host devices.
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`It is of course also possible to use BIOS
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`routines in parallel with the specific driver software for the multi-purpose interface, if this is
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`desired.
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`[0017]
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`The interface device according to the present invention comprises a processor
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`means, a memory means, a first connecting device for interfacing the host device with the
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`interface device, and a second connecting device for interfacing the interface device with the
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`data transmit/receive device. The interface device is configured by the processor means and the
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`memory means in such a way that the interface device, when receiving an inquiry from the host
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`6
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`device via the first connecting device as to the type of a device attached to the host device, sends
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`a signal, regardless of the type of the data transmit/receive device, to the host device via the first
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`connecting device which signals to the host device that it is communicating with an input/output
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`device. The interface device according to the present invention therefore simulates, both in
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`terms of hardware and software, the way in which a conventional input/output device functions,
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`preferably that of a hard disk drive. As support for hard disks is implemented as standard in all
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`commercially available host systems, the simulation of a hard disk, for example, can provide
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`host device-independent use. The interface device according to the present invention therefore
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`no longer communicates with the host device or computer by means of a specially designed
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`driver but by means of a program which is present in the BIOS system (Basic Input/Output
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`System) and is normally precisely matched to the specific computer system on which it is
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`installed, or by means of a specific program for the multi-purpose interface. Consequently, the
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`interface device according to the present invention combines the advantages of both groups. On
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`the one hand, communication between the computer and the interface takes place by means of a
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`host device-specific BIOS program or by means of a driver program which is matched to the
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`multi—purpose interface and which could be regarded as a "device-specific driver". On the other
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`hand, the BIOS program or a corresponding multi—purpose interface program which operates one
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`of the common input/output interfaces in host systems is therefore present in all host systems so
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`that the interface device according to the present invention is host device—independent.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`[0018]
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`In the following, preferred embodiments of the present
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`invention will be
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`explained in more detail with reference to the drawings enclosed, in which:
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`7
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`
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`[0019]
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`FIG.
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`1 shows a general block diagram of the interface device according to the
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`present invention; and
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`[0020]
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`FIG. 2 shows a detailed block diagram of an interface device according to a
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`preferred embodiment of the present invention.
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`DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
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`[0021]
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`It should be understood that the title of this section of this specification, namely,
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`“Detailed Description Of The Invention”, relates to a requirement of the United States Patent
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`Office, and does not imply, nor should be inferred to limit the subject matter disclosed herein.
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`[0022]
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`FIG.
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`1 shows a general block diagram of an interface device 10 according to the
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`present invention. A first connecting device 12 of the interface device 10 can be attached to a
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`host device (not shown) via a host line ll. The first connecting device is attached both to a
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`digital signal processor 13 and to a memory means 14. The digital signal processor 13 and the
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`memory means 14 are also attached to a second connecting device 15 by means of bi-directional
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`communication lines (shown for all lines by means of two directional arrows). The second
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`connecting device can be attached by means of an output line 16 to a data transmit/receive device
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`which is to receive data from the host device or from which data is to be read, i.e. acquired, and
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`transferred to the host device. The data transmit/receive device itself can also communicate
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`actively with the host device via the first and second connecting device, as described in more
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`detail in the following.
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`[0023]
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`Communication between the host system or host device and the interface device is
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`based on known standard access commands as supported by all known operating systems (eg.
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`DOS, Windows, Unix). Preferably, the interface device according to the present invention
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`8
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`
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`simulates a hard disk with a root directory whose entries are "virtual" files which can be created
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`for the most varied functions. When the host device system with which the interface device
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`according to the present invention is connected is booted and a data transmit/receive device is
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`also attached to the interface device 10, usual BIOS routines or multi-purpose interface programs
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`issue an instruction, known by those skilled in the art as the INQUIRY instruction,
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`to the
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`input/output interfaces in the host device. The digital signal processor 13 receives this inquiry
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`instruction via the first connecting device and generates a signal which is sent to the host device
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`(not shown) again via the first connecting device 12 and the host line 11. This signal indicates to
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`the host device that, for example, a hard disk drive is attached at the interface to which the
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`INQUIRY instruction was sent. Optionally, the host device can send an instruction, known by
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`those skilled in the art as "Test Unit Ready", to the interface device to request more precise
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`details regarding the queried device.
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`[0024]
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`Regardless of which data transmit/receive device at the output line 16 is attached
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`to the second connecting device, the digital signal processor 13 informs the host device that it is
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`communicating with a hard disk drive.
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`If the host device receives the response that a drive is
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`present, it then sends a request to the interface device 10 to read the boot sequence which, on
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`actual hard disks, normally resides on the first sectors of the disk. The digital signal processor
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`13, whose operating system in stored in the memory means 14, responds to this instruction by
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`sending to the host device a virtual boot sequence which, in the case of actual drives, includes
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`the drive type, the starting position and the length of the file allocation table (FAT), the number
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`of sectors, etc., known to those skilled in the art. Once the host device has received this data, it
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`assumes that
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`the interface device 10 according to a preferred embodiment of the present
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`invention is a hard disk drive.
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`In reply to an instruction from the host device to display the
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`9
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`
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`directory of the "virtual" hard disk drive simulated by the interface device 10 with respect to the
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`host device, the digital signal processor can respond to the host device in exactly the same way
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`as a conventional hard disk would, namely by reading on request the file allocation table or FAT
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`on a sector specified in the boot sequence, normally the first writable sector, and transferring it to
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`the host device, and subsequently by transferring the directory structure of the virtual hard disk.
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`Further, it is possible that the FAT is not read until immediately prior to reading or storing the
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`data of the "virtual" hard disk and not already at initialization.
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`[0025]
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`In a preferred embodiment of the present invention, the digital signal processor
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`13, which need not necessarily be implemented as a digital signal processor but may be any other
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`kind of microprocessor, comprises a first and a second command interpreter. The first command
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`interpreter carries out the steps described above whilst the second command interpreter carries
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`out the read/write assigmnent to specific functions. If the user now wishes to read data from the
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`data transmit/receive device via the line 16, the host device sends a command, for example "read
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`file xy", to the interface device. As described above, the interface device appears to the host
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`device as a hard disk. The second command interpreter of the digital signal processor now
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`interprets the read command of the host processor as a data transfer command, by decoding
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`whether "xy" denotes, for example, a "real—time input" file, a "configuration" file or an
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`executable file, whereby the same begins to transfer data from the data transmit/receive device
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`via the second connecting device to the first connecting device and via the line 11 to the host
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`device.
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`[0026]
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`Preferably, the volume of data to be acquired by a data transmit/receive device is
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`specified in a configuration file described in the following by the user specifying in the said
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`configuration file that a measurement is to last, for example, five minutes. To the host device the
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`10
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`
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`"real-time input" file then appears as a file whose length corresponds to the anticipated volume
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`of data in those five minutes. Those skilled in the art know that communication between a
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`processor and a hard disk consists of the processor transferring to the hard disk the numbers of
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`the blocks or clusters or sectors whose contents it wishes to read. By reference to the FAT the
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`processor knows which information is contained in which block.
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`In this case, communication
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`between the host device and the interface device according to the present invention therefore
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`consists of the very fast transfer of block numbers and preferably of block number ranges
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`because a virtual "real-time input" file will not be fragmented. If the host device now wants to
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`read the "real—time input" file, it transfers a range of block numbers to the interface device,
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`whereupon data commences to be received via the second connecting device and data
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`commences to be sent to the host device via the first connecting device.
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`[0027]
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`In addition to the digital signal processor instruction memory, which comprises
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`the operating system of the digital signal processor and can be implemented as an EPROM or
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`EEPROM, the memory means 14 can have an additional buffer for purposes of synchronizing
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`data transfer from the data transmit/receive device to the interface device 10 and data transfer
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`from the interface device 10 to the host device.
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`[0028]
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`Preferably, the buffer is implemented as a fast random access memory or RAM
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`buffer.
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`[0029]
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`Further, from the host device the user can also create a configuration file, whose
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`entries automatically set and control various functions of the interface device 10, on the interface
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`device 10 which appears to the host device as a hard disk. These settings can be, for example,
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`gain, multiplex or sampling rate settings. By creating and editing a configuration file, normally a
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`text file which is simple to understand with little prior knowledge, users of the interface device
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`11
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`
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`10 are able to perform essentially identical operator actions for almost any data transmit/receive
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`devices which can be attached to the second connecting device via the line 16, thus eliminating a
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`source of error arising from users having to know many different command codes for different
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`applications.
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`In the case of the interface device 10 according to the present invention it is
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`necessary for users to note the conventions of the configuration file Once only in order to be able
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`to use the interface device 10 as an interface between a host device and almost any data
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`transmit/receive device.
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`[0030]
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`As a result of the option of storing any files in agreed formats in the memory
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`means 14 of the interface device 10, taking into account the maximum capacity of the memory
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`means, any enhancements or even completely new functions of the interface device 10 can be
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`quickly implemented. Even files executable by the host device, such as batch files or executable
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`files (BAT or EXE files), and also help files can be implemented in the interface device, thus
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`achieving independence of the interface device 10 from any additional software (With the
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`exception of the BIOS routines) of the host device. On the one hand, this avoids licensing and/or
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`registration problems and, on the other hand,
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`installation of certain routines which can be
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`frequently used, for example an FFT routine to examine acquired time-domain data in the
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`frequency domain, is rendered unnecessary as the EXE files are already installed on the interface
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`device 10 and appear in the virtual root directory, by means of which the host device can access
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`all programs stored on the interface device 10.
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`[0031]
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`In a preferred embodiment of the present invention in which the interface device
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`10 simulates a hard disk to the host device, the interface device is automatically detected and
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`readied for operation when the host system is powered up or booted. This corresponds to the
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`plug-and-play standard which is currently finding increasingly widespread use. The user is no
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`12
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`
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`longer responsible for installing the interface device 10 on the host device by means of specific
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`drivers which must also be loaded; instead the interface device 10 is automatically readied for
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`operation when the host system is booted.
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`[0032]
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`For persons skilled in the art it is however obvious that the interface device 10 is
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`not necessarily signed on when the computer system is powered up but that a special BIOS
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`routine or a driver for a multi-purpose interface can also be started on the host device during
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`current operation of the computer system in order to sign on or mount the interface device 10 as
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`an additional hard disk. This embodiment is suitable for larger workstation systems which are
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`essentially never powered down as they perform, e. g. mail functions or monitor processes which
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`run continuously, for example, in multi-tasking environments.
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`[0033]
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`In the interface device according to the present invention an enormous advantage
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`is to be gained, as apparent in the embodiment described in the following, in separating the
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`actual hardware required to attach the interface device 10 to the data transmit/receive device
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`from the communication unit, which is implemented by the digital signal processor 13, the
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`memory means 14 and the first connecting device 12, as this allows a plurality of dissimilar
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`device types to be operated in parallel in identical manner. Accordingly, many interface devices
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`10 can be connected to a host device which then sees many different "virtual" hard disks.
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`In
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`addition, any modification of the specific hardware symbolized by the second connecting device
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`15 can be implemented essentially without changing the operation of the interface device
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`according to the present invention. Further, an experienced user can intervene at any time on any
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`level of the existing second connecting device by making use of the above mentioned option of
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`creating a configuration file or adding or storing new program sections for the second connecting
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`device.
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`13
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`
`
`[0034]
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`An important advantage of the interface device 10 of the present invention is that
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`it also permits extremely high data transfer rates by using, for data interchange, the host device-
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`own BIOS routines which are optimized for each host device by the host device manufacturer or
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`BIOS system manufacturer, or by using driver programs which are normally optimized and
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`included by the manufacturers of multi-purpose interfaces. Furthermore, due to the simulation of
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`a virtual mass storage device, the data is managed and made available in such a way that it can
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`be transferred directly to other storage media, e.g. to an actual hard disk of the host device
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`without, as it were, intervention of the host device processor. The only limitation to long-terrn
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`data transfer at high speed is therefore imposed exclusively by the speed and the size of the mass
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`storage device of the host device. This is the case as the digital signal processor 13 already
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`formats the data read by the data transmit/receive device via the second connecting device 15
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`into block sizes suitable for a hard disk of the host device, whereby the data transfer speed is
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`limited only by the mechanical latency of the hard disk system of the host device. At this point,
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`it should be noted that normally data flow from a host device must be formatted in blocks to
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`permit writing to a hard disk and subsequent reading from a hard disk, as known by those skilled
`
`in the art.
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`[0035]
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`The said data transfer rate can be increased further by setting up a direct memory
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`access (DMA) or RAM drive in the host system. As those skilled in the art know, the setting up
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`of a RAM drive requires processor resources of the host device, with the result that the
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`advantage of writing the data to a hard disk drive of the host device essentially without the need
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`for processor resources is lost.
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`[0036]
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`As described above, a data buffer can be implemented in the memory means 14 to
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`permit independence in terms of time of the data transmit/receive device attached to the second
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`14
`
`
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`connecting device from the host device attached to the first connecting device. This guarantees
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`error-free operation of the interface device 10 even for time-critical applications in multi-tasking
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`host systems.
`
`[0037]
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`FIG. 2 shows a detailed block diagram of an interface device 10 according to the
`
`present invention.
`
`[0038]
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`A digital signal processor (DSP) 1300 is, in a manner of speaking, the heart of the
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`interface device 10. The DSP can be any DSP but preferably has a 20-MB on-chip random
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`access memory (RAM). Certain instruction sets, for example, can be stored in the RAM already
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`integrated in the DSP. An 80—MHz clock generator is attached to the DSP 1300 in order to
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`synchronize the DSP. The DSP implements a fast Fourier transformation (FFT) in real time and
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`also optional data compression of the data to be transferred from the data transmit/receive device
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`to the host device in order to achieve greater efficiency and to permit interoperation with host
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`devices which have a smaller memory.
`
`[0039]
`
`In the preferred embodiment of the interface device 10 shown in FIG. 2, the first
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`connecting device 12 of FIG. 1 contains the following components: an SCSI interface 1220 and a
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`50-pin SCSI connector 1240 for attachment to an SCSI interface present on most host devices or
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`laptops. The SCSI (small computer system interface) interface 1220 translates the data received
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`via the SCSI connector 1240 into data understood by the DSP 1300, as known by those skilled in
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`the art. Further, the first connecting device l2 comprises an EPP (enhanced parallel port) with a
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`data transfer rate of approx.
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`1 MBps which delivers a more moderate data transfer rate of l
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`MBps by comparison to the data transfer rate of 10 MBps of the SCSI interface. The EPP 1260
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`is connected to a 25-pin D-shell connector 1280 to permit attachment to a printer interface of a
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`host device for example. Optionally, the first connecting device 12 also comprises a 25-pin
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`15
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`
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`connector 1282 which permits the attachment of 8 digital outputs and 8 digital inputs 1284 at a
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`host device.
`
`[0040]
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`Preferably,
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`the second connecting device comprises 8 BNC inputs with the
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`calibration relay 1505, a block 1510 with 8 device amplifiers with an overvoltage protection of
`
`.+—.75 V,
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`this block being connected in turn to 8 sample/hold (S&H) circuits 1515. The
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`calibration relays are relays which permit controlled changeover between a test voltage and a
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`calibration reference voltage. Each sample/hold circuit is connected to a corresponding input of
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`an 8-channel multiplexer 1520 which feeds its output signals via a programmable amplifier 1525
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`into an analog/digital converter (ADC) with 12 bit and 1.25 MHZ 1530 and to the DSP 1300.
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`The ADC 1530 is controlled by means of a 20-bit timer 1535, as known by persons skilled in the
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`art. The programmable amplifier 1525 and the 8-channel multiplexer 1520 are controlled via an
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`amplifier channel selection circuit 1540 which is in turn controlled by the DSP 1300.
`
`[0041]
`
`The complete interface device 10 is supplied with power by an external AC/DC
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`converter 1800 which delivers a digital supply voltage of .+-.5 V and is attached to a DC/DC
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`converter 1810 which can deliver analog supply voltages of .+-.5 V and .+-.15 V as required for
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`the interface device 10. Further, the DC/DC converter controls a precision voltage reference
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`1820 which controls the 8 BNC inputs 1505 and the ADC 1530 as well as a digital/analog
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`converter (DAC) 1830 which permits, via an output amplifier block with 4 output amplifiers
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`1840 and a 9—pin connector 1850, analog output direct from the DSP 1300 to an output device,
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`eg. printer device or monitor device, which can be attached via the 9—pin connector 1850, thus
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`providing the option of monitoring the data transferred to the host device or also, for example, of
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`viewing an FFT to obtain rapid and comprehensive data analysis without using processor time of
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`the host device.
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`16
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`
`
`[0042]
`
`In FIG. 2 the memory means 14 of FIG.
`
`1
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`is implemented by an EPROM 1400
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`which, in a preferred embodiment of the present invention, contains the operating system of the
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`digital signal processor 1300. A random access memory with an access time of 15 ns and a size
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`of 512 KB or optionally 1024 KB 1420 serves as a data buffer to achieve independence in terms
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`of time of the output line 16 from the output lines 11a, 11b and 11c to the data transmit/receive
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`device and to the host device respectively. As described above, in a preferred embodiment of the
`
`present invention the digital signal processor 1300 already contains a 20-KB on-chip RAM 1440
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`which can store certain instruction sets, functions and also smaller application software units.
`
`[0043]
`
`The connection, symbolized by the line 16, of the interface device 10 to any data
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`transmit/receive device implements, by means of the blocks 1505-1535, an analog input with a
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`sampling rate of 1.25 MHz and quantization of 12 bits. There are 8 channels with an overvoltage
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`protection of .+—.75 V. By means of the programmable amplifier 1525 the channels can be
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`programmed independently of each other in voltage ranges up to a maximum of .+-.10 V.
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`Unused chatmels can be grounded internally to reduce channel intermodulation. The block 1515
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`is
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`implemented as a monolithic high—precision, high-speed sample/hold amplifier
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`for
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`simultaneous sampling of all channels. The precision voltage reference 1820 provides a high-
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`precision, temperature—c0mpensated monolithic energy gap voltage reference for auto-calibration
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`of each channel and each gain. Further, offset fine adjustment for each channel is implemented
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`by the same.
`
`[0044]
`
`The blocks 1830, 1840 and 1850 implement a direct analog output for the digital
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`signal processor 1300, and the DAC 1830 provides a data transfer rate of 625 kHz and a
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`quantization of 12 bits. The block 1840 comprises 4 channels with a common output latch.
`
`[0045]
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`Further,
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`the interface device
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`10 comprises a digital
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`input/output device
`
`17
`
`
`
`implemented by the blocks l284 and I282. Here there are 8 digital inputs, 8 digital outp