UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`APPLE, INC.
`PETITIONER
`
`V.
`
`PAPST LICENSING GMBH & CO., KG
`PATENT OWNER
`______________________
`
`CASE IPR2017-00158
`
`U.S. PATENT NO. 8,504,746
`
`______________________
`
`DECLARATION OF DR. KENNETH FERNALD UNDER 37 C.F.R. § 42.53
`
`Papst Licensing GmbH & Co., KG.
`Petitioner - Apple, Inc.
`Patent Owner - Papst Licensing GmbH & Co., KG.
`IPR2017-00158
`EXH. 2001
`
`1
`
`

`

`I.
`
`TABLE OF CONTENTS
`
`
`I.
`
`II.
`
`III.
`
`IV.
`
`V.
`
`TABLE OF CONTENTS ................................................................................................... II
`
`INTRODUCTION ............................................................................................................. 1
`
`QUALIFICATIONS .......................................................................................................... 1
`
`COMPENSATION AND PRIOR TESTIMONY .............................................................. 4
`
`INFORMATION CONSIDERED ..................................................................................... 5
`
`VI.
`
`RELEVANT LEGAL STANDARDS ............................................................................... 6
`
`A. Written Description Sufficiency ............................................................................ 6
`
`VII.
`
`PERSON OF ORDINARY SKILL IN THE ART ............................................................. 6
`
`VIII. SUMMARY OF THE ‘746 PATENT ............................................................................... 7
`
`IX.
`
`ANALYSIS AND OPINIONS .......................................................................................... 8
`
`A.
`
`B.
`
`The ‘283 Application Supports the Claimed “File System” .................................. 8
`
`The ‘778 Application Supports the Claimed “File System” ................................ 11
`
`X.
`
`CONCLUDING REMARKS ........................................................................................... 14
`
`XI.
`
`EXHIBIT A: CURRICULUM VITAE OF DR. KENNETH W. FERNALD ................. 15
`
`XII. EXHIBIT B: MATERIALS CONSIDERED................................................................... 21
`
`
`
`
`
`
`
`ii
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`2
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`

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`II.
`
`INTRODUCTION
`
`1. My name is Kenneth Fernald, Ph.D. I have been retained by counsel
`
`for Papst Licensing GmbH & Co., KG as an expert witness in the above-captioned
`
`proceeding.
`
`2.
`
`I understand that Apple, Inc. (“Petitioner”) has alleged claims 1, 4, 6–
`
`8, 10, 11, 14, 20, 21, 23, and 30 of U.S. Patent No. 8,504,746 (“the ‘746 Patent”)
`
`are unpatentable over the prior art cited in the above-captioned inter partes review.
`
`3.
`
`I have been asked to provide an opinion regarding the sufficiency of
`
`U.S. Application No. 11/928,283 (“the ‘283 application”) and U.S. Application
`
`No. 11/078,778 (“the ‘778 application”) in supporting certain claimed features of
`
`the ‘746 patent.
`
`III. QUALIFICATIONS
`
`4. My qualifications are summarized here and are addressed more fully
`
`in my CV attached as EXHIBIT A. I earned my Bachelor of Science and Master
`
`of Science degrees in Electrical Engineering from North Carolina State University
`
`(NCSU) in 1985 and 1987. During this period, I worked for the Space Electronics
`
`Group developing software for predicting the effects of radiation environments on
`
`integrated circuits. I also consulted for the Naval Research Laboratory (NRL). My
`
`services to NRL included the design of dosimetry instrumentation and the execu-
`
`tion of radiation studies on electronic devices at various facilities around the Unit-
`
`
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`1
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`3
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`

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`ed States. I joined NASA Langley Research Center in 1987 where I designed mo-
`
`tor control instruments and firmware for ground and space station experiments.
`
`5.
`
`I returned to NCSU in 1988 to earn my Ph.D. in Electrical Engineer-
`
`ing. My doctoral research efforts were funded by the National Science Foundation
`
`and focused on the development of medical systems utilizing wireless digital te-
`
`lemetry. My work included a thorough investigation of medical telemetry technol-
`
`ogy and design of a microprocessor-based system for the fast prototyping of im-
`
`plantable medical instruments. I also completed the design and testing of various
`
`components of this system, including a bidirectional digital telemetry integrated
`
`circuit (IC) and a general-purpose sensor interface and conversion IC. I completed
`
`my Ph.D. in 1992, after which I joined Intermedics Inc. in Angleton, Texas.
`
`6. My responsibilities at Intermedics included system and circuit design
`
`of telemetry, signal-processing, and control ICs for medical devices. Examples in-
`
`clude the design of a sensor acquisition, compression, and storage IC for implanta-
`
`ble pacemakers and defibrillators. I also worked on advanced wireless digital te-
`
`lemetry technology, control ICs for therapy delivery in defibrillators, and software
`
`development for sensor waveform compression and recovery. I left Intermedics in
`
`1998 to join Analog Devices Inc. in Greensboro, NC.
`
`7. My work at Analog Devices included the design of advanced ICs for
`
`wireless digital communication devices. Specific projects included the design, de-
`
`
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`2
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`4
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`

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`bug, and testing of a base-band receiver IC for digital satellite systems. This IC
`
`performed QPSK demodulation, symbol recovery, and forward-error correction for
`
`high-bandwidth wireless video signals. I also performed system design for a
`
`CDMA base-band transceiver IC for personal communication devices.
`
`8.
`
`I rejoined Intermedics in 1998 as the first employee of an IC design
`
`group in Austin, Texas. I continued to work on next-generation medical telemetry
`
`ICs until Intermedics was acquired by Guidant in 1999. At that time I joined Cyg-
`
`nal Integrated Products, a startup company in Austin, Texas. My responsibilities at
`
`Cygnal included the design and development of mixed-signal embedded products
`
`for industrial and instrumentation applications. Specific projects included the de-
`
`sign of a proprietary communication system for in-system debug, a proprietary
`
`clock recovery method for USB devices, and the design of numerous analog and
`
`digital circuits and systems. I remained at Cygnal until its acquisition by Silicon
`
`Laboratories Inc. in 2003, at which time I joined Zilker Labs, a start-up company
`
`in Austin, Texas, as their first VP of Engineering and later became their Chief
`
`Technical Officer.
`
`9. My responsibilities at Zilker Labs included the development of ad-
`
`vanced IC technologies for power management and delivery for board-level elec-
`
`tronic systems. Specific duties included architecture design and firmware devel-
`
`opment for all Zilker Labs products. I left Zilker Labs in 2006 to join Keterex as
`
`
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`3
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`5
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`

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`their first VP of Engineering. My responsibilities at Keterex included management
`
`of engineering resources, design and layout of application-specific integrated cir-
`
`cuits, and development of software and firmware for Keterex products. I joined
`
`Silicon Laboratories in 2010 as a Principal Design Engineer and now hold the title
`
`of Distinguished Engineer. My responsibilities include architecture development
`
`and design of 8-bit and 32-bit microcontrollers. Projects have included microcon-
`
`trollers for metrology, motor control, and low-power and USB applications.
`
`10.
`
`I hold over 55 patents on technologies such as wireless telemetry for
`
`medical devices, low-power analog-to-digital converters, security in embedded
`
`systems, clock recovery in communication systems, serial communication proto-
`
`cols, and power management and conversion. I have authored or co-authored over
`
`20 articles, presentations, and seminars on topics including radiation effects in mi-
`
`croelectronics, wireless medical devices, low-power circuit design, circuit design
`
`for digital communications, microcontrollers and embedded systems, and power
`
`management. I am also a co-author of the PMBus™ Power System Management
`
`Protocol Specification.
`
`IV. COMPENSATION AND PRIOR TESTIMONY
`
`11.
`
`I am being compensated at a rate of $350 per hour for my work in this
`
`matter. I am being reimbursed for reasonable and customary expenses associated
`
`
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`4
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`6
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`

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`with my work in this investigation. My compensation is not contingent on the out-
`
`come of this matter or the specifics of my testimony.
`
`12. Within the last five years, I have testified by deposition in the follow-
`
`ing cases (with underline indicating the represented party):
`
` Papst Licensing GmbH & Co., KG v. Apple, Case 6:15-cv-1095, deposed
`December 1, 2016.
`
` InfoBionic, Inc. v. Braemar Manufacturing, LLC, Cases IPR2015-01679
`and IPR2015-01688, deposed July 26, 2016.
`
` Luminara Worldwide, LLC v. Liown Electronics Co. Ltd., et al., Civil No.
`14-cv-03103 (SRN/FLN), deposed March 30, 2016.
`
` Dane Technologies, Inc. v. Gatekeeper Systems, Inc., Civil No. 12-cv-
`2730-ADM-AJB, deposed April 21-22, 2015 and August 2014.
`
`
`
`V.
`
`INFORMATION CONSIDERED
`
`13. My opinions are based on my years of education, research, and expe-
`
`rience, as well as my investigation and study of relevant materials. In forming my
`
`opinions, I have considered the materials I identify in this report and those includ-
`
`ed in EXHIBIT B of this report.
`
`14. This report represents only those opinions I have formed to date. I re-
`
`serve the right to revise, supplement, and/or amend my opinions stated herein
`
`based on any new information and on my continuing analysis of the materials al-
`
`ready provided.
`
`
`
`5
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`7
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`

`

`VI. RELEVANT LEGAL STANDARDS
`
`A. Written Description Sufficiency
`
`15. My analysis discussed in this declaration relates to the sufficiency of
`
`the written description of the ‘283 and ‘778 applications. I have been advised that
`
`the test for sufficiency of the written description is whether the disclosure reasona-
`
`bly conveys to those skilled in the art that the Inventor had “possession” of the
`
`claimed subject matter. I understand that “possession” must be demonstrated by
`
`the material within the four corners of the ‘283 and ‘778 applications. In other
`
`words, these applications must describe an invention understandable to a person of
`
`ordinary skill in the art and show that the Inventor actually possessed what is
`
`claimed.
`
`VII. PERSON OF ORDINARY SKILL IN THE ART
`
`16.
`
`I understand the invention date of the ‘746 Patent to be March 4,
`
`1997, based on the ‘755 application date listed on the face of the ‘746 Patent. A
`
`person of ordinary skill in the art (“POSITA”) is a hypothetical person of ordinary
`
`creativity having “the capability of understanding the scientific and engineering
`
`principles applicable to the pertinent art.” Ex parte Hiyamizu, 10 USPQ2d 1393,
`
`1394 (B.P.A.I. 1988). After reviewing the technology of the ‘746 Patent, I consid-
`
`er the relevant art to be, generally speaking, “the transfer of data and in particular to
`
`interface devices for communication between a computer or host device and a data
`
`
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`6
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`8
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`

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`transmit/receive device from which data is to be acquired or with which two-way
`
`communication is to take place.” Exhibit 1001 (‘746 patent) at 1:20-24. I consider
`
`examples of a person of ordinary skill in the art, as of March 4, 1997, to include a
`
`person with at least a bachelor’s degree in a related field such as computer engineer-
`
`ing or electrical engineering and at least three years of experience in the design, de-
`
`velopment, and/or testing of hardware and software components involved with data
`
`transfer or in embedded devices and their interfaces with host systems. Alternative-
`
`ly, a POSITA may have five or more years of experience in these technologies,
`
`without a bachelor’s degree.
`
`VIII. SUMMARY OF THE ‘746 PATENT
`
`17. The ‘746 Patent generally describes apparatus and methods for
`
`achieving high data transfer rates for data acquisition systems to a host computer,
`
`without requiring an end user to install specialized software for each host computer
`
`system. See, e.g., Exhibit 1001 (‘746 patent) at 3:33-37.
`
`18. At the time of the invention, there were an increasing number and va-
`
`riety of data acquisition systems with the ability to capture high volumes of infor-
`
`mation, and an increasing demand to transfer that information to commercially
`
`available, general purpose computers. Id. at 1:31-62. However, due to the hierar-
`
`chical nature of computer system software, device-specific drivers generally pro-
`
`vide higher data transfer rates, while more general-purpose drivers support a wider
`
`
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`7
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`9
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`

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`variety of devices at the cost of lower performance. Id. at 1:25-2:18. This is true
`
`today, as well as at the time of the invention. The invention of the ‘746 patent al-
`
`lows a data acquisition system to identify itself as a type of device normally found
`
`in host computers in order to leverage the capabilities of drivers for such devices.
`
`Id. at 4:14-38. Accordingly, by using the invention, users could obtain high data
`
`transfer performance without loading specific software that may otherwise be re-
`
`quired to support a given data acquisition device on a given host computer system.
`
`Id. at 3:32-48, 7:32-65, 8:31-36, 9:16-20, 11:29-46.
`
`IX. ANALYSIS AND OPINIONS
`
`19.
`
`It is my understanding that Petitioner contends the ‘746 patent is not
`
`entitled to priority benefit of either the ‘283 or ‘778 application because those ap-
`
`plications allegedly do not provide sufficient written description for the challenged
`
`claims. Paper 2 (Petition) at 9, 12. In the following sections I discuss my analysis
`
`and opinions for each of the claimed features for which Petitioner contends lacks
`
`support by the ‘283 and ‘778 applications.
`
`A. The ‘283 Application Supports the Claimed “File System”
`
`20.
`
`It is my understanding that Petitioner contends the ‘283 application
`
`“includes no mention whatsoever of any file system on the interface device” and as
`
`such fails to support the requirements of a file system in claims of the ‘746 patent.
`
`Paper 2 (Petition) at 9. I disagree. As indicated by the evidence discussed below,
`
`
`
`8
`
`10
`
`

`

`a person of ordinary skill in the art would understand from the ‘283 application
`
`that the Inventor possessed an invention including a file system.
`
`21.
`
`In general, a file system is a scheme or method for storing data as a
`
`collection of files. The ‘283 application repeatedly describes multiple files stored
`
`in the interface device of the invention, and as discussed below, a person skilled in
`
`the art would understand the interface device inherently has a file system. For ex-
`
`ample, the ‘283 application states:
`
`Even files executable by the host device, such as batch
`files or executable files (BAT or EXE files), and also
`help files can be implemented in the interface device ...
`the EXE files are already installed on the interface device
`10 and appear in the virtual root directory, by means of
`which the host device can access all programs stored on
`the interface device 10.
`
`Exhibit 2003 (‘283 application) at ¶0030 (underline added).
`
`22.
`
` Simply put, in order to be able to store these files and make them
`
`available to the host system, the interface device of the invention inherently im-
`
`plements a file system. Further, the ‘283 application explicitly describes a key
`
`component of this file system, e.g. a “file allocation table” (or “FAT”) when it
`
`states:
`
`
`
`In reply to an instruction from the host device to display
`the directory of the "virtual" hard disk drive simulated by
`the interface device 10 with respect to the host device,
`the digital signal processor can respond to the host device
`in exactly the same way as a conventional hard disk
`would, namely by reading on request the file allocation
`
`9
`
`11
`
`

`

`table or FAT on a sector specified in the boot sequence,
`normally the first writable sector, and transferring it to
`the host device, and subsequently by transferring the di-
`rectory structure of the virtual hard disk.
`
`Exhibit 2003 (‘283 application) at ¶0024 (underline added).
`
`23. As described above, the digital signal processor responds “exactly the
`
`same way as a conventional hard disk would” by reading its “file allocation table.”
`
`In order to read this table, not only is the table clearly stored in the interface de-
`
`vice, but it contains the information necessary to locate the various files stored in
`
`the interface device, such as the BAT, EXE, and help files described above.
`
`24. The ‘283 application contains further disclosures related to storing
`
`files on the interface device, indicating the interface device includes a file system.
`
`For example, the ‘283 application states “the user can also create a configuration
`
`file, …, on the interface device 10.” Exhibit 2003 (‘283 application) at ¶0029 (un-
`
`derline added). The ‘283 application also indicates the interface device imple-
`
`ments a file system since the interface device is “storing any files in agreed formats
`
`in the memory means 14 of the interface device 10 …” Exhibit 2003 (‘283 appli-
`
`cation) at ¶0030 (underline added).
`
`25. Petitioner ignores the evidence cited above and instead asserts that
`
`“virtual files” are “not actual files stored in an actual file system.” Paper 2 (Peti-
`
`tion) at 9-10. I disagree. As shown above, the ‘283 application repeatedly disclos-
`
`es storing files in the memory of the interface device, and using a file allocation
`
`
`
`10
`
`12
`
`

`

`table to organize and access those files. The term “virtual” simply indicates the
`
`files are not necessarily stored on the type of device indicated by the information
`
`provided by the interface device to the host device.
`
`26. Petitioner cites the disclosure of “real-time input” files as alleged sup-
`
`port that “virtual files” are not “actual files.” Paper 2 (Petition) at 9-10. This posi-
`
`tion is based on disclosure of an embodiment where reading a “real-time input” file
`
`occurs such that “data commences to be received via the second connecting device
`
`and data commences to be sent to the host device via the first connecting device.”
`
`Id. In fact, Petitioner’s understanding of “real-time input” files is irrelevant since
`
`no challenged claim requires a “real-time input” file, and since the ‘283 application
`
`discloses storing several file types other than “real-time input” files, such as the
`
`executable, help, and configuration files cited above. Petitioner does not mention
`
`such files, much less contend that such files are “real-time input” files.
`
`B.
`
`The ‘778 Application Supports the Claimed “File System”
`
`27.
`
`It is my understanding that Petitioner also contends the ‘778 applica-
`
`tion fails to support the requirements of a file system in claims of the ‘746 patent
`
`“for the same reasons as the ‘283 application does not.” Paper 2 (Petition) at 12. I
`
`disagree. As indicated by the evidence discussed below, a person of ordinary skill
`
`in the art would understand from the ‘778 application that the Inventor possessed
`
`an invention including a file system.
`
`
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`11
`
`13
`
`

`

`28. Similar to the ‘283 application, the ‘778 application repeatedly de-
`
`scribes multiple files stored in the interface device of the invention, and as dis-
`
`cussed below, a person skilled in the art would understand the interface device in-
`
`herently has a file system. For example, the ‘778 application states:
`
`Even files executable by the host device, such as batch
`files or executable files (BAT or EXE files), and also
`help files can be implemented in the interface device ...
`the EXE files are already installed on the interface device
`10 and appear in the virtual root directory, by means of
`which the host device can access all programs stored on
`the interface device 10.
`
`Exhibit 1061 (‘778 application) at 015-6 (underline added).
`
`29. Simply put, in order to be able to store these files and make them
`
`available to the host system, the interface device of the invention inherently im-
`
`plements a file system. Further, the ‘778 application explicitly describes a key
`
`component of this file system, e.g. a “file allocation table” (or “FAT”) when it
`
`states:
`
`In reply to an instruction from the host device to display
`the directory of the "virtual" hard disk drive simulated by
`the interface device 10 with respect to the host device,
`the digital signal processor can respond to the host device
`in exactly the same way as a conventional hard disk
`would, namely by reading on request the file allocation
`table or FAT on a sector specified in the boot sequence,
`normally the first writable sector, and transferring it to
`the host device, and subsequently by transferring the di-
`rectory structure of the virtual hard disk.
`
`Exhibit 1061 (‘778 application) at 013-4 (underline added).
`
`
`
`12
`
`14
`
`

`

`30. As described above, the digital signal processor responds “exactly the
`
`same way as a conventional hard disk would” by reading its “file allocation table.”
`
`In order to read this table, not only is the table clearly stored in the interface de-
`
`vice, but it contains the information necessary to locate the various files stored in
`
`the interface device, such as the BAT, EXE, and help files described above.
`
`31. The ‘778 application also includes further disclosure related to storing
`
`files on the interface device, indicating the interface device includes a file system.
`
`For example, the ‘778 application states “the user can also create a configuration
`
`file, …, on the interface device 10.” Exhibit 1061 (‘778 application) at 015. The
`
`‘778 application also indicates the interface device implements a file system since
`
`the interface device is “storing any files in agreed formats in the memory means 14
`
`of the interface device 10 …” Id.
`
`
`
`
`
`
`
`13
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`15
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`

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`X.
`
`CONCLUDING REMARKS
`
`32.
`
`For the purpose of preparing this report, I have reviewed all the mate-
`
`rials and conducted analyses that I believe are appropriate given the evidence
`
`available at this time.
`
`I understand that I will have the right to supplement or
`
`amend this report if additional evidence or information pertinent to my opinions
`
`becomes available, and I plan to do so if necessary.
`
`DATED: 2 ([o[[ 71
`
`16
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`

`

`XI. EXHIBIT A: CURRICULUM VITAE OF DR. KENNETH W. FERNALD
`
`DEGREES
`Ph.D., Electrical Engineering, North Carolina State University, 1992
`Dissertation: “A Microprocessor-Based System for the Fast Prototyping of Implantable Instru-
`ments for Biomedical Research Applications”
`M.S., Electrical Engineering, North Carolina State University, 1987
`Thesis: “Simulation of Circuit Response to Proton Environments”
`B.S., Electrical Engineering, North Carolina State University, 1985
`
`CONTINUED EDUCATION
` Analog Bipolar Cell Design, 1997
` Spread-Spectrum Wireless, IS-95 and Third Generation CDMA Digital Cellular
`Communications, 1997
` RF Design for Personal Communication Systems, 1995
` Switched Capacitor Circuit Design, 1994
` Low-Power CMOS Circuit Design, 1993
` Cardiac Pacing Technology, 1992
` Digital Signal Processing, 1988
` Adaptive Filter Design, 1987
`
`EXPERT WITNESS WORK (last five years – emphasis indicates represented party)
` Papst Licensing GmbH & Co., KG v. Apple, Case 6:15-cv-1095, deposed Decem-
`ber 1, 2016.
` InfoBionic, Inc. v. Braemar Manufacturing, LLC, Cases IPR2015-01679 and
`IPR2015-01688, deposed July 26, 2016.
` Luminara Worldwide, LLC v. Liown Electronics Co. Ltd., et al., Civil No. 14-cv-
`03103 (SRN/FLN), deposed March 30, 2016.
` Dane Technologies, Inc. v. Gatekeeper Systems, Inc., Civil No. 12-cv-2730-ADM-
`AJB, deposed April 21-22, 2015 and August 2014.
`
`
`EXPERIENCE
`Consulting (Part-time)
`Provide technical analysis and design services to various clients. Projects include:
` IP analysis on topics such as circuit and system design, embedded systems, wired and
`wireless networking, firmware and software, consumer electronic platforms, etc.
` Design, fabrication, and testing of a high-speed USB isolator
` Software and firmware development for a USB-to-SPI/SMBus Serial Adapter
` Analysis and architecture design for a high-density, nano-device memory platform
` Analysis for a massively dense 3D integrated memory
` Design of a radiation-tolerant, nano-device memory IC
`
`
`
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`15
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`17
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`

`
`Distinguished Engineer, Silicon Laboratories, Inc.
`April 2010 to Present
`Lead the design of 8-bit and 32-bit microcontroller integrated circuits. Responsible for
`IC architecture, peripheral design, and project management. Personally designed an all-
`digital PLL, USB and USART peripherals, timing and memory logic, low-power charge-
`pumps, and other analog, mixed-signal and digital circuits and systems.
`
`Vice-President, Engineering, Keterex, Inc.
`August 2006 to April 2010
`Led the design of mixed-signal integrated circuits and systems. Personally designed a
`mixed-signal audio playback IC, a 500V ballast controller and half-bridge driver, a small-
`footprint boost controller for DDR memory platforms, and an ultra low-power signal pro-
`cessing IC. Personally developed firmware (in C) and scripting/IDE software (in C and
`Java) for serial communications and audio processing.
`
`CTO / Vice-President, Engineering, Zilker Labs, Inc.
`December 2003 to August 2006
`Led the design of innovative digital power-management products. Established the IC de-
`sign team and infrastructure. Co-authored the PMBus Specification. Personally per-
`formed product definition, IC architecture and RTL design, and firmware development.
`
`Principal Design Engineer, Cygnal Integrated Products, Inc.
`March 1999 to December 2003
`System and circuit design for mixed-signal microcontroller products. Served as the archi-
`tect and team leader for several products, all of which sampled 1st silicon. Individual de-
`sign efforts included linear regulators, supply monitors, crystal and precision RC oscilla-
`tors, voltage references, a USB clock recovery system, a proprietary serial debug inter-
`face, a µP instruction cache, a micropower real-time clock, and digital interface, control,
`and timing peripherals. Designed the platform and firmware for host-to-device commu-
`nications and debugging.
`
`Senior IC Design Engineer, Analog Devices, Inc.
`June 1995 to June 1998
`Team Leader for development of a CDMA/AMPS Voiceband/Baseband Codec ASIC.
`Tasks included specification, interface design, top-level integration/simulation and cus-
`tomer interface. Lead Design Engineer for development of a DBS digital receiver ASIC.
`Tasks included ADC, DAC, oscillator, and PLL design, IC evaluation, and technical
`management of contractor activities.
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`Principal Design Engineer, Intermedics, Inc.
`May 1992 to June 1995, June 1998 to March 1999
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`Specification, design, layout supervision, debug, and test development for high-reliability
`micropower mixed-signal CMOS Ics for implantable applications. Projects included
`wireless telemetry Ics, a waveform compression and storage IC, a flyback charging and
`shock delivery controller, ADCs, switched-capacitor filters, DC-to-DC converters, and
`reference generators.
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`Assistant Researcher, Analog Circuits Group, NC State University
`August 1988 to May 1992
`Original research and development of an intelligent implantable wireless telemetry in-
`strument for biomedical applications, including the design, layout, and testing of mixed-
`signal CMOS Ics to provide data acquisition and wireless bidirectional digital telemetry
`functions.
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`Systems Engineer, NASA Langley Research Center
`June 1987 to August 1988
`Designed a microprocessor-based motion controller for linear DC actuators, including
`system software and firmware development.
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`Assistant Researcher, Space Electronics Group, NC State University
`August 1985 to May 1987
`Original research and development of a software platform (in C) for modeling the effects
`of radiation on semiconductors.
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`Research Engineer, Naval Research Laboratory
`Summer 1986
`Designed and constructed a electronic dosimetry system for use in radiation effects ex-
`periments. Performed radiation experiments on integrated circuits at several accelerator
`facilities. Consulted on radiation effects in digital memories.
`
`SELECT ISSUED PATENTS (over 55 patents issued)
`5,522,866: Method and apparatus for improving the resolution of pulse position modula-
`tion communications between an implantable medical device and an external
`medical device
`5,548,795: Hybrid analog-to-digital convertor for low power applications, such as use in
`a implantable medical device
`5,626,625: Method and apparatus for measuring the period of response of an implantable
`medical device based upon the difference in phase between a trigger signal
`and an internal clock signal
`6,559,629: Supply voltage monitor using bandgap device without feedback
`6,738,858: Cross-bar matrix for connecting digital resources to I/O pins of an integrated
`circuit
`6,794,856: Processor based integrated circuit with a supply voltage monitor using
`bandgap device without feedback
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`6,839,795: Priority cross-bar decoder
`6,886,089: Method and apparatus for accessing paged memory with indirect addressing
`6,898,689: Paging scheme for a microcontroller for extending available register space
`6,917,658: Clock recovery method for bursty communications
`6,950,047: Method and apparatus for combining outputs of multiple DACs for increased
`bit resolution
`6,950,491: Clock circuit with fractional divide circuit
`6,956,518: Method and apparatus for subclocking a SAR analog-to-digital converter
`6,968,472: Serial data interface
`7.042.201: Digital control circuit for switching power supply with pattern generator
`7,071,733: Cross-bar matrix for connecting digital resources to I/O pins of an integrated
`circuit
`7,119,526: Processor based integrated circuit with a supply voltage monitor using
`bandgap device without feedback
`7,119,527: Voltage reference circuit using PTAT voltage
`7,171,542: Reconfigurable interface for coupling functional input/output blocks to lim-
`ited number of I/O pins
`7,250,825: Method and apparatus for calibration of a low frequency oscillator in a pro-
`cessor based system
`7,251,112: Battery protect circuit for switching circuit that switches between a supply
`and a battery
`7,256,611: Cross-bar matrix with LCD functionality
`7,292,019: Method for accurately setting parameters inside integrated circuits using in-
`accurate external components
`7,395,447: Precision oscillator for an asynchronous transmission system
`7,362,554: Electrostatic discharge (ESD) clamp using output driver
`7,343,504: Micro controller unit (MCU) with RTC
`7,492,139: Digital control circuit for switching power supply with serial data input
`7,498,962: Analog-to-digital converter with low power track-and-hold mode
`7,504,900: Integrated circuit package including programmable oscillators
`7,506,634: Ignition timing circuit
`7,568,117: Adaptive thresholding technique for power supplies during margining events
`7,589,514: Method for accurate current sensing in power converters
`7,653,757: Method for using a multi-master multi-slave bus for power management
`7,908,402: Integrated multi-function point-of-load regulator circuit
`8,289,010: Method for control of overlap times in switching power converters
`8,456,242: Frequency Locked Loop
`8,638,081: Active droop current sharing
`8,904,076: Coder with snoop mode
`8,914,624: Changing the reset state of a processor
`9,106,176: Apparatus for motor control system and associated methods
`9,160,166: Charge pump for low power consumption apparatus and associated methods
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`SELECT PUBLICATIONS & PRESENTATIONS (over 25 total)
` Retention Regulator, Silicon Laboratories Technical Symposium, 2016.
` A Boot-agnostic Power Architecture with a DCDC, Silicon Laboratories Technical Sym-
`posium, 2015.
` Energy-friendly Low Drop-out (LDO) Regulator Architectures for EFR Platforms, Sili-
`con Laboratories Technical Symposium, 2015.
` A Glitch-free Clock Multiplexer for a Resampled Clock, Silicon Laboratories Technical
`Symposium, 2015.
` Behind the Curtain: The Unseen Analog Infrastructure Inside Energy Friendly MCUs,
`Silicon Laboratories Technical Symposium, 2015.
` Circuits for Below Ground Operation of a Single Supply IC, Silicon Laboratories Tech-
`nical Symposium, 2014.
` On-chip Oscillator with 0.5% Frequency Stability for an MCU, Silicon Laboratories
`Technical Symposium, 2014.
` Staying Ahead in USB: XTAL-less and Low-power Operation, Silicon Laboratories