UNITED STATES PATENT AND TRADEMARK OFFICE
`______________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`______________________
`
`APPLE, INC.
`PETITIONER
`
`V.
`
`PAPST LICENSING GMBH & CO., KG
`PATENT OWNER
`______________________
`
`CASE IPR2017-00156
`
`U.S. PATENT NO. 9,189,437
`
`______________________
`
`DECLARATION OF DR. KENNETH FERNALD UNDER 37 C.F.R. § 42.53
`
`Papst Licensing GmbH & Co., KG.
`Petitioner - Apple, Inc.
`Patent Owner - Papst Licensing GmbH & Co., KG.
`IPR2017-00156
`EXH. 2001
`
`1
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`

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`I.
`
`TABLE OF CONTENTS
`
`
`I.
`
`II.
`
`III.
`
`IV.
`
`V.
`
`TABLE OF CONTENTS ................................................................................................... II
`
`INTRODUCTION ............................................................................................................. 1
`
`QUALIFICATIONS .......................................................................................................... 1
`
`COMPENSATION AND PRIOR TESTIMONY .............................................................. 4
`
`INFORMATION CONSIDERED ..................................................................................... 5
`
`VI.
`
`RELEVANT LEGAL STANDARDS ............................................................................... 6
`
`A. Written Description Requirements ........................................................................ 6
`
`B.
`
`Negative Claim Limitations ................................................................................... 6
`
`VII.
`
`PERSON OF ORDINARY SKILL IN THE ART ............................................................. 7
`
`VIII. SUMMARY OF THE ‘437 PATENT ............................................................................... 8
`
`IX.
`
`ANALYSIS AND OPINIONS .......................................................................................... 9
`
`A.
`
`B.
`
`The ‘778 Application Supports the Claimed “File System” .................................. 9
`
`The ‘778 Application Supports the Claimed User Interaction Elements ............. 11
`
`X.
`
`CONCLUDING REMARKS ........................................................................................... 14
`
`XI.
`
`EXHIBIT A: CURRICULUM VITAE OF DR. KENNETH W. FERNALD ................. 15
`
`XII. EXHIBIT B: MATERIALS CONSIDERED................................................................... 21
`
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`ii
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`2
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`

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`II.
`
`INTRODUCTION
`
`1. My name is Kenneth Fernald, Ph.D. I have been retained by counsel for
`
`Papst Licensing GmbH & Co., KG as an expert witness in the above-captioned
`
`proceeding.
`
`2.
`
`I understand that Apple, Inc. (“Petitioner”) has alleged claims 1, 4-6, 9-
`
`16, 18, 30, 32, and 34 of U.S. Patent No. 9,189,437 ("the ‘437 Patent") are un-
`
`patentable over the prior art cited in the above-captioned inter partes review.
`
`3.
`
`I have been asked to provide an opinion regarding the sufficiency of U.S.
`
`Application No. 11/078,778 (“the ‘778 application”) in supporting certain claimed
`
`features of the ‘437 patent.
`
`III. QUALIFICATIONS
`
`4. My qualifications are summarized here and are addressed more fully in
`
`my CV attached as EXHIBIT A. I earned my Bachelor of Science and Master of
`
`Science degrees in Electrical Engineering from North Carolina State University
`
`(NCSU) in 1985 and 1987. During this period, I worked for the Space Electronics
`
`Group developing software for predicting the effects of radiation environments on
`
`integrated circuits. I also consulted for the Naval Research Laboratory (NRL). My
`
`services to NRL included the design of dosimetry instrumentation and the execu-
`
`tion of radiation studies on electronic devices at various facilities around the Unit-
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`1
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`3
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`ed States. I joined NASA Langley Research Center in 1987 where I designed mo-
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`tor control instruments and firmware for ground and space station experiments.
`
`5.
`
`I returned to NCSU in 1988 to earn my Ph.D. in Electrical Engineering.
`
`My doctoral research efforts were funded by the National Science Foundation and
`
`focused on the development of medical systems utilizing wireless digital telemetry.
`
`My work included a thorough investigation of medical telemetry technology and
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`design of a microprocessor-based system for the fast prototyping of implantable
`
`medical instruments. I also completed the design and testing of various compo-
`
`nents of this system, including a bidirectional digital telemetry integrated circuit
`
`(IC) and a general-purpose sensor interface and conversion IC. I completed my
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`Ph.D. in 1992, after which I joined Intermedics Inc. in Angleton, Texas.
`
`6. My responsibilities at Intermedics included system and circuit design of
`
`telemetry, signal-processing, and control ICs for medical devices. Examples in-
`
`clude the design of a sensor acquisition, compression, and storage IC for implanta-
`
`ble pacemakers and defibrillators. I also worked on advanced wireless digital te-
`
`lemetry technology, control ICs for therapy delivery in defibrillators, and software
`
`development for sensor waveform compression and recovery. I left Intermedics in
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`1998 to join Analog Devices Inc. in Greensboro, NC.
`
`7. My work at Analog Devices included the design of advanced ICs for
`
`wireless digital communication devices. Specific projects included the design, de-
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`bug, and testing of a base-band receiver IC for digital satellite systems. This IC
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`performed QPSK demodulation, symbol recovery, and forward-error correction for
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`high-bandwidth wireless video signals. I also performed system design for a
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`CDMA base-band transceiver IC for personal communication devices.
`
`8.
`
`I rejoined Intermedics in 1998 as the first employee of an IC design
`
`group in Austin, Texas. I continued to work on next-generation medical telemetry
`
`ICs until Intermedics was acquired by Guidant in 1999. At that time I joined Cyg-
`
`nal Integrated Products, a startup company in Austin, Texas. My responsibilities at
`
`Cygnal included the design and development of mixed-signal embedded products
`
`for industrial and instrumentation applications. Specific projects included the de-
`
`sign of a proprietary communication system for in-system debug, a proprietary
`
`clock recovery method for USB devices, and the design of numerous analog and
`
`digital circuits and systems. I remained at Cygnal until its acquisition by Silicon
`
`Laboratories Inc. in 2003, at which time I joined Zilker Labs, a start-up company
`
`in Austin, Texas, as their first VP of Engineering and later became their Chief
`
`Technical Officer.
`
`9. My responsibilities at Zilker Labs included the development of advanced
`
`IC technologies for power management and delivery for board-level electronic sys-
`
`tems. Specific duties included architecture design and firmware development for
`
`all Zilker Labs products. I left Zilker Labs in 2006 to join Keterex as their first VP
`
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`of Engineering. My responsibilities at Keterex included management of engineer-
`
`ing resources, design and layout of application-specific integrated circuits, and de-
`
`velopment of software and firmware for Keterex products. I joined Silicon La-
`
`boratories in 2010 as a Principal Design Engineer and now hold the title of Distin-
`
`guished Engineer. My responsibilities include architecture development and de-
`
`sign of 8-bit and 32-bit microcontrollers. Projects have included microcontrollers
`
`for metrology, motor control, and low-power and USB applications.
`
`10. I hold over 55 patents on technologies such as wireless telemetry for
`
`medical devices, low-power analog-to-digital converters, security in embedded
`
`systems, clock recovery in communication systems, serial communication proto-
`
`cols, and power management and conversion. I have authored or co-authored over
`
`20 articles, presentations, and seminars on topics including radiation effects in mi-
`
`croelectronics, wireless medical devices, low-power circuit design, circuit design
`
`for digital communications, microcontrollers and embedded systems, and power
`
`management. I am also a co-author of the PMBus™ Power System Management
`
`Protocol Specification.
`
`IV. COMPENSATION AND PRIOR TESTIMONY
`
`11. I am being compensated at a rate of $350 per hour for my work in this
`
`matter. I am being reimbursed for reasonable and customary expenses associated
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`with my work in this investigation. My compensation is not contingent on the out-
`
`come of this matter or the specifics of my testimony.
`
`12. Within the last five years, I have testified by deposition in the following
`
`cases (with underline indicating the represented party):
`
` Papst Licensing GmbH & Co., KG v. Apple, Case 6:15-cv-1095, deposed
`December 1, 2016.
`
` InfoBionic, Inc. v. Braemar Manufacturing, LLC, Cases IPR2015-01679
`and IPR2015-01688, deposed July 26, 2016.
`
` Luminara Worldwide, LLC v. Liown Electronics Co. Ltd., et al., Civil No.
`14-cv-03103 (SRN/FLN), deposed March 30, 2016.
`
` Dane Technologies, Inc. v. Gatekeeper Systems, Inc., Civil No. 12-cv-
`2730-ADM-AJB, deposed April 21-22, 2015 and August 2014.
`
`
`
`V.
`
`INFORMATION CONSIDERED
`
`13. My opinions are based on my years of education, research, and experi-
`
`ence, as well as my investigation and study of relevant materials. In forming my
`
`opinions, I have considered the materials I identify in this report and those includ-
`
`ed in EXHIBIT B of this report.
`
`14. This report represents only those opinions I have formed to date. I re-
`
`serve the right to revise, supplement, and/or amend my opinions stated herein
`
`based on any new information and on my continuing analysis of the materials al-
`
`ready provided.
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`5
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`7
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`VI. RELEVANT LEGAL STANDARDS
`
`A. Written Description Requirements
`
`15. My analysis discussed in this declaration relates to the sufficiency of the
`
`written description of the ‘778 application. I have been advised that the test for
`
`sufficiency of the written description is whether the disclosure reasonably conveys
`
`to those skilled in the art that the Inventor had “possession” of the claimed subject
`
`matter. I understand that “possession” must be demonstrated by the material with-
`
`in the four corners of the ‘778 application. In other words, the ‘778 application
`
`must describe an invention understandable to a person of ordinary skill in the art
`
`and show that the Inventor actually possessed what is claimed.
`
`B. Negative Claim Limitations
`
`16. Certain challenged claims recite a negative limitation, i.e. an element
`
`which must be missing from an embodiment of the invention as defined by a claim.
`
`It is my understanding that the written description requirement is met for negative
`
`claim limitations where the specification describes alternatives. Inphi Corp. v.
`
`Netlist, Inc., 805 F. 3d 1350, 1356 (Fed. Cir. 2015). It is further my understanding
`
`that describing alternatives provides an implicit reason to exclude and no addition-
`
`al discussion of advantages of exclusion or disadvantages of inclusion is necessary
`
`to satisfy the written description requirement. Id. at 1355.
`
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`6
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`8
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`VII. PERSON OF ORDINARY SKILL IN THE ART
`
`17. I understand the invention date of the ‘437 Patent to be March 4, 1997,
`
`based on the ‘755 application date listed on the face of the ‘437 Patent. A person
`
`of ordinary skill in the art (“POSITA”) is a hypothetical person of ordinary creativ-
`
`ity having “the capability of understanding the scientific and engineering principles
`
`applicable to the pertinent art.” Ex parte Hiyamizu, 10 USPQ2d 1393, 1394
`
`(B.P.A.I. 1988). After reviewing the technology of the ‘437 Patent, I consider the
`
`relevant art to be, generally speaking, “the transfer of data and in particular to inter-
`
`face devices for communication between a computer or host device and a data
`
`transmit/receive device from which data is to be acquired or with which two-way
`
`communication is to take place.” Exhibit 1001 (‘437 patent) at 1:18-22. I consider
`
`examples of a person of ordinary skill in the art, as of March 4, 1997, to include a
`
`person with at least a bachelor’s degree in a related field such as computer engineer-
`
`ing or electrical engineering and at least three years of experience in the design, de-
`
`velopment, and/or testing of hardware and software components involved with data
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`transfer or in embedded devices and their interfaces with host systems. Alternative-
`
`ly, a POSITA may have five or more years of experience in these technologies,
`
`without a bachelor’s degree.
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`7
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`9
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`VIII. SUMMARY OF THE ‘437 PATENT
`
`18. The ‘437 Patent generally describes apparatus and methods for achieving
`
`high data transfer rates for data acquisition systems to a host computer, without re-
`
`quiring an end user to install specialized software for each host computer system.
`
`See, e.g., Exhibit 1001 (‘437 patent) at 3:33-37.
`
`19. At the time of the invention, there were an increasing number and variety
`
`of data acquisition systems with the ability to capture high volumes of information,
`
`and an increasing demand to transfer that information to commercially available,
`
`general purpose computers. Id. at 1:29-60. However, due to the hierarchical na-
`
`ture of computer system software, device-specific drivers generally provide higher
`
`data transfer rates, while more general-purpose drivers support a wider variety of
`
`devices at the cost of lower performance. Id. at 1:24-2:19. This is true today, as
`
`well as at the time of the invention. The invention of the ‘437 patent allows a data
`
`acquisition system to identify itself as a type of device normally found in host
`
`computers in order to leverage the capabilities of drivers for such devices. Id. at
`
`4:16-41. Accordingly, by using the invention, users could obtain high data transfer
`
`performance without loading specific software that may otherwise be required to
`
`support a given data acquisition device on a given host computer system. Id. at
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`3:29-46, 7:38-64, 8:36-41, 9:23-27, 11:38-55.
`
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`IX. ANALYSIS AND OPINIONS
`
`20. It is my understanding that Petitioner contends the ‘437 patent is not enti-
`
`tled to priority benefit of the ‘778 application because that application allegedly
`
`does not provide sufficient written description for the challenged claims. Paper 2
`
`(Petition) at 9. In the following sections I discuss my analysis and opinions for
`
`each of the claimed features for which Petitioner contends lacks support by the
`
`‘778 application.
`
`A. The ‘778 Application Supports the Claimed “File System”
`
`21. It is my understanding that Petitioner contends the ‘778 application “in-
`
`cludes no mention whatsoever of the ‘file system in the ADGPD’” and as such
`
`fails to support the requirements of a file system in claims of the ‘437 patent. Pa-
`
`per 2 (Petition) at 8. I disagree. As indicated by the evidence discussed below, a
`
`person of ordinary skill in the art would understand from the ‘778 application that
`
`the Inventor possessed an invention including a file system.
`
`22. In general, a file system is a scheme or method for storing data as a col-
`
`lection of files. The ‘778 application repeatedly describes multiple files stored in
`
`the interface device of the invention, and as discussed below, a person skilled in
`
`the art would understand the interface device inherently has a file system. For ex-
`
`ample, the ‘778 application states:
`
`Even files executable by the host device, such as batch
`files or executable files (BAT or EXE files), and also
`
`9
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`11
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`help files can be implemented in the interface device ...
`the EXE files are already installed on the interface device
`10 and appear in the virtual root directory, by means of
`which the host device can access all programs stored on
`the interface device 10.
`
`Exhibit 1061 (‘778 application) at 015-6 (underline added).
`
`23. Simply put, in order to be able to store these files and make them availa-
`
`ble to the host system, the interface device of the invention inherently implements
`
`a file system. Further, the ‘778 application explicitly describes a key component of
`
`this file system, e.g. a “file allocation table” (or “FAT”) when it states:
`
`In reply to an instruction from the host device to display
`the directory of the "virtual" hard disk drive simulated by
`the interface device 10 with respect to the host device,
`the digital signal processor can respond to the host device
`in exactly the same way as a conventional hard disk
`would, namely by reading on request the file allocation
`table or FAT on a sector specified in the boot sequence,
`normally the first writable sector, and transferring it to
`the host device, and subsequently by transferring the di-
`rectory structure of the virtual hard disk.
`
`Exhibit 1061 (‘778 application) at 013-4 (underline added).
`
`24. As described above, the digital signal processor responds “exactly the
`
`same way as a conventional hard disk would” by reading its “file allocation table.”
`
`In order to read this table, not only is the table clearly stored in the interface device,
`
`but it contains the information necessary to locate the various files stored in the in-
`
`terface device, such as the BAT, EXE, and help files described above.
`
`
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`10
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`25. The ‘778 application includes further disclosure related to storing files on
`
`the interface device, indicating the interface device includes a file system. For ex-
`
`ample, the ‘778 application states “the user can also create a configuration file, …,
`
`on the interface device 10.” Exhibit 1061 (‘778 application) at 015. The ‘778 ap-
`
`plication also indicates the interface device implements a file system since the in-
`
`terface device is “storing any files in agreed formats in the memory means 14 of
`
`the interface device 10 …” Id.
`
`B.
`
`The ‘778 Application Supports the Claimed User Interaction El-
`ements
`
`26. Petitioner contends that the ‘778 application fails to support the claim
`
`limitation prohibiting “requiring any end user to interact with the computer to set
`
`up a file system in the ADGPD at any time.” Paper 2 (Petition) at 8-9. I disagree.
`
`As explained below, the ‘778 application repeatedly teaches alternatives where the
`
`user intervenes in the setup and operation of the interface device of the invention.
`
`And while it is my understanding that a motivation for excluding described alterna-
`
`tives is not required by the legal standards, the ‘778 application does teach mini-
`
`mizing user interaction as a means of reducing errors.
`
`27. The ‘778 application describes alternatives of user intervention in the
`
`setup and function of the interface device of the invention. For example, the ‘778
`
`application states “an experienced user can intervene at any time on any level of
`
`the existing second connecting device by making use of the above mentioned op-
`
`
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`11
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`13
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`tion of creating a configuration file or adding or storing new program sections for
`
`the second connecting device.” Exhibit 1061 (‘778 application) at 016-7 (under-
`
`line added). The ‘778 application further states “[d]espite the very simple user in-
`
`terface, experienced users are free at any time to intervene in the functions of the
`
`interface device 10 on system level.” Exhibit 1061 (‘778 application) at 023 (un-
`
`derline added).
`
`28. Further, the ‘778 application explicitly describes avoiding user interven-
`
`tion in the installation of the interface device of the invention. This exclusion is
`
`accomplished, in part, by simulating a device known to the host, e.g. a hard disk
`
`drive, thereby supporting “plug-and-play” where “[t]he user is no longer responsi-
`
`ble for installing the interface device 10 on the host device by means of specific
`
`drivers which must also be loaded; instead the interface device 10 is automatically
`
`readied for operation when the host system is booted.” Exhibit 1061 (‘778 applica-
`
`tion) at 016 (underline added).
`
`29. Petitioner contends that a description of a negative claim limitation must
`
`include “a reason to exclude the relevant limitation.” Paper 2 (Petition) at 8.
`
`While it is my understanding that no reason is required, the ‘778 application does
`
`describe reasons to not require user interaction, specifically as a means of reducing
`
`errors. A primary goal of the invention described in the ‘778 application is to
`
`“prevent operator errors” by providing a design in which a user “is not required to
`
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`14
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`operate different interfaces in different ways for different applications.” Exhibit
`
`1061 (‘778 application) at 008 (underline added). Instead, the invention strives to
`
`provide “a universal method of operating the interface [] for a large number of ap-
`
`plications.” Id. This is accomplished, in part, by simulating a device known to the
`
`host, e.g. a hard disk drive, thereby supporting “plug-and-play” where “[t]he user
`
`is no longer responsible for installing the interface device 10 on the host device by
`
`means of specific drivers which must also be loaded; instead the interface device
`
`10 is automatically readied for operation when the host system is booted.” Exhibit
`
`1061 (‘778 application) at 016 (underline added). This simulation of a “virtual”
`
`hard drive “provides simple operation and expansion options” and “ensure[s] ease
`
`of use even in portable, flexible host devices.” Exhibit 1061 (‘778 application) at
`
`023 (underline added). Simply put, the ‘778 application describes an invention
`
`which strives to limit user interaction, e.g. by providing for simple operation of the
`
`device, as a means of “prevent[ing] operator errors.”
`
`30. As indicated by the above evidence, a person skilled in the art would un-
`
`derstand the alternative of user intervention in the operation of the interface device.
`
`As such, the ‘778 application satisfies the written description requirement for ex-
`
`cluding such user intervention, e.g. excluding requiring the user set up a file sys-
`
`tem in the interface device. Further, the ‘778 application describes reasons to
`
`avoid or restrict user interaction with the interface device, including examples such
`
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`15
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`as “prevent[ing] operator errors” and allowing the interface device to be “automat-
`
`ically readied for operation when the host system is booted” such that “[t]he user is
`
`no longer responsible for installing the interface device." As such, it is my opinion
`
`that the ‘778 application supports claim limitations such as “without requiring any
`
`end user to interact with the computer to set up a file system in the ADGPD at any
`
`time,” even under Petitioner’s understanding of the requirements.
`
`X.
`
`CONCLUDING REMARKS
`
`31. For the purpose of preparing this report, I have reviewed all the materials
`
`and conducted analyses that I believe are appropriate given the evidence available
`
`at this time.
`
`I understand that I will have the right to supplement or amend this re-
`
`port if additional evidence or information pertinent to my opinions becomes avail-
`
`able, and I plan to do so if necessary.
`
`DATED:
`
`'2/(‘(1 \ :2’
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`16
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`XI. EXHIBIT A: CURRICULUM VITAE OF DR. KENNETH W. FERNALD
`
`DEGREES
`Ph.D., Electrical Engineering, North Carolina State University, 1992
`Dissertation: "A Microprocessor-Based System for the Fast Prototyping of Implantable Instru-
`ments for Biomedical Research Applications"
`M.S., Electrical Engineering, North Carolina State University, 1987
`Thesis: "Simulation of Circuit Response to Proton Environments"
`B.S., Electrical Engineering, North Carolina State University, 1985
`
`CONTINUED EDUCATION
` Analog Bipolar Cell Design, 1997
` Spread-Spectrum Wireless, IS-95 and Third Generation CDMA Digital Cellular
`Communications, 1997
` RF Design for Personal Communication Systems, 1995
` Switched Capacitor Circuit Design, 1994
` Low-Power CMOS Circuit Design, 1993
` Cardiac Pacing Technology, 1992
` Digital Signal Processing, 1988
` Adaptive Filter Design, 1987
`
`EXPERT WITNESS WORK (last five years – emphasis indicates represented party)
` Papst Licensing GmbH & Co., KG v. Apple, Case 6:15-cv-1095, deposed Decem-
`ber 1, 2016.
` InfoBionic, Inc. v. Braemar Manufacturing, LLC, Cases IPR2015-01679 and
`IPR2015-01688, deposed July 26, 2016.
` Luminara Worldwide, LLC v. Liown Electronics Co. Ltd., et al., Civil No. 14-cv-
`03103 (SRN/FLN), deposed March 30, 2016.
` Dane Technologies, Inc. v. Gatekeeper Systems, Inc., Civil No. 12-cv-2730-ADM-
`AJB, deposed April 21-22, 2015 and August 2014.
`
`
`EXPERIENCE
`Consulting (Part-time)
`Provide technical analysis and design services to various clients. Projects include:
` IP analysis on topics such as circuit and system design, embedded systems, wired and
`wireless networking, firmware and software, consumer electronic platforms, etc.
` Design, fabrication, and testing of a high-speed USB isolator
` Software and firmware development for a USB-to-SPI/SMBus Serial Adapter
` Analysis and architecture design for a high-density, nano-device memory platform
` Analysis for a massively dense 3D integrated memory
` Design of a radiation-tolerant, nano-device memory IC
`
`
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`
`Distinguished Engineer, Silicon Laboratories, Inc.
`April 2010 to Present
`Lead the design of 8-bit and 32-bit microcontroller integrated circuits. Responsible for
`IC architecture, peripheral design, and project management. Personally designed an all-
`digital PLL, USB and USART peripherals, timing and memory logic, low-power charge-
`pumps, and other analog, mixed-signal and digital circuits and systems.
`
`Vice-President, Engineering, Keterex, Inc.
`August 2006 to April 2010
`Led the design of mixed-signal integrated circuits and systems. Personally designed a
`mixed-signal audio playback IC, a 500V ballast controller and half-bridge driver, a small-
`footprint boost controller for DDR memory platforms, and an ultra low-power signal pro-
`cessing IC. Personally developed firmware (in C) and scripting/IDE software (in C and
`Java) for serial communications and audio processing.
`
`CTO / Vice-President, Engineering, Zilker Labs, Inc.
`December 2003 to August 2006
`Led the design of innovative digital power-management products. Established the IC de-
`sign team and infrastructure. Co-authored the PMBus Specification. Personally per-
`formed product definition, IC architecture and RTL design, and firmware development.
`
`Principal Design Engineer, Cygnal Integrated Products, Inc.
`March 1999 to December 2003
`System and circuit design for mixed-signal microcontroller products. Served as the archi-
`tect and team leader for several products, all of which sampled 1st silicon. Individual de-
`sign efforts included linear regulators, supply monitors, crystal and precision RC oscilla-
`tors, voltage references, a USB clock recovery system, a proprietary serial debug inter-
`face, a µP instruction cache, a micropower real-time clock, and digital interface, control,
`and timing peripherals. Designed the platform and firmware for host-to-device commu-
`nications and debugging.
`
`Senior IC Design Engineer, Analog Devices, Inc.
`June 1995 to June 1998
`Team Leader for development of a CDMA/AMPS Voiceband/Baseband Codec ASIC.
`Tasks included specification, interface design, top-level integration/simulation and cus-
`tomer interface. Lead Design Engineer for development of a DBS digital receiver ASIC.
`Tasks included ADC, DAC, oscillator, and PLL design, IC evaluation, and technical
`management of contractor activities.
`
`Principal Design Engineer, Intermedics, Inc.
`May 1992 to June 1995, June 1998 to March 1999
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`Specification, design, layout supervision, debug, and test development for high-reliability
`micropower mixed-signal CMOS ICs for implantable applications. Projects included
`wireless telemetry ICs, a waveform compression and storage IC, a flyback charging and
`shock delivery controller, ADCs, switched-capacitor filters, DC-to-DC converters, and
`reference generators.
`
`Assistant Researcher, Analog Circuits Group, NC State University
`August 1988 to May 1992
`Original research and development of an intelligent implantable wireless telemetry in-
`strument for biomedical applications, including the design, layout, and testing of mixed-
`signal CMOS ICs to provide data acquisition and wireless bidirectional digital telemetry
`functions.
`
`Systems Engineer, NASA Langley Research Center
`June 1987 to August 1988
`Designed a microprocessor-based motion controller for linear DC actuators, including
`system software and firmware development.
`
`Assistant Researcher, Space Electronics Group, NC State University
`August 1985 to May 1987
`Original research and development of a software platform (in C) for modeling the effects
`of radiation on semiconductors.
`
`Research Engineer, Naval Research Laboratory
`Summer 1986
`Designed and constructed a electronic dosimetry system for use in radiation effects ex-
`periments. Performed radiation experiments on integrated circuits at several accelerator
`facilities. Consulted on radiation effects in digital memories.
`
`SELECT ISSUED PATENTS (over 55 patents issued)
`5,522,866: Method and apparatus for improving the resolution of pulse position modula-
`tion communications between an implantable medical device and an external
`medical device
`5,548,795: Hybrid analog-to-digital convertor for low power applications, such as use in
`a implantable medical device
`5,626,625: Method and apparatus for measuring the period of response of an implantable
`medical device based upon the difference in phase between a trigger signal
`and an internal clock signal
`6,559,629: Supply voltage monitor using bandgap device without feedback
`6,738,858: Cross-bar matrix for connecting digital resources to I/O pins of an integrated
`circuit
`6,794,856: Processor based integrated circuit with a supply voltage monitor using
`bandgap device without feedback
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`6,839,795: Priority cross-bar decoder
`6,886,089: Method and apparatus for accessing paged memory with indirect addressing
`6,898,689: Paging scheme for a microcontroller for extending available register space
`6,917,658: Clock recovery method for bursty communications
`6,950,047: Method and apparatus for combining outputs of multiple DACs for increased
`bit resolution
`6,950,491: Clock circuit with fractional divide circuit
`6,956,518: Method and apparatus for subclocking a SAR analog-to-digital converter
`6,968,472: Serial data interface
`7.042.201: Digital control circuit for switching power supply with pattern generator
`7,071,733: Cross-bar matrix for connecting digital resources to I/O pins of an integrated
`circuit
`7,119,526: Processor based integrated circuit with a supply voltage monitor using
`bandgap device without feedback
`7,119,527: Voltage reference circuit using PTAT voltage
`7,171,542: Reconfigurable interface for coupling functional input/output blocks to lim-
`ited number of I/O pins
`7,250,825: Method and apparatus for calibration of a low frequency oscillator in a pro-
`cessor based system
`7,251,112: Battery protect circuit for switching circuit that switches between a supply
`and a battery
`7,256,611: Cross-bar matrix with LCD functionality
`7,292,019: Method for accurately setting parameters inside integrated circuits using in-
`accurate external components
`7,395,447: Precision oscillator for an asynchronous transmission system
`7,362,554: Electrostatic discharge (ESD) clamp using output driver
`7,343,504: Micro controller unit (MCU) with RTC
`7,492,139: Digital control circuit for switching power supply with serial data input
`7,498,962: Analog-to-digital converter with low power track-and-hold mode
`7,504,900: Integrated circuit package including programmable oscillators
`7,506,634: Ignition timing circuit
`7,568,117: Adaptive thresholding technique for power supplies during margining events
`7,589,514: Method for accurate current sensing in power converters
`7,653,757: Method for using a multi-master multi-slave bus for power management
`7,908,402: Integrated multi-function point-of-load regulator circuit
`8,289,010: Method for control of overlap times in switching power converters
`8,456,242: Frequency Locked Loop
`8,638,081: Active droop current sharing
`8,904,076: Coder with snoop mode
`8,914,624: Changing the reset state of a processor
`9,106,176: Apparatus for motor control system and associated methods
`9,160,166: Charge pump for low power consumption apparatus and associated methods
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`SELECT PUBLICATIONS & PRESENTATIONS (over 25 total)
` Retention Regulator, Silicon Laboratories Technical Symposium, 2016.
` A Boot-agnostic Power Architectu