United States Patent
`
`[19]
`
`[11] Patent Number:
`
`4,792,896
`
`Maclean et a].
`
`[45] Date of Patent:
`
`Dec. 20, 1988
`
`[54] STORAGE coN'moLLER EMULATQR
`PROVIDING TRANSPARENT RESOURCE
`
`[T5]
`
`]"V°'“°'s
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`[73] Asstgnee:
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`Mndter, Puslinch. all of Canada
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`Canada
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`[N] A-PPL N0-3 555339
`[22] Filed:
`N9“ 29_ 1933
`Is” In CL‘ _____________________________________________ GMT 13/12
`[521 US. Cl.
`.................................................. .. 3454/20»
`[53] Field 0f SHIT‘!
`354/300 M5 File. 900 M5 File
`-
`“damn”: Cned
`[56]
`155- PATENT DOCUMENTS
`3.915.712
`It/19?6 Hepworth
`4.l27.896 l1/ 1973 Rastavsky ..
`4.204.351
`5/1930 Br!-hdfltold -
`4395-205 '0/1931
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`4/1935 Kantner
`4.511.963
`-¢,Sl6tl99 S/1985 Fneder ..... ..
`4.6-12,159
`211937 Foster
`FOREIGN PATENT DOCUMENTS
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`enyon
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`Primary £a:aminer—Archie E. Williams. Jr.
`Assistant Examr'rter—Florin Mumeanu
`Arr
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`[57]
`ABSTRACT
`A microprocessor controlled mass storage controller is
`used as an interface for mass store e devices which are
`shared by a plurality of stand-algorte microcomputer
`systems. The microprocessor controlled mass storage
`controller has a system interface which maintains com-
`Inunications with a host microcomputer; a dedicated
`microprocessor which maintains the internal control of
`the controller and it network interface which maintains
`
`an access to the external network. Data transparency
`and tntegnty are achieved through the simulation by
`the controller of the mass storage device characteristics
`a'1d"°5P°"3°5-
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`6 Claims, 7 Drawing Sheets
`
`II':I-,———————
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`
`________ __,._.__.J
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`
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`Apple 1010
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`Apple 1010
`U.S. Pat. 9,189,437
`
`

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`U.S. Patent
`
`mm,M
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`Sheet 1 of‘!
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`4,792,896
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`US. Patent
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`Dec.20,1988
`
`Sheet 2 of 7
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`Dec. 20, 1988
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`Dec. 20, 1988
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`U.S. Patent
`
`Dec. 20, 1988
`
`Sheet 5 on
`
`4,792,896
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`INFORMATION
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`U.S. Patent
`
`Dec. 20, 1933
`
`Sheet 7 of 7
`
`4,792,896
`
`INTERFACE M
`
`HOTE= This cicuit is optional aid
`is my needed if local
`dlslt drives are desired
`‘:1: addition mm network.
`
`INTERFACE
`
`

`
`1
`
`STORAGE CONTROLLER EMULATOR
`PROVIDING TRANSPARENT RESOURCE
`SHARING IN A COMPUTER SYSTEM
`
`4,792,896
`
`The present invention relates to a device for transpar-
`ent resource sharing in microcomputer systems. and
`more pa.rticularly relates to a microprocessor controlled
`mass storage controller which will enable rnicrocom-
`puter systems to access external mass storage devices
`and permit a transparent data transfer to the user.
`BACKGROUND OF THE INVENTION
`
`With widespread use of stand-alone microcomputers,
`the need to interconnect the individual computers and
`to share information and resources via networks has led
`to the development by numerous companies of many
`schemes and devices to make this sharing possible.
`However, to date, most, if not all, attempts in this area
`have been met with a fundamental problem. The prob- 10
`lem is the requirement for modification of all operating
`system software packages to run on and accommodate
`the network system.
`A typical microcomputer consists of a keyboard, a
`processing unit (which will include the central proces-
`sor unil, memory, and various system control units), a
`display unit, and a mass storage system. In most cases
`the mass storage system will be a floppy disk drive
`system. The storage system usually consists of four
`parts: the system interface through which the system
`and the storage system communicate so that the system
`can send requests for service to the storage system and
`data can be transferred between the computer and the
`storage system; the controller (in essence a dedicated
`microprocessor) which interprets the system requests
`and executes the required operations to satisfy the re-
`quests; the mass storage device interface through which
`the controller interacts with the physical storage de-
`vice; and the storage device itself.
`In order for the operating software in a microcom-
`puter to use the storage system, there are normally two
`interfaces—tl1e low level hardware interface and a
`higher level software interface.
`The low level hardware interface refers to the system
`interface mentioned above as being part of the storage
`system. Associated with the system interface is the pro-
`tocol used so that commands and data can be success-
`fully transferred between computer and controller. In
`most microcomputers t.he system interface is connected
`directly to the microcomputer bus, in which case the
`protocol is the same as is used to access other devices on
`the bus. However, the storage system may be external
`to the computer and interfaces to the computer in a
`different manner. In all cases there must be a well de-
`fined physical protocol in order for the computer to
`communicate with the storage system.
`The higher level software interface refers to the way
`in which software is used to command the storage con-
`troller. The actual commands available; the order in
`which commands can be delivered; when data is to be
`transferred; and how status information can he exam-
`ined are examples of the functions of the software inter-
`face. Software in the computer usually calls upon estab-
`lished routines (“device drivers") present in the com-
`puter (either in ROM or in the operating system) to
`handle the software interface. However, it is possible
`for software to perform its own interface if the program
`designer desires.
`
`2
`As an example, in most floppy disk systems, the hard-
`ware interface consists of a floppy disk controller mod-
`ule (FDC). This controller typically consists of a special
`purpose microprocessor control device. Communica-
`tion between the FDC and the microcomputer process-
`ing unit is accomplished through a well defined proto-
`col. This protocol varies between machines. In most
`cases the FDC is connected to the data/address/control
`bus of the microcomputer. Commands are passed to the
`FDC and data is transferred to and from the FDC using
`the protocol.
`A dial: is logically divided into concentric circular
`tracks, which are further subdivided into units called
`sectors. All operations performed with the disk are
`done in terms of these units. Typical operations include;
`read a sector or track, write a sector or track. and for-
`mat a track. To perfonn the operations, the microcom-
`puter processing unit addresses the FDC. passing it a
`command and any required data. The FDC will then
`execute the desired command. When finished, the FDC
`will signal the processor and provide status information.
`and possibly data if necessary.
`Other mass storage systems are similar in concept to
`the floppy disk drive system.
`Other network designers have attempted to replace
`the software interface in order to install their hardware
`into the computers. By replacing the existing device
`drivers with their own, the designers can make the
`network usable by other software that used the original
`device drivers. The problem with this method is that
`future releases of operating systems may include new
`sofiware that is not compatible with past device drivers,
`thus requiring that the network designer rewrite the
`drivers for new releases. This technique of replacing
`software is called "patching" and has many inherent
`disadvantages, future incompatibility being just one.
`The other disadvantage to “patching" the operating
`system is that some application programs will supply
`their own device drivers, and therefore will not be able
`to use the network. Also, the user is dependent on the
`network supplier to furnish the patches for any operat-
`ing system the user may desire to install in his system.
`Background patent references of general interest are:
`U.S. Pat. No. 4,399,504 of Ronald L. Obermarclt et al
`issued Aug. 16, I983; U.S. Pat. No. 4,303,990 of William
`H. Seipp issued Dec. 1, I981; U.S. Pat. No. 3,975,712 of
`Edward C. Hepworth et al issued Aug. I7. 1976: U.S.
`Pat. No. 4,399,503 of Kenneth R. Hawley issued Aug.
`16. 1983; Canadian Pat. No.
`l,l24,833 of David A.
`Brereton et :11 issued June I, 1982; Canadian Pat. No.
`1,145,354 of John Vivian et al issued May 3, i983; Cana-
`dian Pat. No. 1,124,873 of David A. Brereton et al is-
`sued June I, 1982 and Canadian Pat. No. 1,106,073 of
`Richard A. Lemay et al issued July 23, 1981. Of particu-
`lar interest is U.S. Pat. No. 4,399,504 of Obermarck et al
`which teaches a software method and means for sharing
`of data resources in a local multi-processing multi-pro-
`grammirlg environment by applications executing on
`one or more central electronic computer systems.
`It is an object of the present invention to provide the
`capability of resource and information sharing from a
`network system of a microcomputer system, while at
`the same time avoiding the problem of the need to mod-
`ify the software package for the operating system to run
`on and accommodate the network system. It is a further
`object of the present invention to provide a network
`interface for a stand-alone microcomputer which will
`be invisible to application programs, thereby enabling
`
`

`
`4,792,896
`
`4
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`3
`existing software to be run unchanged on the mi-
`crocomputer network system. In this way the software
`base available to the user is not decreased in size as
`would be the case in adding to the software package to
`accommodate the network system.
`It is a further object of the present invention to re-
`place the storage system hardware of the microcom-
`puter system with different interface hardware which
`will make the system interface function in the same
`manner as the original interface. In this way all past.
`present and future software designed to work with the
`original storage device will work with the hardware of
`the present invention.
`SUMMARY OF THE INVENTION
`
`According to the present invention there is provided
`a microprocessor controlled mass storage controller for
`coupling a host microcomputer system to a network
`configuration to provide transparent resource sharing.
`The microprocessor comprises a system interface means
`for transferring input and output commands from the
`microcomputer systems. A dedicated microprocessor
`means is provided, coupled to the system interface
`means for processing the commands to simulate the
`execution of the commands. The microprocessor fur-
`ther provides a network interface means coupled to the
`dedicated microprocessor and associated with the net-
`work configuration to transfer data to and from the
`network configuration on command from the dedicated
`microprocessor.
`As well there is provided a method for providing
`resource sharing to a microcomputer with a system
`interface means, a dedicated microprocessor means and
`a network interface means. coupled to a network con-
`figuration. The method comprises accepting data from
`the microcomputer into the system interface means in a
`parallel data format, transferring the data to the net-
`work interface means and, if required. convening the
`data to a serial data format, and transmitting the data in
`appropriate format to the network configuration. Other
`data is received from the network configuration and, if
`necessary converted to a parallel data format and trans-
`ferred in parallel format
`to the microcomputer. The
`characteristics and responses of a mass storage device
`are simulated by processing commands sent by the mi-
`croprocessor and presenting the status to the micro-
`processor. Data is transmitted and received by the net-
`work interface means to and from the network configu-
`ration by executing network commands in the network
`interface means.
`By replacing the existing hardware interface to a
`mass storage medium of a microcomputer with the
`hardware interface controller according to the present
`invention, the function of which is to interface with a
`communications network while at the same time retain-
`ing the same characteristics and responses as the origi-
`nal. no other portion (hardware or software) of the host
`computer need be changed in any way to enable that
`computer to operate on data from sources other than its
`originally intended storage medium. Since the main
`processor is totally unaware of any difference, the de-
`sired transparency is achieved. All past and future soft-
`ware designed to work with the storage system will
`thus work with the device according to the present
`invention.
`
`5
`
`13
`
`45
`
`55
`
`60
`
`Other advantages and objects of the present invention
`will become apparent upon reading the following de-
`tailed description and upon referring to the drawings in
`which;
`FIG. I is a block diagram of a transparent resource
`sharing device according to the present invention show-
`ing its main components;
`FIGS. 2, 3 and 4 respectively are more detailed block
`diagrams of specific components of the device of FIG.
`1, namely, respectively, the system interface, dedicated
`microprocessor based controller and network interface
`respectively.
`these Components being arranged for a
`floppy disk application of the invention;
`FIG. 5 is a logic flow diagram for the internal soft-
`ware that controls the dedicated processor 4 of FIG. 1;
`FIG. 6 is a logic flow diagram for the processing of a
`RECEIVE-INTERRUPT request;
`FIG. T is a logic flow diagram for the processing of a
`RECEIVE-END-INTERRUPT request;
`FIG. II is a logic flow diagram for the processing of a
`PRINTER-INTERRUPT request; and
`FIG. 9 is a circuit diagram of an optional interface for
`the connection of a local storage device in addition to
`the simulated transparent mass storage.
`While the invention will be described in conjunction
`with example embodiments particular to a floppy disk
`application. it will be understood that it is not intended
`to limit the invention to such embodiments or such
`application. On the contrary, it is intended to cover all
`alternatives, modifications and equivalents as may be
`included within the spirit and scope of the invention as -
`defined by the appended claims.
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`In the following description. similar features in the
`drawings have been given similar reference numerals.
`Turning to FIG. 1 there is shown a block diagram of
`the components making up the transparent resource
`sharing controller device according to the present in-
`vention. The controller consists of three major units. a
`system interface 2. a dedicated control processor (mi-
`crocomputer) 4 and a network interface 6.
`System interface 2 is responsible for supporting com-
`munication with the host microcomputer shown gener-
`ally as 8 in FIG. 1. It is connected to host microcom-
`puter system 8 through data bus Ill. The system inter-
`face 2 is capable of handling the protocol required by
`host system 8. and exactly simulates the characteristics
`and responses of the normal computer hardware which
`it replaces. The protocol typically consists of the fol-
`lowing characteristics:
`some way of addressing the interface module;
`a data path so that the data can be transferred to/from
`the interface module:
`various control signals used to transfer data in a con-
`trolled manner with a minimum of errors.
`The important portions of the system interface are the
`bus interface data transceiver (data transceiver module)
`12. the bus interface control circuit (control interface
`module) 14 and the simulated registers (register bank)
`16.
`Data transceiver 12 is enabled when data is to be
`transferred between the host system 8 and simulated
`registers 16. or between the control processor 4 and
`host system 8. The direction of operation of transceiver
`
`

`
`4,792,896
`
`ID
`
`50
`
`60
`
`5
`12 is switchable and is selected according to the source
`and destination of the data.
`Interface control circuit 14 will accept signals from
`the host system 8 and the dedicated control processor 4.
`and will transceive the required control signals needed 5
`to coordinate the operation of the data transceiver 12
`and the registers 16. The interface control signals will
`therefore transceive signals used by the host system 8,
`the simulated register bank 16. the transceiver 12 and
`the control processor 4.
`The simulated registers 16 are needed in order to fully
`simulate the original control or hardware. The number
`and function of the registers will vary of course accord-
`ing to the type of mass storage controller being replaced
`by the hardware according to the present invention. 15
`Some typical registers include data registers. status and
`control registers and registers to contain parameters of
`operation. In the device according to the present inven-
`tion. these registers are present and behave in the same
`manner as the original controller. Also the control pro-
`cessor I is capable of accessing registers 16.
`A more detailed block diagram of system interface 2
`and the interrelationship of its components, arranged
`for a floppy disk application. is shown in FIG. 2. It will
`be understood that the actual circuit of system interface
`2 will depend on the mass storage device being simu-
`lated and the nature of the interface for any particular
`host system 8. The configuration switches 3 identify
`the address of the controller on the communication
`network plus other parameters. For any particular com-
`bination of storage device/host system. the system in-
`terface 2 is well defined. This interface however can
`obviously vary greatly between combinations.
`Turning to FIGS. 1 and 3, dedicated control proces-
`sor 4 is responsible for receiving commands from the
`host system 8 via the system interface 2, and performs
`the required operations to simulate the execution of the
`commands. typically by accessing the network 20 to
`send/receive data, then returning status and optional
`data to the computer. In the device according to the
`present invention processor 4 is a dedicated micro-
`processor configured through the use of hardware and
`software to operate in the required manner. Such a
`microprocessor will normally incorporate ROM 22
`(which will contain the firmware for the controller).
`RAM 24 (which will be used to hold temporary infor-
`mation and buffer data while being used) and associated
`control circuitry 26. The processor 4 may be configured
`as a one-chip microcomputer (containing RAM, ROM
`and microprocessor in one integrated circuit) or. as a
`number of separate integrated circuits. In the extreme
`case. it is possible for the control processor to be a
`custom made VLSI with the operating software hard-
`wired into the chip.
`Control circuitry 26 is necessary in order to coordi-
`nate the operation of processor 4 and allow control
`processor access to the registers 16 and the network
`interface 6. Also present in the control circuit 26 is a
`clock generation circuit 28.
`As indicated, control processor 4 is in essence a small
`microcomputer. It is the installed software present in
`ROM 22 and the control circuits 26 that configure this
`computer for this particular application.
`Tuming to FIGS. 1 and 4, the network interface 6 is
`responsible for allowing the control processor II to ac-
`cess network 20. The actual network technology and
`protocols used are immaterial, as this side of the hard-
`ware is transparent to the computer 8. Typically. the
`
`6
`network interface 6 will consist of two parts. One part
`will be responsible for handling the low level protocol
`of the network. such as packet size, device-to~device
`communication, and error detection. The other part
`will be the actual transmitter and receiver used to gen-
`erate the required signal characteristics for the network
`20.
`In some systems. it may be desirable to use both the
`mass storage controller of the host system and the net-
`work controller of the device according to the present
`invention. This case will not be a problem if the host
`system will allow more than one storage controller to
`be present at a time. However, in those systems where
`only one such controller board is allowed at a time. an
`alternative solution is used. In these cases, the original
`controller hardware is modified so that the network
`controller according to the present
`invention can be
`interfaced to the original hardware directly. Instead of
`using the system interface according to the present
`invention to transfer data between the network control-
`ler and the host system, the interface already present on
`the original controller is used. By adding appropriate
`control circuitry and software to the device according
`to the present invention. it can be determined whether
`to use the actual mass storage device or the network.
`When the mass storage device is desired, the original
`controller is enabled in order to satisfy the host system
`request. Whenever the network is desired. the original
`controller is disabled and the device according to the
`present invention will perform the required functions.
`It is possible to simulate more than one device at a
`time using the device in question. For eitample. a board
`has been developed which simulates a floppy disk con-
`troller and a printer port on the same board. To simulate
`more than one device the concepts are exactly the saute
`as previously described herein, but the control circuitry
`and the software are more complex.
`In addition to the transparency of the network con-
`troller device according to the present invention. it is
`also possible to write software that “knows“ about the
`network and will take advantage of the network. It is
`therefore possible to write programs to uw the network
`to its fullest, such as electronic mail, distributed data
`bases. network operating systems and the like. As well
`as simulating the operations of the mass storage device.
`the network interface 6 can also be capable of executing
`other commands which are particular to the network.
`thus allowing software designed to use the network to
`take advantage of the device according to the present
`invention.
`
`EXAMPLE APPLICATIONS
`
`First Application
`An example application for this type of network con-
`troller device according to the present invention is that
`of a simple disk sharing facility. This network consists
`of a central computer, containing a network interface
`and floppy disk drives. and a number of computers
`without
`local disk drives connected to the network
`using the device according to the present
`invention
`which simulates floppy disk controllers. Whenever the
`software within the computers wants to access a floppy
`disk. the device according to the present invention will
`receive the commands from their host. The commands
`will then be relayed to the central computer to be acted
`upon. Results will be returned and passed on to the host.
`In effect, therefore. the sofiware within the comput-
`ers operate as though there are floppy disk drives local
`
`

`
`7
`to each computer, when in fact the drives are present in
`external computer systems.
`In this way, disks (and
`therefore data) can be shared.
`Second Application
`A single tape drive unit can be installed into a central
`computer. Other computers with the appropriate appli-
`cation of the device according to the present invention
`can be attached to the central computer. In this configu-
`ration all the other computers have access to the tape
`drive unit of the central computer as a back-up. but
`without the expense usually incurred by buying a tape
`drive unit for each user.
`Third Application
`it is possible for a
`In a more complex application,
`number of microcomputers, each containing its own
`combination of floppy disk drives/hard disks/tape
`drives, all networked together with a central unit also
`containing these types of storage devices. Each com-
`puter can be configured in a number of ways so that
`each user has available to him, his own local and remote
`working storage. Also working system soflware and
`application programs can be placed in the central unit
`so that all users have access to them. The above config-
`uration allows for a very flexible resource sharing net-
`work with the capability of stand-alone operation as
`well.
`Fourth Application
`The floppy disli controller board in an IBM Personal
`Computer (or PCXT) (trade mark) can be replaced
`with the network interface device according to the
`present invention. A parallel printer port may be simu-
`lated on this device.
`The network will be a simple bus or daisy-chained
`configuration with a central controlling IBM PCXT
`(trade mark) containing the floppy images that the slave
`computers will use. The floppy images are not physical
`floppies in most cases (although they can be), but are
`usually files kept on the central hard disk that are made
`to look like floppys through the use of a resident soft-
`ware within the controlling computer. A printer can be
`shared due to the simulated printer port, and printer
`output can be spooled within the central server so that
`the slave units are freed to perform other operations
`while the printer is busy.
`As far as the slave units are concerned they have
`access to four floppy disk drives that appear to be local.
`However. whenever the computer attempts to access
`the floppy disk controller usually rcsisent, it will actu-
`ally get the network controller device. Since that de-
`vice will respond exactly like the original floppy disk
`controller. the software and the hardware within the
`slave computer will function properly without the need
`for changes. In fact slave units do not need to be run-
`ning the same operating systems, even though they are
`connected to the same central server. For example,
`some slaves can be using PC—DOS 1.1 (Trade Mark),
`others using PC-DOS 1.0 (Trade Mark). CPM-86
`(Trade Mark) or any other operating system available
`that is able to use the floppy disk drives.
`Since the network controller card is transparent (be-
`cause it exactly simulates the floppy disk controller),
`anything that is designed to be used on an IBM PC with
`disk drives (whether hardware or software) can still be
`used. Therefore, local hard disks are possible, as are
`RAM disks, communication devices, and even other
`networks from other manufacturers.
`In addition to the above examples, a local floppy disk
`drive controller can be installed in the manner previ-
`
`65
`
`4,792,896
`
`8
`ously mentioned herein. The system interface on the
`device of the present invention is partially disabled so
`that it will not access the IBM system bus whenever the
`floppy disk controller does. Also the floppy disk con-
`troller integrated circuit on the controller board is taken
`out of that board and a small interface board is plugged
`in,
`in its place. The controller integrated circuit is
`placed into this interface board. The interface board is
`also connected to the device of the present invention via
`a cable. It is possible to configure the resulting system
`with a number of remote floppy disk drives and a num-
`ber of local floppy disk drives up to a. total of four
`drives. The hardware is capable of determining which
`drive is being accessed at any particular time and is
`therefore able to decide whether to use the actual
`floppy disk controller or to use the network. In any case
`the software and hardware in the computer will “see"
`all the floppys as being local devices.
`FIG. 5 is a logic flow diagram of the sequence of
`events that takes place for the control of the dedicated
`microprocessor 25 in FIG. 3. The instructions are
`loaded. from the Read Only Memory (ROM) 22 in FIG.
`3 into the microprocessor 25. Upon receipt of a request
`from the host system at start step I00. the microproces-
`sor executes instructions to initialize hardware and to
`start communication network functions. At step 102 the
`microprocessor 25 sends an interrupt to the host system
`after all the simulated register 16, in FIG. 2 have been
`reset. At step 106 the disk status in the register bank 16
`is set to READY state. the command and parameters
`which are sent from the host system are fetched from
`the system interface 2 to the microprocessor at step Ills
`the disk status in the register bank 16 is set to BUSY
`state and the microprocessor 25 executes instructions
`from ROM 22 to interpret the command. Upon receipt
`an INPUT command from the host microcomputer at
`step 110. the microprocessor 25 executes instructions
`from ROM 22 to transmit a RECEIVE command on
`the communication network at step 112 and set Random
`Access Memory (RAM) 24 ready to receive data from
`communication network at step II4. At step 116 the
`data is formated to the form recognizable by the host
`system 2 and then output to the host system through the
`system interface 2 until no more data is required by the
`host system- At step 120 upon sending the last data to
`the host microcomputer, the microprocessor executes a
`command to reply to the communication network with
`11 LAST DATA signal. At step 122. the microprocessor
`receives the results from the communication network
`and outputs them to the host microcomputer through
`the system interface 2 at step 124. 1'ben returns to step
`106 waiting to process further commands from the host
`microcomputer. At step 130, upon receipt of an output
`command, the microprocessor 25 at step 132 executes
`instructions resident
`in the ROM 22 to transmit a
`TRANSMIT command to the communication network
`and waits for the reply status from the communication
`network at step 134. Upon receipt of the replay status
`from the communication network, at step 136 the mi-
`croprocessor executes instructions to transmit data to
`the communication network until the last data has been
`sent at step 138. At the end of the transmission the mi-
`croprocessor resets itself to step 122. At step 140, upon
`receipt of a control command. the microprocessor 25
`records the control infomiation in the RAM 24 at step
`142 and outputs the results to the host system at step 144
`and returns to step 106 waiting for funher command to
`be processed.
`
`

`
`9
`FIG. 6 is a logic flow diagram of the sequence of
`events that takes place in a RECEIVE-INTERRUPT
`request. At step 200, upon receipt of the receive-inter-
`rupt request, the microprocessor 25 executes routines
`resident in ROM 22 to store the data byte in RAM 2.4
`and updates the pointer for the RAM 24!.
`Turning to FIG. 7 is a logic flow diagram of the
`sequence of events that
`take place in a RECEIVE-
`END-INTERRUPT request. At step 300 the rnicro-
`processor 25 executes routines in ROM 22 to set at end
`of data indicator on the receive buffer in the RAM 24.
`At step 302, the microprocessor 25 verifies for receive
`errors, and when no error has been detected the RE-
`CEIVE-END-INTERRUPT request returns control to
`the calling routine at step 306. At step 304 when errors
`have been detected, the microprocessor 25 executes
`routines in ROM 22 to send RE-TRANSMIT request to
`the communication network, flags the information in
`the RAM 24 and then returns control to the calling
`routine at step 306.
`Turning to FIG. 8, is a logic flow diagram of the
`sequence of events that take place in a PRINTER IN-
`TERRUPT request. At step 400, the microprocessor
`stores the data in the RAM 24 and updates the printer
`for the RAM 24. At step 402 the microprocessor 25
`returns control to the calling routine when the RAM 24
`is not full and sends a printer message to the communi-
`cation network when the RAM 24 is full then returns
`control to the calling routine in step 406.
`Turning to FIG. 9, there is shown a circuit diagram
`of an optional interface 34 for the connection of a local
`storage device in addition to the simulated transparent
`mass storage. The mass storage device controller 37, for
`example a floppy disk controller, is moved from the
`socket on the floppy disk controller to the interface 34.
`The floppy disk controller socket 38 is then used for the
`physical connection of interface 34 to the floppy disk
`controller board.
`The tristate buffer 35 provides the interface for data
`between the system interface 2 and the floppy disk
`controller. The 2 to 1 selector 36 selects between the
`simulated or local floppy disks by the appropriate rout-
`ing of the control signals (CS, DACK, IRQ, DRQ).
`In this way, the interface 34 can selectively enable o