Trials@uspto.gov
`571-272-7822
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` Paper 9
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` Entered: March 13, 2017
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`DISH NETWORK, LLC,
`Petitioners,
`
`v.
`
`TQ DELTA, LLC,
`Patent Owner.
`_______________
`
`Case IPR2016-01760
`Patent 9,094,268 B2
`____________
`
`
`Before SALLY C. MEDLEY, KALYAN K. DESHPANDE, and
`TREVOR M. JEFFERSON, Administrative Patent Judges.
`
`JEFFERSON, Administrative Patent Judge.
`
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`571-272-7822
`
`
`
`
`
`
`
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`
`
`
`
` Paper 9
`
`
`
` Entered: March 13, 2017
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`DISH NETWORK, LLC,
`Petitioners,
`
`v.
`
`TQ DELTA, LLC,
`Patent Owner.
`_______________
`
`Case IPR2016-01760
`Patent 9,094,268 B2
`____________
`
`
`Before SALLY C. MEDLEY, KALYAN K. DESHPANDE, and
`TREVOR M. JEFFERSON, Administrative Patent Judges.
`
`JEFFERSON, Administrative Patent Judge.
`
`
`DECISION
`Institution of Inter Partes Review
`37 C.F.R. § 42.108
`
`
`
`
`
`
`
`IPR2016-01760
`Patent 9,094,268 B2
`
`
`INTRODUCTION
`I.
`Cisco Systems, Inc. (“Petitioner”) filed a Petition requesting an inter
`partes review of claims 1, 2, 4, 11, 12, 14, 16, and 18 of U.S. Patent
`No. 9,094,268 B2 (Ex. 1001, “the ’268 patent”). Paper 1 (“Pet.”). TQ
`Delta, LLC (“Patent Owner”) filed a Preliminary Response. Paper 6
`(“Prelim. Resp.”). We have jurisdiction under 35 U.S.C. § 314(a), which
`provides that an inter partes review may not be instituted “unless . . . there is
`a reasonable likelihood that the petitioner would prevail with respect to at
`least 1 of the claims challenged in the petition.” After considering the
`Petition, the Preliminary Response, and associated evidence, we conclude
`that Petitioner has demonstrated a reasonable likelihood that it would prevail
`in showing the unpatentability of claims 1, 2, 4, 11, 12, 14, 16, and 18 of the
`’268 patent.
`
`A. Related Proceedings
`The parties state that the ’268 patent is asserted in TQ Delta LLC v.
`Comcast Cable Comms., et. al., Case No. 1:15-cv-00611 (D. Del.); TQ Delta
`LLC v. CoxCom LLC et al., Case No. 1:15-cv-00612 (D. Del.); TQ Delta
`LLC v. DirecTV et al., Case No. 1:15-cv-00613 (D. Del.); TQ Delta LLC v.
`DISH Network Corp. et al., Case No. 1:15-cv-00614 (D. Del.); TQ Delta
`LLC v. Time Warner Cable Inc., et al., Case No. 1:15-cv-00615 (D. Del.);
`and TQ Delta LLC v. Verizon Comms., Inc., Case No. 1:15-cv-00616 (D.
`Del.). Pet. 1; Paper 4, 2–3. The ’268 patent is also involved in Dish
`Networks LLC v. TQ Delta LLC IPR2016-01469 (PTAB Jul. 21, 2016). Pet.
`1; Paper 4, 2–3.
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`B. The ʼ268 Patent
`The ’268 patent describes “a multicarrier transmission system having
`a low power sleep mode and a rapid-on capability.” Ex. 1001, 3:35–37. The
`sleep mode idles a multicarrier transceiver when it is not needed to transmit
`or receive data, with transmission and reception capabilities quickly restored
`without requiring full initialization after inactivity. Id. at Abstract. The
`system includes a transceiver at the local central telephone office’s location
`(“CO transceiver”) and a transceiver at the customer’s premises (“CPE
`transceiver”), which communicate over a telephone line. Id. at 3:66–4:9.
`Figure 1 reproduced below depicts a preferred embodiment of the invention.
`
`
`Figure 1 shows a block diagram of a multicarrier transmission system. Id. at
`3:50–53. Each transceiver includes “DSL transceiver 10” with “transmitter
`section 12 for transmitting data over a digital subscriber line 14 and a
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`receiver section 16 for receiving data from the line.” Id. at 4:18–21, FIG. 1.
`In one embodiment, the transmitter and receiver sections 12, 16 enter a low
`power mode (or “sleep” mode), where power is reduced or cut off to the
`digital modulators/demodulator portions (sections 12, 16) of the transmitter
`and receiver sections (corresponding to the IFFT 20 (data modulator) and
`FFT 56 (demodulator) of the CPE transceiver of Figure 1). Id. at 6:66–7:21.
`In another embodiment, the transceiver is placed into a “partial” sleep mode
`“in which only part of each transceiver is powered down.” Id. at 8:52–60.
`The ’268 patent specification discloses that a transceiver entering a
`low power mode must first store a variety of line parameters comprising its
`“state memory.” Id. at 6:66–7:14. During sleep mode state, the CO
`transceiver monitors data subscriber line 14 for an “Exiting Sleep Mode”
`signal from the CPE transceiver. Id. at 7:64–69. The CPE transceiver
`transmits this signal when the “controller receives an ‘Awaken’
`indication. . . . In response to the ‘Awaken’ signal, the CPE transceiver
`retrieves its stored state from the state memory 38; [and] restores full power
`to its circuitry.” Id. at 7:64–8:6.
`
`
`C. Illustrative Claims
`Claims 1, 11, 14, and 16 are independent and reproduced below as
`illustrative of the claims at issue:
`1. A method, in a multicarrier transceiver, comprising:
`transmitting or receiving a message to enter a low power
`mode; and
`entering the low power mode, wherein a transmitter
`portion of the transceiver does not transmit data during the
`low power mode and a receiver portion of the transceiver
`receives data during the low power mode, wherein the
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`transceiver is a device that is capable of transmitting or
`receiving internet and video data.
`
`11. A method, in a multicarrier transceiver, comprising:
`transmitting or receiving a message to enter a low
`power mode for a transmitter portion while a receiver
`portion remains in a full power mode; and
`entering the low power mode for the transmitter
`portion while the receiver portion remains in the full
`power mode, wherein the transceiver is a device that is
`capable of transmitting or receiving internet and video
`data.
`
`14. A method, in a multicarrier transceiver, comprising:
`transmitting or receiving a message to enter a low
`power mode for a transmitter portion while a receiver
`portion remains in a full power mode;
`entering the low power mode for the transmitter
`portion while the receiver portion remains in the full
`power mode; and storing during the low power mode at
`least one parameter associated with the full power mode.
`
`16. A method, in a multicarrier transceiver, comprising:
`transmitting or receiving a message to enter a low
`power mode for a transmitter portion while a receiver
`portion remains in a full power mode; and
`entering the low power mode for the transmitter
`portion while the receiver portion remains in the full
`power mode, wherein the transmitter portion of the
`transceiver does not transmit user data during the low
`power mode.
`Ex. 1001, 10:6–14, 10:64–11:4, 11:12–19, 11:24–31.
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`D. Asserted Grounds of Unpatentability
`The information presented in the Petition sets forth proposed grounds
`of unpatentability for claims 1, 2, 4, 11, 12, 14, 16 and 18 of the ’268 patent
`as obvious over Bowie1 and Yamano.2 Pet. 11–12
`
`II. ANALYSIS
`A. Claim Interpretation
`In an inter partes review, claim terms in an unexpired patent are given
`their broadest reasonable construction in light of the specification of the
`patent in which they appear. 37 C.F.R. § 42.100(b); see Cuozzo Speed
`Techs., LLC v. Lee, 136 S. Ct. 2131, 2144–46 (2016) (upholding the use of
`the broadest reasonable interpretation standard as the claim interpretation
`standard to be applied in inter partes reviews). Under this standard, we
`interpret claim terms using “the broadest reasonable meaning of the words in
`their ordinary usage as they would be understood by one of ordinary skill in
`the art, taking into account whatever enlightenment by way of definitions or
`otherwise that may be afforded by the written description contained in the
`applicant’s specification.” In re Morris, 127 F.3d 1048, 1054 (Fed. Cir.
`1997). We presume that claim terms have their ordinary and customary
`meaning. See Trivascular, Inc. v. Samuels, 812 F.3d 1056, 1062 (Fed. Cir.
`2016). The “ordinary and customary meaning” is that which the term would
`have to a person of ordinary skill in the art in question. In re Translogic
`
`
`1 U.S. Patent No. 5,956,323; filed Jul. 30, 1997, issued Sep. 21, 1999
`(Ex. 1005, “Bowie”).
`2 U.S. Patent No. 6,075,814; filed May 9, 1997, issued June 13, 2000
`(Ex. 1006, “Yamano”).
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`Tech., Inc., 504 F.3d 1249, 1257 (Fed. Cir. 2007). Any special definition for
`a claim term must be set forth with reasonable clarity, deliberateness, and
`precision. In re Paulsen, 30 F.3d 1475, 1480 (Fed. Cir. 1994).
`1. “data” (claims 1, 4, 11, 16, 18)
`Claims 1 and 4 recite “does not transmit data during the low power
`mode,” claim 16 recites “does not transmit user data during the low power
`mode;” claims 1 and 4 recite “receives data during the low power mode;”
`claim 18 recites “receives data during full power mode;” and claims 1 and
`11 recite “transmitting or receiving internet and video data.”
`Petitioner contends that, consistent with the specification, a person of
`ordinary skill in the art would understand that the broadest reasonable
`interpretation of “data” includes “information, other than control signals.”
`Pet. 9–10 (citing Ex. 1001, 4:18–21; 5:9–13, 7:26–29; Declaration of
`Dr. Sayfe Kiaei (Ex. 1003), 17–18). Patent Owner contends that
`construction of data is not necessary in deciding whether or not to institute
`trial. Prelim. Resp. 7. Based on the record before us, we determine that data
`requires no explicit interpretation.
`2. “storing during low power mode” (claims 4, 14)
`Petitioner argues that the broadest reasonable interpretation of
`“storing during the low power mode” that is consistent with the specification
`is “maintaining in memory while in a reduced power consumption mode.”
`Pet. 11 (citing Ex. 1003, 20–21). Petitioner argues that this is consistent
`with the specification that
`disclose[s] a CO transceiver and a CPE transceiver that store
`their respective states in memory upon “Entering Sleep Mode”
`and retain these states in memory while in sleep mode. Ex. 1001
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`at 7:5-14; 7:40-47. Ex. 1003 at p. 19. Once the parameters are
`stored, the CO and CPE transceivers reduce power to their
`respective circuitry. Ex. 1001 at 7:15-20; 7:44-47; Ex. 1003 at
`p.19.
`Pet. 10. Patent Owner contends that no construction of these terms is
`required in deciding whether or not to institute trial. Prelim. Resp. 7. In
`IPR2016-01469, we determined that “low power mode” as recited in the
`’268 patent means “a mode in which power to the circuitry is reduced for the
`purpose of power conservation.” Dish Networks LLC v. TQ Delta LLC
`IPR2016-01469 slip op. at 7 (PTAB Jul. 21, 2016). Based on the record
`before us, we agree with Petitioner that “storing during the low power
`mode” includes “maintaining in memory while in a reduced power
`consumption mode.”
`B. Obviousness based on Bowie (Ex. 1005) and Yamano (Ex. 1006)
`1. Bowie (Ex. 1005)
`Bowie discloses a power conservation system for transmission
`systems in which data is modulated over a communications loop from a
`central office location to a customer premise. Ex. 1005, 1:4‒8. Bowie
`discloses that to provision ADSL service, ADSL units are located at each
`end of a wire loop, a first ADSL unit at the customer premises (CPE) and a
`second ADSL unit at the telephone company central office (COT). Id. at
`3:51‒58. Figure 1, below, shows an ADSL unit.
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`Figure 1 is a block diagram of ADSL unit 100, with signal processing
`electronics 111, transmit circuitry 112, and receive circuitry 113, used to
`send and receive modulated data. Id. at 3:34–41.
`Bowie teaches that ADSL units enter a low power mode to reduce
`power requirements. Id. at 5:6‒8. CPE unit initiates low power mode by
`sending a “shut-down” signal to the COT unit. Id. at 5:8‒10. Both the CPE
`unit and COT unit may store loop characteristics that enable rapid
`resumption of user data transmission when units return to full power mode.
`Id. at 5:18‒25. Each unit then enters low power mode by shutting off the
`now unnecessary sections of the signal processing, transmitting, and
`receiving circuitry, including signal processing 111, transmitting 112, and
`receiving 113 circuitry. Id. at 5:26‒28. After shutdown, the loop is in an
`inactive state. Id. at 5:28‒29. During low power operation, circuitry 115
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`remains capable of detecting the resume signal. Id. at 5:28–29. This resume
`signal may be detected by the COT unit using a 16 kHz AC signal detector
`115 that employs conventional frequency detection techniques and remains
`operative when the COT unit is in low-power mode. Id. at 5:52–56. The
`units return to full power mode after the CPE unit transmits to the COT unit
`a resume signal. Id. at 5:48‒59. The stored loop characteristics are used to
`restore the loop parameters. Id. at 5:60‒66.
`2. Yamano (Ex. 1006)
`Yamano relates to “the reduction of the required amount of signal
`processing in a modulator/demodulator (modem) which is transferring
`packet-based data or other information which is intermittent in nature on a
`communication channel.” Ex. 1006, 1:9–13. Yamano discloses a “receiver
`circuit of the modem [that] is coupled to receive a continuous analog signal
`from a communication channel.” Id. at Abstract. “The receiver circuit
`monitors the analog signal to detect the presence of idle information. Upon
`detecting idle information, the receiver circuit enters a standby mode in
`which the processing requirements of the receiver circuit are reduced.” Id.
`Yamano discloses that the modem can be an xDSL modem that
`communicates with a central office to provide data communications to
`remote locations. Id. at 2:14–21. Figure 3, below, shows a block diagram of
`receiver circuity of a modem.
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`Figure 3 is a block diagram of receiver circuit 300 of a modem, which
`includes A/D converter 301, resampler 302, equalizer 303, carrier recovery
`circuit 304, symbol decision circuit 305, channel decoder 306, framer/idle
`detector 307, sample buffer 308, echo canceler 309, timing update circuit
`310, equalizer update circuit 311, carrier update circuit 312, idle generator
`314, idle symbol predictor 316, comparator circuit 317, packet queue 318,
`and summing node 319. Id. at 6:62–7:3. Receiver circuit 300 is coupled to
`receive an analog RECEIVE signal from communication channel 321
`(telephone line). Id. at 7:10–13.
`Yamano teaches that receive circuitry in a modem can operate in both
`a “full processing mode” and a “reduced processing mode.” Id. at 14:25-33.
`The receiver is in its full processing mode “[u]pon detecting the easily
`detected signal” where it “perform[s] full demodulation on the incoming
`RECEIVE signal,” and the receiver is in its reduced processing mode in “the
`absence of the easily detected signal.” Id. at 14:25-33. Yamano teaches that
`in reduced processing mode, the receive circuit disables a number of
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`components because “there is no packet data being received.” Id. at 14:33-
`42.
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`3. Analysis
`Petitioner contends that Bowie and Yamano teach the limitations of
`claims 1, 2, 4, 11, 12, 14, 16, and 18. Pet. 24–46. Petitioner articulates a
`rationale for combining the teachings of Bowie and Yamano, providing
`citations to the Declaration of Dr. Kiaei in support of their contentions. Id.
`at 22–24 (citing Ex. 1003, 32–34).
`Petitioner’s Contentions
`With respect to claim 1, Petitioner argues that Bowie and Yamano
`teach “a multi-carrier transceiver.” Id. at 24–26. Petitioner argues that
`Bowie teaches that this transceiver “transmit[s] or receiv[es] a message to
`enter a low power mode” (id. at 26–27) and “enter[s] the low power mode”
`(id. at 27–28) by shutting off unnecessary portions of the transceiver.
`Petitioner provides citations to Bowie that teaches the ADSL unit receives a
`shut-down signal and enters low power mode for the transceiver. Id. at 24–
`28 (citing Ex. 1005, 5:6–9, 5:8–13, 5:17–28; 6:10–11; Ex. 1003, 39–40).
`With respect to the claim 1 limitation that recites “wherein a
`transmitter portion of the transceiver does not transmit data during the low
`power mode,” Petitioner relies on Bowie, which describes shutting down of
`all unnecessary sections of the transmitting and receiving circuitry of Bowie.
`Pet. 28 (citing Ex. 1005, 5:25–28; Ex. 1003, 40).
`Petitioner then relies on Bowie and Yamano in combination to teach
`the claim limitation that “a receiver portion of the transceiver receives data
`during the low power mode.” Pet. 28–32. In particular, Petitioner argues
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`that Yamano “teaches how to reduce ‘the required amount of signal
`processing in a modulator/demodulator (modem) which is transferring
`packet-based data or other information which is intermittent in nature on a
`communication channel.’” Pet. 29 (quoting Ex. 1006, 1:9–13). Petitioner
`cites this reduction in signal processing applied to DSL technology as the
`reduced power consumption mode that is applied in Yamano. Pet. 29 (citing
`Ex. 1006, 15:54–55). Specifically, Petitioner relies on the “burst mode
`protocol,” which is part of the reduced power mode in Yamano. Pet. 29–30
`(citing Ex. 1006, 13:56–65, Ex. 1003, 43). Petitioner also cites the
`processing savings for the receiver and transmitter in Yamano. Pet. 30
`(Ex. 1006, 15:63–16:5 (discussing disabled echo canceler used in receive
`portion as a power savings in the DSL modem). Petitioner asserts that
`Yamano’s receive process teaches a low power mode because it reduces
`processing necessary in the receive circuitry. Pet. 30–31. Specifically
`Petitioner states that
`for a receive circuit in Yamano, [the] direct support of packet
`traffic means that “[u]pon detecting the easily detected signal,
`non-idle detector 401 enables the full processing mode of
`receiver circuit 400, thereby causing receiver circuit 400 to
`perform full demodulation on the incoming RECEIVE signal.”
`Ex. 1006 at 14:20-29. And, “[a]fter the packet data has been
`received, non-idle detector 401 detects the absence of the easily
`detected signal (and the packet data) on the communication
`channel, and in response, enables a reduced processing mode of
`receiver circuit 400.” Ex. 1006 at 14:29-33. Reduced processing
`is achieved in the receiving circuit by disabling a number of
`subcomponents, thereby reducing power consumption. Ex. 1006
`at 14:34-42; Ex. 1003 at p. 44-45. Thus, when the receive circuit
`is not receiving data, processing in the receive circuit is reduced
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`resulting in the DSL modem operating in a lower power mode.
`Ex. 1003 at p. 45.
`Pet. 30–31. Thus, Petitioner argues that the Yamano reduced processing in a
`DSL modem addresses the same problem of reducing power usage in Bowie.
`Pet. 31. Petitioner argues that Yamano improves upon the shut-down of the
`transmitter and receiver in Bowie, by teaching a method to reduce
`processing in the transmitter and receiver when not in active use. Id.
`Finally, Petitioner argues that Bowie and Yamano teach that “the
`transceiver is a device that is capable of transmitting or receiving internet
`and video data,” as Bowie teaches that the remote source can be an Internet
`service provider and Yamano teaches that communication is suitable for
`real-time information, such as voice or video. Pet. 32–33 (citing Ex. 1006,
`1:20–21; Ex. 1005, 6:5–8).
`With respect to claim 2 that depends from claim 1, Petitioner relies on
`the arguments and evidence presented for claim 1, arguing that Bowie and
`Yamano teach the claim 2 limitation for “maintaining synchronization with a
`second transceiver during the low power mode” because the transceiver in
`Yamano teaches “[a] periodic poll or some other timing signal would be
`used to maintain synchronization of these time intervals between receiver
`circuit 400 and the remote transmitter circuit.” Pet. 34 (quoting Ex. 1006,
`15:29–32).
`For claim 4, Petitioner relies on the arguments and evidence presented
`for claim 1. Pet. 34–35. With respect to the claim 4 limitation for “storing,
`during the low power mode, at least one parameter associated with a full
`power mode,” Petitioner asserts that Bowie discloses this limitation by
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`storing characteristics of the loop that were determined during handshaking
`between the remote modem and the central office. Id. at 35–36 (citing Ex.
`1005, 5:17–27; 5:60–66; Ex. 1003, 49–51).
`With respect to claim 11, Petitioner relies on the combination of
`Bowie and Yamano to teach the “transmitting or receiving a message to
`enter low power mode for a transmitter portion while a receiver portion
`remains in a full power mode” limitation of claim 11. Pet. 36–40. Petitioner
`argues that portions of the transceiver in Yamano are in reduced power
`mode because
`Yamano teaches that ‘[d]uring full duplex operation, this near
`end transmitter circuit may be generating a TRANSMIT signal
`at the same time that receiver circuit 200 is attempting to receive
`the analog signal from the remote (or far end) transmitter circuit
`100.” Ex. 1006 at 2:49-53. Yamano also teaches that “the
`transmitter and receiver circuits provide for direct support of
`packet traffic, as opposed to continuous bit streams, using low-
`level modem protocols.” Ex. 1006 at 13:49-51. This means that
`the transmit circuit only sends data when meaningful packets are
`to be sent and otherwise sends nothing. Ex. 1006 at 13:63-65
`(“The transmitter circuit only sends information when there is
`meaningful packet data available to be sent.”).
`Pet. 37–38. Thus, as discussed with respect to claim 1, Petitioner relies on
`the combination of burst mode and receiver operation in Yamano as reduced
`processing power mode with the low power operation mode in Bowie to
`teach the limitations of claim 11. Petitioner relies on similar arguments to
`teach the “entering the low power mode for the transmitter portion while the
`receiver portion remains in the full power mode” limitation of claim 11.
`Pet. 40–43. Petitioner provides argument and evidence to assert that:
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`Yamano’s teaching of a full-duplex DSL system (i.e., a system
`that can
`transmit and receive data
`independently and
`simultaneously) when applied to Bowie’s DSL transceivers
`results in a transceiver with a receive circuit that can receive
`while the transmit circuit is not transmitting and vice-versa. Ex.
`1003 at p. 59. In these situations, the portion not being used
`would shut down, thus resulting in a low-power mode. Ex. 1003
`at p. 59.
`Pet. 43. Finally Petitioner provides evidence and argument that Yamano and
`Bowie teach “the transceiver is a device that is capable of transmitting or
`receiving internet and video data” for the same reasons presented in claim 1.
`Pet. 43–44.
`Petitioner’s arguments for claims 12, 14, 16, and 18 rely on the
`arguments presented for claims 1 and 11. Pet. 44–46 (citing Ex. 1003, 59–
`62).
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`Patent Owner’s Contentions
`Patent Owner contends that the combination of Bowie and Yamano
`fail to teach “a receiver portion of the transceiver [that] receives data during
`the low power mode,” as recited in claims 1, 2, and 4. Prelim. Resp. 14–17.
`Patent Owner contends that Petitioner has failed to show that Yamano’s
`burst mode disables transmit circuitry or results in a low power processing
`mode. Id. at 15.
`We disagree with Patent Owner. Petitioner’s argument is based on the
`reduced processing disclosed in Yamano for both transmitter and receiver
`portions of the transceiver as being akin to a low power mode. See Pet. 28–
`32. That Yamano does not expressly discuss disabling the transmitter does
`not address Petitioner’s evidence and testimony that Yamano’s burst mode
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`and receiver process reduces processing, and, thus, saves power. At this
`stage, prior to cross-examination and a full record, Petitioner has provided
`sufficient evidence and argument to establish a reasonable likelihood that
`Yamano and Bowie teach the “receiver portion … during the low power
`mode” limitations of claims 1, 2, and 4.
`For similar reasons we are not persuaded by Patent Owner’s argument
`that Petitioner has failed to show that Yamano and Bowie render the
`“receiver portion … during the low power mode” limitation obvious.
`Prelim. Resp. 20–25. We do not agree with Patent Owner, on the present
`record, that Petitioner’s arguments misrepresent Yamano as teaching only
`disabling the transmitter. Pet. 31–32; Prelim. Resp. 18–19. Petitioner’s
`argument and evidence support that the burst mode for the transmitter and
`reduced operation of the receiver portions in Yamano result in reduced
`processing. See Pet. 28–32. Specifically, Petitioner argues that Yamano
`improves upon Bowie by reducing operation of the transmitter and receiver
`circuitry. Pet. 31 (citing Ex. 1003, 45). That the improvements identified in
`Yamano are not expressly described as “disabling” as described in Bowie or
`with respect to the receiver in Yamano does not undermine Petitioner’s
`evidence that the burst mode transmission in Yamano is a reduced
`processing mode of transmission that is asserted as being the low power
`mode of the challenged claims. See Pet. 31–32 (citing Ex. 1003, 45–46, and
`likening the operation in Yamano to the claimed low power mode).
`On the present record, we also disagree with Patent Owner that
`Petitioner has failed to provide an articulated and non-conclusory reasoning
`with rational underpinning to combine Bowie and Yamano. Prelim.
`
`
`
`
`17
`
`
`
`IPR2016-01760
`Patent 9,094,268 B2
`
`Resp. 19–23 (parsing Petitioner’s stated rationale). As discussed above, we
`do not agree that Petitioner’s argument mischaracterizes Bowie and
`Yamano, as these reference do teach reducing the processing of transmitter
`circuitry operation as opposed to full power normal operations. Id. at 22. In
`addition, Petitioner has presented sufficient evidence and argument that
`Yamano and Bowie are both directed to reduced processing of transmit and
`receive circuitry and, thus, address the same problem of transceiver
`operation in a DSL modem. Pet. 31. On the present record, we do not find
`Petitioner’s statements, nor the Declaration of Dr. Kiaei, to be conclusory as
`they provide citations to the underlying evidence from the references in
`support of their contentions. See Pet. 31–32; Ex. 1003, 40–44.
`Accordingly, on the present record, we disagree with Patent Owner
`that Petitioner employs conclusory and hindsight reasoning to combine
`Bowie and Yamano. Prelim. Resp. 41–54. On the present record, Petitioner
`has provided sufficient reasoning supported by citation to Bowie and
`Yamano that a person of ordinary sill in the art would have combined the
`DSL transceiver methods of Bowie and Yamano to address power saving
`features in transceiver circuitry. Pet. 22–24 (citing Ex. 1003, 23–34). On
`the incomplete record before us, we credit Petitioner’s testimony and
`evidence that a person of ordinary skill in the art would have modified
`Bowie to include the claimed features of Yamano. Id.
`With respect to claims 11, 12, 14, 16, and 18, Patent Owner contends
`that Bowie and Yamano fail to teach “transmitting or receiving a message to
`enter a low power mode for a transmitter portion while a receiver portion
`remains in a full power mode” (the “Message Limitation”). Prelim.
`
`
`
`
`18
`
`
`
`IPR2016-01760
`Patent 9,094,268 B2
`
`Resp. 26–36. Patent Owner’s arguments address the references separately,
`arguing that Bowie does not teach or suggest the entire claim limitation,
`while Yamano fails to teach disabling (shutting down) a transmitter. Id. at
`26–27. We disagree with Patent Owner, at this stage of the proceeding, as
`Petitioner has provided sufficient evidence that the burst mode and receiver
`mode of Yamano in combination with the messaging in Bowie are a low
`power or processing mode for the transceiver that teach the claim limitation
`for claims 11, 12, 14, 16, and 18.
`With respect to claims 4 and 14, we also disagree with Patent Owner
`that Bowie and Yamano do not teach “storing, during the low power mode,
`at least one parameter associated with a full power mode.” Prelim. Resp.
`40–41. Petitioner has provided sufficient evidence and argument that
`Bowie’s teaching that the CPE unit stores the loop characteristics that it
`obtained through CPE to COT handshaking” to “enable[] rapid resumption
`of user data transmission when the units are returned to full power mode.”
`Pet. 36; see Ex. 1005, 5:17‒27. Petitioner argues that this data is retrieved
`from memory to reduce the time needed to determine loop transmission
`characteristics. Pet. 36 (citing Ex. 1005, 5:60–66; Ex. 1003, 50–51). At this
`stage, Petitioner has provided sufficient evidence and argument that these
`characteristics are associated with full power mode.
`Finally, we are not persuaded that the combination of Bowie and
`Yamano would improperly change the principle of operation of Bowie,
`rendering it inoperable for its intended purpose. Prelim. Resp. 57–61. As
`we discussed above, Petitioner has, on the present record articulated
`reasoning with a rationale underpinning regarding the combination of Bowie
`
`
`
`
`19
`
`
`
`IPR2016-01760
`Patent 9,094,268 B2
`
`and Yamano. “The test for obviousness is not whether the features of a
`secondary reference may be bodily incorporated into the structure of the
`primary reference.” In re Keller, 642 F.3d 413, 425 (CCPA 1981); KSR Int’l
`Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007) (noting that in making a
`determination of obviousness, we must consider the “inferences and creative
`steps that a person of ordinary skill in the art would employ”). In the present
`case based on the record before us, we are not persuaded that the
`combination and modification proposed by Petitioner (Pet. 32–32, 39–40,
`43) is at odds with Bowie or renders it unfit for the purpose of reduced
`power DSL transmission and reception.
`Based on the foregoing, we determine that Petitioner has met its
`burden of showing a reasonable likelihood that claims 1, 2, 4, 11, 12, 14, 16
`and 18 of the ’268 patent are obvious over Bowie and Yamano.
`
`III. CONCLUSION
`For the foregoing reasons, we are persuaded that Petitioner has met its
`burden of showing a reasonable likelihood that claims 1, 2, 4, 11, 12, 14, 16
`and 18 of the ’268 patent are unpatentable as obvious over Bowie and
`Yamano.
`We have not made a final determination with respect to the
`patentability of the challenged claims, nor with respect to claim
`construction.
`
`
`
`
`20
`
`
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`IPR2016-01760
`Patent 9,094,268 B2
`
`
`IV. ORDER
`For the foregoing reasons, it is:
`ORDERED that pursuant to 35 U.S.C. § 314, an inter partes review is
`hereby instituted on the ground that claims 1, 2, 4, 11, 12, 14, 16 and 18 of
`the ’268 patent are unpatentable as obvious over Bowie and Yamano under
`35 U.S.C. § 103(a); and
`FURTHER ORDERED that pursuant to 35 U.S.C. § 314(c) and
`37 C.F.R. § 42.4, notice is hereby given of the institution of a trial; the trial
`will commence on the entry date of this Decision.
`
`
`
`
`
`21
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`IPR2016-01760
`Patent 9,094,268 B2
`
`For PETITIONER:
`David McCombs
`Theodore Foster
`Michael Parsons
`HAYNES AND BOONE, LLP
`david.mccombs.ipr@haynesboone.com
`ipr.theo.foster@haynesboone.com
`michael.parsons@haynesboone.com
`
`
`For PATENT OWNER:
`
`Peter J. McAndrews
`Thomas J. Wimbiscus
`Scott P. McBride
`Christopher M. Scharff
`MCANDREWS, HELD & MALLOY, LTD.
`pmcandrews@mcandrews-ip.com
`twimbiscus@mcandrews-ip.com
`smcbride@mcandrews-ip.com
`cscharff@mcandrews-ip.com
`
`
`
`
`
`22
`
`
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