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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________________
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`APPLE, INC.,
`Petitioner
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`v.
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`REALTIME DATA LLC,
`Patent Owner
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`____________________
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`
` Case IPR2016-01738
`Patent 8,880,862
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`____________________
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`EXPERT DECLARATION OF DR. GODMAR BACK IN SUPPORT OF
`PATENT OWNER’S REPLY TO ITS MOTION TO AMEND
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`TABLE OF CONTENTS
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`I. INTRODUCTION ................................................................................................ 1
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`II. PROFESSIONAL BACKGROUND .................................................................. 4
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`III. PERSON OF ORDINARY SKILL IN THE ART ............................................ 4
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`IV. THE ’862 PATENT’S TEACHINGS AS TO “PRELOADING” .................... 5
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`V. SETTSU DOES NOT TEACH “PRELOADING” BECAUSE IT ONLY
`BEGINS LOADING BOOT DATA AFTER RECEIVING A REQUEST OVER A
`COMPUTER BUS ..................................................................................................... 8
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`VI. A POSA WOULD NOT COMBINE SETTSU WITH ZWIEGINCEW AS
`DR. NEUHAUSER HAS PROPOSED ...................................................................10
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`VII. SUKEGAWA, ESFAHANI, APPLE’S INVALIDITY CONTENTIONS,
`AND THE PRIOR ART CITED ON THE FACE OF THE PATENT ...................15
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`I, Godmar Back, declare as follows:
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`I.
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`INTRODUCTION
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`1.
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`On June 14, 2017, I submitted a declaration in support of the motion to
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`amend, and the proposed substitute claims, submitted by Realtime Data LLC in this
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`proceeding, in which I explained and concluded that the proposed substitute claims
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`are supported by the original non-provisional application and are patentable over the
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`prior art at issue in this proceeding, as well as the material art discussed during
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`prosecution.
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`2.
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`I understand that Apple, Inc. and its expert, Dr. Charles J. Neuhauser,
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`subsequently submitted a response and accompanying declaration, respectively. I
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`also understand that Dr. Neuhauser was cross-examined with respect to the opinions
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`set forth in that declaration. I have been asked to consider Apple’s arguments, Dr.
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`Neuhauser’s declaration (Ex. 1030), and Dr. Neuhauser’s cross-examination
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`testimony (Ex. 2024) to determine whether those materials affect the analysis and
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`conclusions stated in my declaration of June 14, 2017. I have additionally been asked
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`to review the Reply in support of Patent Owner’s Motion to Amend submitted
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`concurrently with this declaration. For the reasons explained in this declaration, my
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`opinions remain unchanged, and the arguments and evidence submitted by Apple,
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`as elucidated by Dr. Neuhauser’s cross-examination testimony, further support my
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`conclusion that the proposed substitute claims are patentable.
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`3.
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`In forming my opinions, I have reviewed and considered the materials
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`identified in the paragraph above, those identified in my prior declaration of June
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`14, 2017, and relevant portions of Apple’s invalidity contentions from the district
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`court litigation (Ex. 1039).
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`4. My opinions are based on my experience and knowledge of the relevant
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`art, the documents identified above, as well as the documents discussed in this
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`declaration.
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`5.
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`In this declaration, I address Apple’s prior art references and
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`unpatentability theories. My decision to discuss below only certain shortcomings of
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`those references or theories should not be understood as a concession that those
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`references or theories teach other limitations of the proposed amended claims that
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`are not specifically discussed. Additionally, I cite to deposition testimony from Dr.
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`Neuhauser taken in both this proceeding and in co-pending IPR2016-01737. See Ex.
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`2024. The proposed substitute claims at issue in this proceeding are similar, but not
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`identical, to the proposed substitute claims in IPR2016-01767. I understand that, in
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`some of the cited and quoted testimony, Dr. Neuhauser is specifically discussing the
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`opinions he provided in co-pending IPR2016-01737. But I nonetheless understand
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`that Dr. Neuhauser testified that he intended his opinions to be consistent across the
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`proposed substitute claims in the two proceedings:
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`Q. Essentially, with respect to the same elements and limitations as
`between Claim 174 and Claim 118, you have the same opinions across
`your two declarations, right?
`[A.] I think it’s fair to say that the structure of the opinions is the same.
`There’s some little details differ because the claims are actually a little
`bit different. They are basically the same kind of claim, but there’s little
`differences between them.
`Q. Your opinion as to what constitutes preloading is the same as
`between Claim 118 and 174, right?
`[A.] With respect to Settsu, Settsu and Zwiegincew?
`Q. Yes.
`A. I think that’s correct.
`Q. And your opinion as to what constitutes transferring the portion of
`the operating system is the same as between Claims 118 and 174?
`A. Yes, I think that’s correct.
`Q. And your opinion as to what is the portion of the operating system
`is the same as between Claims 118 and 174?
`A. Yes, that’s correct.
`Q. And your opinion as to what is a first memory and a second memory
`is the same with respect to both Claims 118 and 174?
`[A.] Yes, that’s correct.
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`Ex. 2024 at 120:9-121:17.
`Q. Let me clarify. Your opinion as to common terms used as between
`the 174 claim and the 118 claim, and what those terms mean or what is
`taught about them in the context of the '862 patent is the same, right?
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`[A.] Well, it’s a pretty big question. But my intention was that the same
`term used in any of these six claims should be consistent. Okay. And
`that the things I’m pointing to should be consistent. But you will
`recognize that between the claims, there’s things that change. The
`example that comes to mind is memory and volatile memory. So the
`opinion can’t be the same there, because one has a broader meaning
`than the other.
`Q. But to be clear, the fact that some claims have the volatile memory
`limitation and some don’t does not affect your opinion as to what the
`’862 patent teaches regarding “preloading” as a term, right?
`A. I can’t think of a difference right now –
`Q. And --
`A. -- with respect to preloading.
`Q. And the same is true with respect to “boot data list,” right?
`A. Yeah. Yes, I can’t think of any difference that that would affect.
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`Id. at 126:9-127:12 (emphasis added).
`PROFESSIONAL BACKGROUND
`II.
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`6. My professional background and Curriculum Vitae were provided as
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`part of my declaration of June 14, 2017, and I do not repeat my qualifications here.
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`III. PERSON OF ORDINARY SKILL IN THE ART
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`7. My understanding and views as to the “person of ordinary skill in the
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`art” were set forth in my prior declaration of June 14, 2017, and have not changed.
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`IV. THE ’862 PATENT’S TEACHINGS AS TO “PRELOADING”
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`8.
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`Section V of the ’862 specification, titled “Instant Boot Device for
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`Operating System, Application Program and Loading,” is instructive as to the
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`meaning of “preloading” within the context of the patent. That section contrasts the
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`“preloading” approach taught in the specification from prior art approaches. Ex.
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`1001 at 20:36-22:11. The specification explains that “with conventional boot device
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`controllers, after reset, the boot device controller will wait for a command over the
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`computer bus (such as PCI).” Id. at 20:38-40. It then explains that since the boot
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`device controller is typically ready to operate before the computer bus, “this wait
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`period is unproductive time.” Id. at 20:40-43. And it further explains that once a boot
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`device controller receives a command for boot data over the computer bus, “a long
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`delay is seen by the computer user.” Id. at 20:45-48.
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`9.
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`The specification then proposes a solution: “a technique of data
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`preloading to decrease the computer system boot time.” Id. at 20:50-53 (emphasis
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`added). Specifically, the specification teaches that “prior to host system reset [e.g.,
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`PCI bus reset], the data storage controller can proceed to pre-load the portions of the
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`computer operating system from the boot device (e.g., hard disk) into the on-board
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`cache memory.” Id. at 20:58-61 (emphasis added). “Preloading” thus occurs before
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`the computer bus has been reset, i.e., before commands can be sent or received across
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`the computer bus. The specification further clarifies that fact, stating “it is
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`advantageous for the boot device controller to preload [ ] portions [of the operating
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`system] and not wait until it is commanded to load the operating system.” Ex. 1001
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`at 20:63-66 (emphasis added). “Once the data is preloaded, when the computer bus
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`issues its first commands to the data storage controller seeking operating system
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`data, the data will already be available in the cache memory of the data storage
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`controller.” Id. at 21:3-6 (emphasis added).
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`10.
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`In situations where a request is made “for boot data that is not preloaded
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`in the local memory of the data storage controller . . ., the controller will retrieve
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`the requested data from the boot device. . . .” Id. at 21:60-65 (emphasis added).
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`Consequently, boot data that begins loading only after a request for that data has
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`already been made should not be considered “preloaded” for the purposes of the ’862
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`patent.
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`11.
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`I understand that the cross-examination testimony of Apple’s expert,
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`Dr. Neuhauser, is consistent with the above discussion of the specification’s
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`teachings. Specifically, I note that Dr. Neuhauser has testified that “preloading” of
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`boot data, as taught in the ’862 patent, must begin before a request for the boot data
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`has been received over a computer bus:
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`Q. The idea of preloading as taught in the ’862 patent is to place the
`boot data that will be needed for booting the operating system into
`cache before a request has been made for that data over the computer
`bus, right?
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`[A.]: I certainly think that’s an objective of the ’862.
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`Ex. 2024 at 61:21-62:3. I also note that Dr. Neuhauser further acknowledged that an
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`approach whereby the boot device controller begins loading boot data after receiving
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`a command for that data over a computer bus is not “preloading”:
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`Q. Take a look at . . . Column 20, starting with Line 38.
`A. 20, Line 38?
`Q. Yes. You see it says, “Typically, with conventional boot device
`controllers, after reset, the boot device controller will wait for a
`command over the computer bus.”
`Do you see that?
`A. Uh-huh.
`Q. Do you understand that to be talking about an approach that is
`different than the preloading taught by the ’862 patent?
`A. I think that’s -- yeah. I have an understanding of that.
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`Id. at 61:6-20 (emphasis added).
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`12.
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`I agree with Dr. Neuhauser on both points. Indeed, the ’862 patent’s
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`specification contains no alternative teaching as to the meaning of “preloading.”
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`Rather, in every instance in which the specification gives context to “preloading,” it
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`would be clear to one of ordinary skill in the art that “preloading” must begin before
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`a request for the data has been received over a computer bus. Thus, an interpretation
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`of “preloading” that includes beginning to load operating system boot data only after
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`receiving a request for that data over a computer bus would find no support in the
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`teachings of the ’862 specification.
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`SETTSU DOES NOT TEACH “PRELOADING” BECAUSE IT ONLY
`V.
`BEGINS LOADING BOOT DATA AFTER RECEIVING A REQUEST
`OVER A COMPUTER BUS
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`13.
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`I understand that Dr. Neuhauser has alleged that the process by which
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`Settsu’s mini OS module 7 transfers the main body OS module 8 from boot device
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`3 into memory 2 constitutes “preloading”:
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`Q. You say that the process by which Settsu mini OS module 7 takes
`the main body, OS module 8, from boot device 3 into memory 2
`constitutes preloading for purposes of Claim 118; is that right?
`A. Yes, that’s correct.
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`Ex. 2024 at 110:22-111:2. Dr. Neuhauser also alleged that the mini OS module 7 in
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`Settsu is the “boot device controller” that “receives a command over a computer bus
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`to load the portion of the boot data,” for purposes of the proposed substitute claims:
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`[Q.] So your theory is that the Mini OS module 7 in Settsu CPU is the
`boot device controller, and when it has handed over control of the boot
`process by the Code module 6 within the CPU, the mini OS Module 7
`has then received a command over computer bus to load a portion of
`the operating system for purposes of Claim 118, Limitation 3; is that
`right?
`[A.] Yes, that's correct.
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` Id. at 110:9-20. Acording to Dr. Neuhauser’s theory, Settsu performs limitation
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`174.3—“wherein the preloading occurs during the same boot sequence in which a
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`boot device controller receives a command over a computer bus to load the portion
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`of the operating system”—by using mini OS module 7 to load OS main body module
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`8 in response to a jump or a call from firmware code module 6 within Settsu’s CPU.
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`Ex. 1030 ¶ 43; Ex. 2024 at 109:16-111:2, 120:21-121:4.
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`14.
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`I disagree. As noted earlier, “preloading” of operating system boot data
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`within the meaning of the ’862 patent must begin before a command has been
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`received over a computer bus. But in Dr. Neuhauser’s theory, the alleged
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`“preloading” in Settsu—transferring the OS main body module 8 from boot device
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`3 into memory 2—only begins after the mini OS module 7 (which Dr. Neuhauser
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`calls a “boot device controller”) has received a jump or a call from the firmware
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`code module 6 (which Dr. Neuhauser calls “receiving a command over a computer
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`bus to load the portion of boot data”). Dr. Neuhauser acknowledged that at his
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`deposition:
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`[Q.] So in your theory, first, Settsu’s boot device controller, which is
`the mini OS module 7, receives a command over a computer bus from
`code module 6 to load the boot data, and then it begins preloading the
`boot data by taking OS Main Body module 8 from boot device 3 into
`Memory 2?
`[A.] Yes, that's correct.
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`Ex. 2024 at 112:2-10. And I note that Dr. Neuhauser also acknowledged Settsu’s
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`mini OS module 7 “does not transfer any data” into memory before it has received
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`a command over a computer bus to load that data:
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`Q. Before mini OS module 7 has taken over control of the boot process
`from code module 6, mini OS module 7 does not transfer any data from
`boot device 3 to memory 2; is that right?
`[A.] Yes, I think that’s correct.
`[Q.] And so mini OS module 7 doesn’t start transferring OS main body
`module 8 into memory 2 until after mini OS module 7 has taken over
`control from code module 6, right?
`[A.] Yes, that’s correct.
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` Id. at 111:3-15. I agree with Dr. Neuhauser on those points.
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`15. Because Settsu’s approach to loading boot data only begins after the
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`alleged “boot device controller” receives an alleged “command over computer bus
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`to load the portion of boot data,” Settsu does not teach “preloading” within the scope
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`of the ’862 patent. I made the same general observation in my declaration of June
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`14, 2017. Ex. 2022 at ¶ 59 (explaining that Settsu “does not teach or suggest
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`‘preloading’”).
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`16. Accordingly, the proposed substitute claims are patentable over Settsu.
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`VI. A POSA WOULD NOT COMBINE SETTSU WITH ZWIEGINCEW
`AS DR. NEUHAUSER HAS PROPOSED
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`17.
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`I understand that Dr. Neuhauser’s declaration also alleges that
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`Zwiegincew teaches “preloading.” Ex. 1030 ¶ 38, 81. Specifically, the declaration
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`alleges that by teaching the “prefetching” of “scenario files” to avoid the problem of
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`“hard page faults,” Zwiegincew teaches “preloading” of “boot data.” Id. I understand
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`that Dr. Neuhauser’s declaration further proposes that a POSA would be motivated
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`to incorporate those teachings from Zwiegincew as part of Settsu’s boot process of
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`loading the OS main body module 8 from boot device 3 into memory 2. Ex. 2024 at
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`91:10-16, 106:5-11 (agreeing that “[his] combination of Zwiegincew with Settsu
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`proposes to use Zwiegincew’s teachings as a part of the process of essentially
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`moving the OS main body module 8 of Settsu from boot device 3 into memory 2”),
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`117:12-17; Ex. 1030 ¶ 22.
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`18.
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`I disagree. Both the problem addressed by Zwiegincew—“hard page
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`faults”—and the solution it proposes—“prefetching” of “scenario files”—rely on the
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`virtual memory manager in an operating system being enabled. Hard page faults
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`occur in systems that exploit a virtual memory manager when the CPU attempts to
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`access data at a virtual address that has not yet been mapped to a physical memory
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`page. At this point, the virtual memory manager will be invoked, recognize which
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`data is being accessed, load the data from a secondary storage device such as a hard
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`disk into physical memory, and resume the faulting process. I understand that Dr.
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`Neuhauser appears to agree with me that the problem of “hard page faults,” which
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`“prefetching” is intended to address, cannot occur before the virtual memory
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`manager in an operating system has been enabled:
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`Q. As you said, there is a point in time when the virtual memory
`manager in an operating system may be enabled and a point in time
`when it's not enabled, right?
`A. Yes.
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`. . . .
`Q. And before the virtual memory manager in an operating system is
`enabled, hard page faults can’t happen, right?
`A. I think we have agreed to that, yes.
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`Ex. 2024 at 101:3-13 (emphasis added).
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`19. Therefore, as Dr. Neuhauser appears to have recognized at his
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`deposition, it is my opinion that a POSA would not want to use Zwiegincew’s
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`prefetching approach before the virtual memory manager in an operating system has
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`been enabled. Id. at 103:23-104:16 (explaining that it “seems to me that the best
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`approach would be to enable virtual memory set up -- well, set up virtual memory,
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`enable virtual memory, and then allow Zwiegincew to operate”). Rather, a POSA
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`would recognize that Zwiegincew’s prefetching solution cannot be used until after
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`the virtual memory manager has been enabled—a point on which Dr. Neuhauser and
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`I again appear to agree. Id. at 102:14-103:22.
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`20. Simply put, a POSA would be unable to use Zwiegincew’s prefetching
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`approach before the virtual memory manager has been enabled because the virtual
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`memory manager is responsible for maintaining each process’s virtual memory
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`layout. A process’s virtual memory layout includes the association between its
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`virtual addresses and the on-disk data a process expects to be able to access at these
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`addresses (which may include program code or data). If the module that maintains
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`this association is not enabled, prefetching simply cannot take place. Accordingly, a
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`POSA would not be motivated to use Zwiegincew’s prefetching technique before
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`the virtual memory manager in Settsu has been enabled. Indeed, in my opinion, a
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`POSA would not even have considered it obvious to try combining Zwiegincew with
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`Settsu as proposed by Dr. Neuhauser, as the combination could not be achieved
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`using techniques known to a person of ordinary skill.
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`21. Settsu’s virtual memory manager is a module called the “virtual
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`memory processing module 22” within the OS main body module 8, as Settsu’s
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`Figures 3 and 5 clearly show:
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`22. The modules within Settsu’s OS main body 8 are not enabled before
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`the OS main body module 8 has moved from boot device 3 into memory 2—a fact
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`that Dr. Neuhauser appears to have acknowledged as well:
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`Q. Before the OS main body module has moved from boot device 3 into
`memory 2, are the modules within the OS main body module enabled?
`A. What do you mean by “enabled” here?
`Q. Are they booted, loading and running?
`[A.] I don’t believe so.
`[Q.] The way that Settsu teaches booting the OS main body module is
`to move it from boot device 3 into memory 2, right?
`A. Yes, that’s correct.
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`Ex. 2024 at 105:17-106:4. Settsu’s virtual memory processing module is therefore
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`not enabled until after OS main body module 8 has already been loaded into memory
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`2, i.e., after the point at which Dr. Neuhauser proposes that a POSA would use
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`Zwiegincew’s “prefetching” approach. It thus necessarily follows that a POSA
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`would not and could not use Zwiegincew’s prefetching technique (which requires
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`virtual memory manager to be enabled) to “preload” Settsu’s OS main body module
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`8 into memory 2, as Dr. Neuhauser has proposed. Id. at 106:5-11 (agreeing that “[his]
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`combination of Zwiegincew with Settsu proposes to use Zwiegincew’s teachings as
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`a part of the process of essentially moving the OS main body module 8 of Settsu
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`from boot device 3 into memory 2”).
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`23.
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`I also note that using Zwiegincew’s prefetching technique as part of
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`Settsu’s process of loading OS main body module 8 into memory 2 would, in any
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`case, not constitute “preloading” because it would only begin after Settsu’s mini OS
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`module 7 (which Dr. Neuhauser calls the “boot device controller”) had received a
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`command over a computer bus to load the OS main body module 8 (the alleged “boot
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`data”) into memory.
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`24. Accordingly, Zwiegincew does not teach “preloading” of operating
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`system boot data, and would not and could not be used by a POSA in combination
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`with Settsu to “preload” Settsu’s OS main body module 8 into memory 2.
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`VII. SUKEGAWA, ESFAHANI, APPLE’S INVALIDITY CONTENTIONS,
`AND THE PRIOR ART CITED ON THE FACE OF THE PATENT
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`25. Despite the fact that the proposed substitute claims in this proceeding
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`do not include limitations directed toward “volatile memory,” I understand that
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`Apple has argued that a POSA would have found it obvious to use volatile memory
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`as part of Sukegawa’s boot process, and that the proposed substitute claims are
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`unpatentable based on Grounds 1-5 of the Petition. Resp. at 6-8. I do not agree. As
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`an initial matter, I note that Dr. Neuhauser has not provided testimony to support
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`Apple’s obviousness allegations as to Sukegawa. Ex. 2024 at 14:14-25, 18:20-19:19.
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`Moreover, it is my opinion that a POSA would not be motivated to modify Sukegawa
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`in the way Apple proposes.
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`26. Specifically, Apple asserts that “a POSITA would have looked to
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`Sukegawa’s description of main memory used for caching AP and OS data, and
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`would have found it obvious to transfer boot data expected to be needed most quickly
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`after power-on into the nonvolatile flash memory, and to preload the remaining boot
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`data into main memory upon power-on.” Resp. at 8 (citing Ex. 1005 at 1:5-49, 4:38-
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`46, 5:10-6:58, 7:66-8:33, FIGS. 1-2). I disagree. Although Sukegawa mentions using
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`main memory to cache AP and OS data, Sukegawa nowhere discusses the possibility
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`of preloading boot data into main memory. Rather, in the passages to which Apple
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`refers, it recognizes that “the cache system using the above-described main memory
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`does not effectively function when the first access request for the HDD occurs at the
`
`time of turning-on of power.” Ex. 1005 at 1:38-41. And therefore, it concludes that
`
`“[c]onsequently, when the computer system is started up, the cache system cannot
`
`be utilized to run the operating system (OS) or frequently used application programs
`
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`(AP).” Id. at 1:41-43. The reason for this inability lies in the main memory’s
`
`
`
`volatility. Given these teachings, I do not believe a POSA would be motivated to
`
`modify Sukegawa to use volatile memory for preloading boot data, and I note that
`
`Dr. Neuhauser has not opined that a POSA would be motivated to do so.
`
`27. Separately, I also note that Sukegawa teaches loading boot data into
`
`memory in one cycle and using that data for booting the operating system in the next
`
`power on cycle. Dr. Neuhauser agrees with me on this point.
`
`Q. So Sukegawa’s teaching is that the boot data that is loaded into non-
`volatile memory in one cycle is used for booting the operating system
`in the next power on cycle; is that right?
`A. Yes. I think that’s generally correct.
`
`Ex. 2024 at 22:7-11. By contrast, all of the proposed substitute claims require
`
`“preloading [ ] during the same boot sequence in which a boot device controller
`
`receives a command over a computer bus to load” the boot data. (emphasis added).
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`Since Sukegawa loads its “boot data” during one cycle for use during a next cycle,
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`Sukegawa cannot meet the proposed amended claims. I previously made the same
`
`point in my June 14, 2017 declaration. Ex. 2022 ¶ 57.
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`28.
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`I also understand that Apple has made unspecified unpatentability
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`allegations based on Esfahani. See Resp. at 5. I note that neither Apple nor Dr.
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`Neuhauser has put forth an element-by-element analysis purporting to show the
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`unpatentability of any proposed claim based on Esfahani, whether alone or in
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`
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`combination with any other art. In any case, Esfahani does not teach “preloading”
`
`
`
`within the meaning of the ’862 patent. Rather, Esfahani teaches that its Open
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`Firmware first initializes, and then locates its “Boot Info file (40),” which Open
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`Firmware then loads into RAM (12). Ex. 2020 at Fig. 6A, 8:40-9:6. It further teaches
`
`that “[b]y default, the Boot Info file 40 is located by . . . searching for a file with a
`
`predetermined file type.” Id. at 8:5-10. A POSA would thus understand that Esfahani
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`teaches that its boot data is first requested and located in response to a command
`
`over a computer bus, and only begins to load after such a request has been received,
`
`and is thus not “preloaded.”
`
`29.
`
` I am also aware that Apple has submitted the entirety of its voluminous
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`invalidity contentions from its district court litigation with Realtime Data and urged
`
`that “Apple’s detailed mappings applied these references to claim features that are
`
`similar to those presented by Realtime in the amendments at issue in this
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`proceeding.” Resp. at 3-4 (citing and quoting Ex. 1039 at 27 as “listing references
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`said to disclose ‘preloading boot data, including loading into a cache and loading
`
`prior to completion of initialization of the processor.’”). Based on my review of the
`
`relevant portions of the invalidity contentions, including the listing cited by Apple
`
`and corresponding portions of the invalidity charts, the invalidity contentions appear
`
`to simply provide various quotations from the cited prior art without explaining how
`
`or why those quotations teach the relevant limitations. For example, although the
`
`
`
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`invalidity contentions
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`identify
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`twelve references as purportedly
`
`teaching
`
`
`
`“preloading,” Ex. 1039 at 27-28 (identifying Bennett, two references collectively
`
`titled Esfahani, Feigenbaum, Greene, Hillis, Lillich, two references collectively
`
`titled Linux Kernel, Kikinis, Settsu, and Sukegawa), I did not see any explanation in
`
`Apple’s invalidity charts as to how any of those references teaches beginning to load
`
`boot data before a command for that data has been received over a computer bus. I
`
`am also not aware of any such teaching in those references. Based on my review of
`
`Apple’s invalidity contentions and accompanying charts, none of the references
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`appears to teach the “preloading” limitation of the proposed substitute claims.
`
`30.
`
` In addition, I am not aware of any specific analysis provided by Apple
`
`indicating that the proposed claims are unpatentable over any of the twenty-eight
`
`pages of prior art references cited on the face of the patent, whether alone or in
`
`combination. Based on my review of the prosecution history, the proposed claims
`
`are patentable over each of the material prior art references at issue during the
`
`prosecution, as I explained in my prior declaration. Ex. 2022 ¶¶ 60-65.
`
`31.
`
` For the reasons discussed above and in my prior declaration, none of
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`the prior art discussed herein or otherwise at issue in this proceeding teaches or
`
`suggests the subject matter of the proposed claims, whether alone or in combination,
`
`particularly when viewed from the standpoint of a POSA as of the priority date of
`
`the ’862 patent.
`
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`Dated: October 11, 2017
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`By:
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`
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`Dr. Godmar Back
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`Realtime 2025
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