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`a. [:1 Computer Readable Form (CRF)
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`9. E] Assignment Papers (cover sheet & document(s))
`- Detailed Description
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`Power of
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`11. B English Translation Dowment (if applicable)
`Drawing(s) (35 U.S.C. 113)
`4,
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`Statement (lDS)/PTO-1449
`5. Oath or Declaration
`12.
`13. D Preliminary Amendment
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`a. [j Newly executed (original or copy)
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`15- E] (i foreign pggrity is claiihed)
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`i. E] DELETION OF INVENTOR(S)
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`1.63(d)(2) and 1.33(b).
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`6. El
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`17. If a CONTINUING APPLICATION. check appropriate box, and supply the requisite information below andin a preliminary amendment,
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`PTO/$3117 (09-00)
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`0 MB - ntrl n mber.
`U.S. Patent and Trademark Office:
`DEPARTMENT OF COMMERCE
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`
`
`
`Filing Date
`First Named Inventor
`
`February 2, 2001
`James J - F61 10D
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`Parent lees a
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`re subject to annual revision.
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`“I 355-00
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`TOTAL AMOUNT OF PAYMENT
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`
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`
`
`— F
`
`EE CALCULATION (continued
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`Fee Description
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`Surcharge - late filing fee or oath ‘
`
`3. ADDITIONAL FEES
`Large Entity Small Entity
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`139
`130
`139
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`Non-English specification
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`147 2.520 147 2,520 For filing a request for ex parte reexaminatio
`112
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`112 920' Requesting publication of SIR prior to
`Examiner action
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`F. Chau & Associates,LLP
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`113 1.640'
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`390
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`118 1.390 218 695
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`128 1.890 228 945
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`219 155
`Filing a brief in support ofan appeal
`120
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`220 155
`Request for oral hearing
`121
`270
`221
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`136 1.510 138 1.510 Petition to institute a public use proceeding
`140
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`Petition to revive - unavoidable
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`FEE CALCULATION
`1. BASIC FILING FEE
`Large Entity Small Entity
`Fee Fee Fee
`Fee
`Code (S)
`Code (5)
`101
`710
`201 355
`106 320
`'206 160
`107 490
`207 245
`108 710
`206 355
`114 150
`214
`75
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`
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`Fee Description
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`Fee Paid
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`Utility filing fee
`Design filing fee
`Plant filing fee
`Reissue filing fee
`Provisional filing fee
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`Claims in excess of 20
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`Independent claims In excess of 3
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`204 135
`109
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`SUBMITTED BY
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`Frank v. DeRos
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`43 584
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`information should not
`WARNING: Information on this form'may become public. Credit card
`d information and authorization on PTO-2038.
`be Included on this form. Provide credit car
`the needs of the Individual case. Any comments on
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`Patent and Trademark Office. Washington. DC
`ed to complete this term should be sent to the Chief Information Officer. U.S.
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`the amount of time you are requir
`20231.00 NOT SEND FEES OR COMPLETED FORMS TO THIS ADDRESS. SEND TO: Assistant Commis
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`Realtime'2017
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`Page 2 of 77
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`(516)357-0091am-
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`Petition to revive - unintentional
`141 1.240 241 620
`SUBTOTAL(D ($)355.00
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`142 1,240 242 620
` 2. EXTRA CLAIM FEES
`Fee from
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`143
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`243 220 Design issue fee
`Fee Paid
`Extra Claims
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`244 300
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`Total Claims
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`122 130
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`240
`126 240
`Submission of Information Disclosure Strnt
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`246
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`355
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`149
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`249
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`279
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`169
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`900
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`169
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`James J. Fallonl John Buck, Paul F. Pickel,
`Stephen J. McEerlain
`
`For:
`
`SYSTEMS AND METHODS FOR ACCELERATED LOADING OF
`OPERATING SYSTEMS AND APPLICATION PROGRAMS
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`Enclosed are:
`
`[X]
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`page(s) of specification
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`[X] ___l____
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`page(s) of Declaration and Power of Attorney
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`
`§ 1.10
`CERTIFICATION UNDER 37 C.F.R.
`I hereby certify that this New Application Transmittal and the documents
`referred to as enclosed therein are being deposited with the United States
`Postal Service on this date February 2I 2001 in an envelope as "Express Mail
`Post Office to Addressee" Mail Label Number EL679454191US addressed to:
`Assistant Commissioner for Patents, Washington, D.C.
`20231.
`
`Frank V. DeRosa
`
`(Type or print name of
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`
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`
`Page 1 of 3
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`[x] This application claims the benefit under 35 U.S.C.
`§1l9(e) of U.S. Provisional Application(s) No(s).:
`
`APPLICATION No(s).:
`
`FILING DATE
`
`601180.114
`
`February 3‘ 2000
`
`/
`
`[
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`
`Country
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`Appln. No.
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`Filed
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`from which priority under Title 35 United States Code,
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`§ 119
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`CALCULATION OF UTILITY APPLICATION FEE
`
`For
`Total
`Claims*
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`Independent
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`Multiple
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`Number
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`16
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`§ 710.00
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`§ 1.27.
`"Small Entity" Status Claimed Under 37 C.F.R.
`Reduced fees under 37 C.F.R.
`§ 1.9(f)
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`herewith $355.00.
`
`claims.
`
`*Includes all independent and single dependent claims and all claims referred to in multiple
`See 37 C.F.R.
`§ 1.75(c).
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`R%§fi11fie% 137
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`the attached Assignment.
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`A check in the amount of $355.00 to cover the filing fee is
`attached.
`
`[
`
`] Charge fee to Deposit Account No. 50-0679. Order No.
`50-0679.
`TWO (2) COPIES OF THIS SHEET ARE ENCLOSED.
`
`[X]
`
`Please charge any deficiency as well as any other fee(s)
`which may become due under 37 C.F.R.
`§ 1.16 and 1.17, at any
`time during the pendency of this application, or credit any
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`Also,
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`TWO (2) COPIES
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`#9W. 0/ "SIGNATURE OF ATTORNEY
`
`Frank V. DeRosa
`
`Reg. No. 43,584
`
`F. CHAU & ASSOCIATES, LLP
`
`1900 Hempstead Turnpike
`Suite 501
`
`East Meadow, New York 11554
`Tel. No.
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`Fax.-
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`CHECK BYTE
`COUNT LESS THAN
`
`
`PRESPECIFIED
`
`VALUE?
`
`YES
`
`
`
`/
`
`DSP READS NEXT DATA
`BYTE OF DEVICE
`PROGRAM DATA
`
`
`
`i'I...'I'Iii...ii
`
`RS...
`Ilium
`IIZZii
`
`.lziii'IlIlI.
`
`
`
`=3
`
`52
`
`DSP BEGINS
`\ EXECUTION
`
`
`
`CONFIGURE I/O PORTS
`FOR VOLATILE LOGIC
`DEVICE PROGRAMMING
`
`54
`
`INITIALIZE VOLATILE
`LOGIC DEVICE
`
`55
`
`
`
`READ
`\— CONFIGURATION
`
`DATA
`
`56
`
`CLEAN BYTE
`COUNTER
`
`{/2 ’
`( d
`
`READ 1ST
`CONFIGURATION
`
`' LOAD 1ST
`CONFIGURATION
`DATA BYTE INTO DSP l/O
`
`é a1
`
`Q
`
`3
`
`
`
`INCREMENT BYTE
`COUNTER
`
`
`
`DELAY 20 nsec
`
`4m /
`
`
`
`LATCH INTO
`PROGRAMMABLE LOGIC
`DEVICE
`
`Realtime 2017
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`Page 11 Of 77
`
`LOAD DATA BYTE
`INTO DSP I/O
`
`DATA BYTE
`
`
`
`
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`

`

`
`
`
`
`DSP READ LAST DATA
`BYTE & LATCH INTO
`VOLATILE LOGIC
`DEVICE
`
`
`
`
`
`
` (2/2 .z/
`
`
`
`
`POLL VOLATILE LOGIC
`DEVICE TO ENSURE
`PROGRAMMING
`COMPLETE
`
` PROGRAMMWG
`
`SUCCESSFUL?
`
`
`
` CONTINUE DATA
`
`
`
`
`6C?
`
`STORAGE
`CONTROLLER
`INITIALIZATION
`
`YES
`
`
`
`FLAG ERROR
`REPEAT
`
`
`
`
`
`ENTIRE PROCESS
`
`
`
`
`
`FIG. 6b
`
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`
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`

`

`N0
`
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`Page 13 Of 77
`
`RECEIVE REQUEST FOR BOOT DATA
`
`70
`
`RETRIEVE REQUESTED BOOT DATA FROM DISK
`
`RECORD DATA BLOCK NUMBER OF
`RETRIEVED BOOT DATA IN A LIST
`
`
`
`73
`
`
`
`BOOT PROCESS
`- COMPLETE ?
`
`
`
`71
`
`72
`
`..
`
`
`
`YES
`
`74
`
`STORE LIST
`
`A
`
`FIG. 7a
`
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`
`

`

` NO
`
`POWER-UP OR
`SYSTEM RESET?
`
`
`
`
`
`YES
`
`RETRIEVE & READ LIST
`
`76
`
`77
`
`
`
`PREFETCH DATA
`BLOCKS
`
`SPECIFIED IN LIST
`
`
`
`COMM ENCE BOOT
`PROCESS
`
`
`
`78
`
`79
`
`I'I...iiEmil
`
`“in:
`
`
`
`
`
`RECEIVE READ
`REQUEST FOR
`
`BOOT DATA
`
`
`
`
`81
`SERVICE REQUEST
`
`USING PRELOADED
`BOOT DATA
`
`
`
`IS REQUESTED
`BOOT DATA
`PRELOADED
`
`
`IS ANY BOOT
`DATA NOT
`
`REQUESTED DURING
`
`RETRIEVE
`OOT PROCESS ?
`REQUESTED BOOT
`
`DATA FROM BOOT
`
`DEVICE
`
`
`
`82
`
`
`
`NO
`
`
`UPDATE LIST TO
`UPDATE LIST TO
`EXCLUDE BOOT DATA
`INCLUDE BOOT DATA
`83
`PREVIOUSLY
`
`NOT PREVIOUSLY
`
`SPECIFIED IN LIST
`SPECIFIED IN LIST
`
`
`
`
`
`
`
`
`
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`

`

`DATA ASSOCIATED
`WITH LAUNCHED APPLICATION
`
`
` RECEIVE REQUEST FOR APPLICATION
`90
`
`APPLICATION DATA FROM DISC
`
`91
`
`
`RETRIEVE REQUESTED
`
`
`RECORD DATA BLOCK NUMBER OF
`RETRIEVED APPLICATION DATA IN A LIST
`
`
`
`
`
`
`LAUNCH
`PROCESS
`COMPLETE?
`
` 49
`
`
`STORE LIST
`
`FIG. 8a
`
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`92
`
`
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`

`

`
`
`APPLICATION
`LAUNCHED?
`
`
`
`RETRIEVE 8. HEAD LIST
`
`96
`
`97
`
`
`
`PREFETCH DATA
`BLOCKS
`SPECIFIED IN LIST
`
`
`
`
`
`
`
` RECEIVE READ
`REQUESTS FOR
`APPLICATION DATA
`
`
`
`SERVICE REQUEST
`USING PRELOADED
`APPLICATION DATA
`
`10°
`
`103
`
`
`
`IS REQUESTED
`APPLICATION DATA
`PRELOADED?
`
`
`
`
`
`
`
`IS ANY PRELOADED
`BOOT DATA NOT
`REQUESTED DURING.
`‘ PPLICATION LAUNCH"
`
`98
`
`
`
`Ii..."It"?!
`
`
`
`2":
`
`101
`
`
`
`
`
`RETRIEVE
`REMAINDER OF
`APPLICATION DATA
`FROM DISC
`
`
`
`
`
`
`N0
`
`UPDATE LIST TO
`EXCLU DE
`APPLICATION DATA
`pREVIOUSLY
`SPECIFIED IN LIST
`
`
`UPDATE LIST TO
`'NCLUDE APPL'CAT'OS
`DATA NOT PREVIOUS
`SPECIFIED IN LIST
`
`
`
`
`102
`
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`

`

`
`
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`
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`SmoSB:
`
`535m8m0
`
`comtmano
`
`
`
`cBinocumtzm
`
`wmagma
`
`Realtime 2017
`
`Page 17 of 77
`
`
`
`..3“.i.”.3.:3:.1...5.21.
`
`.:.....jl:lnlll:.u*uulu
`
`
`
`
`Realtime 2017
`Page 17 of 77
`
`
`
`
`
`
`
`

`

`58388
`
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`
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`
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`
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`
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`
`Realtime 2017
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`
`
`
`

`

`C A
`
`ttorney Docket No.: 8011-15
`
`A‘
`
`g _
`
`U.S. Patent A lication:
`
`Title:
`
`SYSTEMS AND METHODS FOR ACCELERATED LOADING
`
`OF OPERATING SYSTEMS AND APPLICATION PROGRAMS
`
`Inventor(s)z
`
`James J. Fallon, 11 Wampus Close, Armonk, New York, 10504;
`John Buck, 362 Christopher Street, Oceanside, New York, 11572;
`Paul F. Pickel, 225 Stewart Avenue, Bethpage, New York, 11714; and
`Stephen J. McEerlain, 325 East 17th Street, New York, New York 10003.
`
`Filed:
`
`February 2, 2001
`
`Assignee:
`
`Realtime Data LLC
`
`
`
`F. Chau & Associates, LLP
`1900 Hempstead Turnpike, Suite 501
`East Meadow, NY 1 1554
`Tel: (516) 357-0091
`Fax: (516) 357-0092
`
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`
`

`

`I‘)
`
`II..."II..."
`
`
`ail...r52}...
`
` 3i.
`
`ii"
`
`SYSTEMS AND METHODS FOR ACCELERATED LOADING OF
`
`OPERATING SYSTEMS AND APPLICATION PROGRAMS
`
`
`
`This application is based on a United States provisional application Serial No.
`
`60/180,114, filed on February 3, 2000, which is fully incorporated herein by reference.
`
`lIl.lE.”
`
`BACKGROUND
`
`10
`
`The present invention relates generally to systems and methods for providing
`
`accelerated loading of operating system and application programs upon system boot or
`
`application launch and, more particularly, to data storage controllers employing lossless
`
`and/or lossy data compression and decompression to provide accelerated loading of
`
`operating systems and application programs;
`
`15
`
`WWW
`
`Modern computers utilize a hierarchy of memory devices. To achieve maximum
`
`performance levels, modern processors utilize onboard memory and on board cache to
`
`obtain high bandwidth access to both program and data. Limitations in process
`
`technologies currently prohibit placing a sufficient quantity of onboard memory for most
`
`20
`
`applications. Thus, in order to offer sufficient memory for the operating system(s),
`
`application programs, and user data, computers often use various forms of popular off-
`
`processor high speed memory including static random access memory (SRAM),
`
`synchronous dynamic random access memory (SDRAM), synchronous burst static ram
`
`(SBSRAM). Due to the prohibitive cost of the high-speed random access memory,
`
`25
`
`coupled with their power volatility, a third lower level of the hierarchy exists for non-
`
`8011-15
`
`‘
`
`1
`
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`

`

`volatile mass storage devices.
`
`Furthermore, mass storage devices offer increased capacity and fairly economical
`
`data storage. Mass storage devices (such as a “hard disk”) typically store the operating
`
`system of a computer system, as well as applications and data and rapid access to such
`
`data is critical to system performance. The data storage and retrieval‘bandwidth of mass
`
`storage devices, however, is typically much less as compared with the bandwidth of other
`
`elements of a computing system. Indeed, over the last decade, although computer
`
`processor performance has improved by at least a factor of 50, magnetic disk storage
`
`performance has only improved by a factor of 5. Consequently, memory storage devices
`
`10
`
`severely limit the performance of consumer, entertainment, office, workstation, servers,
`
`and mainframe computers for all disk and memory intensive operations.
`
`The ubiquitous Internet combined with new multimedia applications has put
`
`tremendous emphasis on storage volumetric density, storage mass density, storewidth,
`
`and power consumption. Specifically, storage density is limited by the number of bits
`
`15
`
`that are encoded in a mass storage device per unit volume. Similarly mass density is
`
`defined as storage bits per unit mass. Storewidth is the data rate at which the data may be
`
`accessed. There are various ways of categorizing storewidth in terms, several of the more
`
`prevalent metrics include sustained continuous storewidth, burst storewidth, and random
`
`access storewidth, all typically measured in megabytes/sec. Power consumption is
`
`.
`
`20
`
`canonically defined in terms of power consumption per bit and may be specified under a
`
`number of operating modes including active (while data is being accessed and
`
`transmitted) and standby mode. Hence one fairly obvious limitation within the current art
`
`is the need for even more volume, mass, and power efficient data storage.
`
`8011-15
`
`2
`
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`
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`

`

`O
`
`‘
`
`0
`
`Magnetic disk mass storage devices currently employed in a variety of home,
`
`business, and scientific computing applications suffer from significant seek-time access
`
`delays along with profound read/write data rate limitations. Currently the fastest available
`
`disk drives support only a sustained output data rate in the tens of megabytes per second
`
`data rate (MB/sec). This is in stark contrast to the modern Personal Computer’s
`
`Peripheral Component Interconnect (PCI) Bus’s low end 32 bit / 33Mhz input/output
`
`capability of 264 MB/sec and the PC's internal local bus capability of 800 MB/sec.
`
`Another problem within the current art is that emergent high performance disk
`
`interface standards such as the Small Computer Systems Interface (SCSI-3), Fibre
`
`Channel, AT Attachment UltraDMA/66/ 100, Serial Storage Architecture, and Universal
`
`Serial Bus offer only higher data transfer rates through intermediate data buffering in
`
`random access memory. These interconnect strategies do not address the fundamental
`
`problem that all modern magnetic disk storage devices for the personal computer
`
`marketplace are still limited by the same typical physical media restrictions. In practice,
`
`faster disk access data rates are only achieved by the high cost solution of simultaneously
`
`accessing multiple disk drives with a technique known within the art as data striping and
`
`10
`
`15
`
`
`
`redundant array of independent disks (RAID). ~
`
`RAID systems often afford the user the benefit of increased data bandwidth for
`
`data storage and retrieval. By simultaneously accessing two or more disk drives, data
`
`20
`
`bandwidth may be increased at a maximum rate that is linear and directly proportional to
`
`the number of disks employed. Thus another problem with modern data storage systems
`
`utilizing RAID systems is that a linear increase in data bandwidth requires a proportional
`
`number of added disk storage devices.
`
`8011-15
`
`3
`
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`

`

`Another problem with most modern mass storage devices is their inherent
`
`unreliability. Many modern mass storage devices utilize rotating assemblies and other
`
`types of electromechanical components that possess failure rates one or more orders of
`
`magnitude higher than equivalent solid-state devices. RAID systems employ data
`
`redundancy distributed across multiple disks to enhance data storage and retrieval
`
`reliability. In the simplest case, data may be explicitly repeated on multiple places on a
`
`single disk drive, on multiple places on two or more independent disk drives. More
`
`complex techniques are also employed that support various trade-offs between data
`
`bandwidth and data reliability.
`
`Standard types of RAID systems currently available include RAID Levels 0, 1,
`
`and 5. The configuration selected depends on the goals to be achieved. Specifically data
`
`reliability, data validation, data storage /retrieval bandwidth, and cost all play a role in
`
`defining the appropriate RAID data storage solution. RAID level 0 entails pure data
`
`striping across multiple disk drives. This increases data bandwidth at best linearly with
`
`the number of disk drives utilized. Data reliability and validation capability are
`
`decreased. A failure of a single drive results in a complete loss of all data. Thus another
`
`problem with RAID systems is that low cost improved bandwidth requires a significant
`
`decrease in reliability.
`
`RAID Level 1 utilizes disk mirroring where data is duplicated on an independent
`
`disk subsystem. Validation of data amongst the two independent drives is possible if the
`
`data is simultaneously accessed on both disks and subsequently compared. This tends to
`
`decrease data bandwidth from even that of a single comparable disk drive. In systems
`
`that offer hot swap capability, the failed drive is removed and a replacement drive is
`
`8011-15
`
`4
`
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`10
`
`15
`
`20
`
`
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`

`

`O '
`
`O
`
`inserted. The data on the failed drive is then copied in the background while the entire
`
`system continues to operate in a performance degraded but fully operational mode. Once
`
`the data rebuild is complete, normal operation resumes. Hence, another problem with
`
`RAID systems is the high cost of increased reliability and associated decrease in
`
`performance.
`
`RAID Level 5 employs disk data striping and parity error detection to increase
`
`both data bandwidth and reliability simultaneously. A minimum of three disk drives is
`
`required for this technique. In the event of a single disk drive failure, that drive may be
`
`rebuilt from parity and other data encoded on disk remaining disk drives. In systems that
`
`offer hot swap capability, the failed drive is removed and a replacement drive is inserted.
`
`The data on the failed drive is then rebuilt in the background while the entire system
`
`continues to operate in a performance degraded but fully operational mode. Once the
`
`data rebuild is complete, normal operation resumes.
`
`Thus another problem with redundant modern mass storage devices is the
`
`degradation of data bandwidth when a storage device fails. Additional problems with
`
`bandwidth limitations and reliability similarly occur within the art by all other forms of
`
`sequential, pseudo-random, and random access mass storage devices. These and other
`
`limitations within the current art are addressed by the present invention.
`
`SILMMARXQEIHEJNXENIIQN
`
`The present invention is directed to systems and methods for providing
`
`accelerated loading of operating system and application programs upon system boot or
`
`application launch and, more particularly, to data storage controllers employing lossless
`
`and/or lossy data compression and decompression to provide accelerated loading of
`
`8011-15
`
`5
`
`Realtime 2017
`
`Page 24 0f 77
`
`
`
`10
`
`15
`
`20
`
`Realtime 2017
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`

`

`operating systems and application programs.
`
`In one aspect of the present invention, a method for providing accelerated loading
`
`of an operating system comprises the steps of: maintaining a list of boot data used for
`
`booting a computer system; preloading the boot data upon initialization of the computer
`
`system; and servicing requests for boot data from the computer system using the
`
`preloaded boot data. The boot data may comprise program code associated with an
`
`operating system of the computer system, an application program, and a combination
`
`thereof. In a preferred embodiment, the boot data is retrieved from a boot device and
`
`stored in a cache memory device.
`
`In another aspect, the method for accelerated loading of an operating system
`
`comprises updating the list of boot data during the boot process. The step of updating
`
`comprises adding to the list any boot data requested by the computer system not
`
`previously stored in the list and/or removing from the list any boot data previously stored
`
`in the list and not requested by the computer system.
`
`In yet another aspect, the boot data is stored in a compressed format on the boot
`
`device and the preloaded boot data is decompressed prior to transmitting the preloaded
`
`10
`
`15
`
`
`
`boot data to the requesting system.
`
`In another aspect, a method for providing accelerated launching of an application
`
`program comprises the steps of: maintaining a list of application data associated with an
`
`20
`
`application program; preloading the application data upon launching the application
`
`program; and servicing requests for application data from a computer system using the
`
`preloaded application data.
`
`In yet another aspect, a boot device controller for providing accelerated loading of
`
`8011-15
`
`6
`
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`

`

`u‘
`
`limiiii...ii
`
`1..nil...
`
`
`
`O
`
`-
`
`C
`
`an operating system of a host system comprises: a digital signal processor (DSP); a
`
`programmable logic device, wherein the programmable logic device is programmed by
`
`the digital signal processor to (i) instantiate a first interface for operatively interfacing the
`
`boot device controller to a boot device and to (ii) instantiate a second interface for
`
`operativer interfacing the boot device controller to the host system; and a non-volatile
`
`memory device, for storing logic code associated with the DSP, the first interface and the
`
`second interface, wherein the logic code comprises instructions executable by the DSP for
`
`maintaining a list of boot data used for booting the host system, preloading the boot data
`
`upon initialization of the host system, and servicing requests for boot data from the host
`
`10
`
`system using the preloaded boot data. The boot device controller filrther includes a
`
`cache memory device for storing the preloaded boot data.
`
`The present invention is realized due to recent improvements in processing speed,
`
`inclusive of dedicated analog and digital hardware circuits, central processing units, (and
`
`any hybrid combinations thereof), that, coupled with advanced data compression and
`
`15
`
`decompression algorithms are enabling of ultra high bandwidth data compression and
`
`decompression methods that enable improved data storage and retrieval bandwidth
`
`These and other aspects, features and advantages, of the present invention will
`
`become apparent from the following detailed description of preferred embodiments that
`
`is to be read in connection with the accompanying drawings.
`
`20
`
`W
`
`Fig. 1 is a block diagram of a data storage controller according to one embodiment
`
`of the present invention;
`
`8011-15
`
`7
`
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`
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`

`

`Fig. 2 is a block diagram of a data storage controller according to another
`
`embodiment of the present invention;
`
`Fig. 3 is a block diagram of a data storage controller according to another
`
`embodiment of the present invention;
`
`Fig. 4 is a block diagram of a data storage controller according to another
`
`embodiment of the present invention;
`
`Fig. 5 is a block diagram of a data storage controller according to another
`
`embodiment of the present invention;
`
`Figs. 6a and 6b comprise a flow diagram of a method for initializing a data
`
`10
`
`storage controller according to one aspect of the present invention;
`
`Figs. 7a and 7b comprise a flow diagram of a method for providing accelerated
`
`loading of an operating system and/or application programs upon system boot, according
`
`to one aspect of the present invention;
`
`Figs. 8a and 8b comprise a flow diagram of a method for providing accelerated
`
`15
`
`loading of application programs according to one aspect of the present invention;
`
`Fig. 9 is a diagram of an exemplary data compression system that may be
`
`employed in a data storage controller according to the present invention; and
`
`Fig. 10 is a diagram of an exemplary data deco