IPR2016-01737 & IPR2016-01738
`Apple Inc.
`v.
`Realtime Data LLC
`Patent 8,880,862
`Motions to Amend
`
`Served December 29, 2017
`Presented January 8, 2018
`
`REALTIME 2032-B
`
`142
`
`
`Apple Inc.
`v.
`Realtime Data LLC
`Patent 8,880,862
`Motions to Amend
`
`Served December 29, 2017
`Presented January 8, 2018
`
`REALTIME 2032-B
`
`142
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`143
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`144
`
`
`
`Proposed Substitute Claims
`
`Claims 118, 122, 124 and dependents
`Four new limitations:
`1. “preloading” compressed boot
`data, rather than simply “loading”
`the boot data;
`2. preloading into a “volatile memory”
`rather than a “memory”;
`3. “preloading” comprises
`“transferring the portion of boot
`data in the compressed form into
`the volatile memory”;
`4. preloading occurs “during the
`same boot sequence in which a
`boot device controller receives a
`command over a computer bus to
`load the portion of boot data.”
`
`Claim 174, 177, 179 and dependents
`Three new limitations:
`1. “preloading” compressed boot
`data, rather than simply “loading”
`the boot data;
`2. preloading by “transferring the
`portion of the operating system
`from a first memory to a second
`memory”;
`3. preloading occurs “during the
`same boot sequence in which a
`boot device controller receives a
`command over a computer bus to
`load the portion of the operating
`system.”
`
`145
`
`
`
`Proposed Substitute Claims
`
`118. (Substitute for claim 1, if found unpatentable) A method for providing
`accelerated loading of an operating system in a computer system, the method
`comprising:
`preloading a portion of boot data in a compressed form into a volatile memory,
`the portion of boot data in the compressed form being associated that is with
`a portion of a boot data list for booting the computer system into a memory,
`wherein the preloading comprises transferring the portion of boot data in the
`compressed form into the volatile memory, and wherein the preloading occurs
`during the same boot sequence in which a boot device controller receives a
`command over a computer bus to load the portion of boot data;
`accessing the preloaded portion of the boot data in the compressed form from
`the volatile memory;
`decompressing the accessed portion of the boot data in the compressed form at
`a rate that decreases a boot time of the operating system relative to loading
`the operating system utilizing boot data in an uncompressed form; and
`updating the boot data list, wherein the decompressed portion of boot data
`comprises a portion of the operating system.
`
`146
`
`
`
`Proposed Substitute Claims
`
`174. (Substitute for claim 8, if found unpatentable) A method of loading an operating
`system for booting a computer system, comprising:
`storing a portion of the operating system in a compressed form in a first memory;
`preloading the portion of the operating system by transferring the portion of the
`operating system from the first memory to a second memory, the portion of the
`operating system being associated with a boot data list, and wherein the
`preloading occurs during the same boot sequence in which a boot device
`controller receives a command over a computer bus to load the portion of the
`operating system;
`accessing the preloaded portion of the operating system from the second memory
`in the compressed form;
`decompressing the accessed portion of the operating system to provide a
`decompressed portion of the operating system;
`utilizing the decompressed portion of the operating system to at least partially boot
`the computer system; and updating the boot data list, wherein the portion of the
`operating system is accessed and decompressed at a rate that is faster than
`accessing the preloaded portion of the operating system from the first memory if
`the portion of the operating system was to be stored in the first memory in an
`uncompressed form.
`
`147
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`148
`
`
`
`Patent Owner Has Met Its Burden
`
`Undisputed that Patent Owner has met all requirements
`of 37 C.F.R § 42.121
`
`No dispute that the amendments:
`v are responsive to grounds of unpatentability in the trial
`v
`retain all features of the original claims
`v do not enlarge the scope of the claims in any way
`v only add narrowing features
`v only propose one substitute claim for each original claim
`v are supported by the original application
`
`-1737 Mot. to Amend (Paper 19) at 2-17; Reply (Paper 31) at 2.
`-1738 Mot. To Amend (Paper 20) at 2-15; Reply (Paper 33) at 2.
`149
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`150
`
`
`
`Apple Must Prove Unpatentability
`
`“In Aqua Products, Inc. v. Matal, this Court recently ruled
`that the patent owner does not bear the burden of proof
`on the patentability of its proposed amended claims.
`Rather, the petitioner bears the burden of proving that the
`proposed amended claims are unpatentable ‘by a
`preponderance of the evidence.’”
`
`Bosch Automotive Service Solutions LLC v. Matal, 2015-1928, Slip Op. at 22 (Fed. Cir. December 22, 2017)
`
`151
`
`
`
`Apple Must Prove Unpatentability
`
`The Board must assess the patentability of proposed
`substitute claims “without placing the burden of
`persuasion on the patent owner.”
`
`Aqua Products, Inc. v. Matal, 872 F.3d 1290, 1296 (Fed. Cir. 2017)
`
`It is petitioner’s burden “to prove all propositions of
`unpatentability, including for amended claims.”
`
`Id.
`
`The only relevant art is “the prior art cited in the IPR and
`any new art relevant to §102 or §103 that the petitioner
`asks be introduced into the IPR.”
`
`Id. at 1314
`
`152
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`153
`
`
`
`Apple Alleges Four Theories
`
`Settsu alone
`
`Sukegawa, Dye, and
`Kroeker
`
`Settsu and Zwiegincew
`
`Sukegawa, Dye, and
`Esfahani
`
`154
`
`
`
`Argument Roadmap
`
`v The proposed substitute claims
`
`v Patent Owner has met its burden
`
`v Apple must prove unpatentability
`
`v Apple alleges four obviousness theories
`
`v Each of Apple’s theories fails
`
`155
`
`
`
`Each of Apple’s Theories Fails
`
`Each of Apple’s theories fails for one or more of
`three different reasons:
`1. Failure to properly allege obviousness
`2. Failure to prove motivations to combine
`3. Failure to meet “preloading” limitation
`
`156
`
`
`
`Each of Apple’s Theories Fails
`
`Each of Apple’s theories fails for one or more of
`three different reasons:
`1. Failure to properly allege obviousness
`2. Failure to prove motivations to combine
`3. Failure to meet “preloading” limitation
`
`157
`
`
`
`Failure to Properly Allege Obviousness
`
`To demonstrate obviousness, a petitioner “must
`articulate [1] how specific references could be
`combined, [2] which combination(s) of elements
`in specific references would yield a predictable
`result, or [3] how any specific combination would
`operate or read on the asserted claims.”
`
`Dell Inc. et al v. Realtime Data LLC, IPR2016-01002, Paper 71 at 10 (citing and quoting ActiveVideo Networks, Inc. v. Verizon
`Commc’ns, Inc., 694 F.3d 1312, 1327-28 (Fed. Cir. 2012))
`
`158
`
`
`
`Failure to Properly Allege Obviousness
`
`Those showings must appear in the body of
`petitioner’s brief, and cannot be incorporated by
`reference from its expert’s declaration.
`
`See, e.g., Cisco Sys., Inc. v. C-Cation Techs., LLC, IPR2014-00454, Paper 12 at 7-10 (Aug. 29, 2014) (informative)
`(citing 37 C.F.R. § 42.6(a)(3))
`
`159
`
`
`
`Failure to Properly Allege Obviousness
`
`Apple’s briefing as to the combination of
`Sukegawa and Dye with (1) Kroeker or (2) Esfahani:
`
`1. Does not discuss Dye at all
`2. Does not state how the combination would read on all
`limitations of the substitute claims
`3. Does not discuss how the combination would be
`created
`4.
`Is silent as to how the combination would operate
`5. Has only conclusory assertions of a motivation to
`combine
`
`-1737 Supp. Response (Paper 39) at 1-2; -1738 Supp. Response (Paper 41) at 1-2
`
`160
`
`
`
`Failure to Properly Allege Obviousness
`
`Instead, Apple relies on improper incorporation by reference
`
`Briefing contains no such
`analysis
`
`Apple’s Supplemental Brief
`“In this regard, the analysis presented
`in this section demonstrates how
`Kroeker combines with Sukegawa to
`render obvious the new claim
`language, and does not contradict the
`Petition’s application of Sukegawa,
`Dye, and other references
`
`
`to the unamended claim language.
`Ex. 1043, ¶¶15-43.”
`
`Incorporates twenty-nine
`paragraphs of new expert
`declaration by reference
`-1737 Supp. Brief in Opp. to Mot. to Amend (Paper 37) at 8
`-1738 Supp. Brief in Opp. to Mot. to Amend (Paper 39) at 8
`
`161
`
`
`
`Failure to Properly Allege Obviousness
`
`Instead, Apple relies on improper incorporation by reference
`
`Briefing contains no such analysis
`
`Apple’s Supplemental Brief
`“In this regard, the analysis
`presented in this section
`demonstrates how Esfahani
`combines with Sukegawa to render
`obvious the new claim language,
`and does not contradict the
`Petition’s application of Sukegawa,
`Dye, and other references to the
`unamended claim language.
`Ex. 1043, ¶¶44-61.”
`
`Incorporates eighteen paragraphs
`of new expert declaration by
`reference
`-1737 Supp. Brief in Opp. to Mot. to Amend (Paper 37) at 4-5
`-1738 Supp. Brief in Opp. to Mot. to Amend (Paper 39) at 4-5
`
`162
`
`
`
`Failure to Properly Allege Obviousness
`
`Apple's supplemental briefing violates the Board’s instructions
`
`MR. NOROOZI: I do, Your Honor. The second question is, while
`the 12 pages of briefing is limited, is there any limit
`that the Board is imposing on the length of the declaration
`that Petitioner can put in or the amount of new art or
`references or argument? Because without any kind of
`limitation on what their expert can say and can put in,
`they could obviously introduce an avalanche of ne material
`through that expert declaration, and it would be quite
`difficult to grapple with in 12 pages of response of
`briefing for us.
`JUDGE BRADEN: I understand your concern, Mr. Noroozi. However,
`I do believe that the Board’s rules against incorporation
`by reference will prohibit Petitioner from doing such a
`thing. If the arguments cannot be made and amply supported
`in their brief, they can’t be made and amply supported.
`MR. NOROOZI: Thank you, Your Honor.
`JUDGE BRADEN: Petitioner, you understand that, correct?
`MR. RENNER: Yes, Your Honor. Thank you.
`See Ex. 2031 at 22:24-23:6; -1737 Supp. Response (Paper 39) at 1-2; -1738 Supp. Response (Paper 41) at 1-2
`
`163
`
`
`
`Failure to Properly Allege Obviousness
`
`Apple’s theories based on Sukegawa and Dye with (1) Kroeker
`or (2) Esfahani must be rejected for failing to:
`
`“articulate [1] how specific references could be combined,
`[2] which combination(s) of elements in specific
`references would yield a predictable result, or [3] how any
`specific combination would operate or read on the
`asserted claims.”
`
`Dell Inc. et al v. Realtime Data LLC, IPR2016-01002, Paper 71 at 10 (citing and quoting ActiveVideo Networks, Inc. v. Verizon
`Commc’ns, Inc., 694 F.3d 1312, 1327-28 (Fed. Cir. 2012))
`
`164
`
`
`
`Failure to Properly Allege Obviousness
`
`Apple’s theories with respect to Kroeker and Esfahani thus fail
`
`Settsu alone
`
`Sukegawa, Dye, and
`Kroeker
`
`Settsu and Zwiegincew
`
`Sukegawa, Dye, and
`Esfahani
`
`165
`
`
`
`Each of Apple’s Theories Fails
`
`Each of Apple’s theories fails for one or more of
`three different reasons:
`1. Failure to properly allege obviousness
`2. Failure to prove motivations to combine
`3. Failure to meet “preloading” limitation
`
`166
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`167
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Apple’s combination theory requires using Zwiegincew’s scenario
`files to load Settsu’s “OS main body module 8 . . . from boot
`device 3 into memory 2”
`
`Q. In your two declarations, in both of them, you have an
`opinion that a POSA would use Zwiegincew and its
`teachings with respect to avoiding hard page faults in
`order to improve on booting up or loading the OS main
`body module 8 of Settsu; is that right?
`A. Yes.
`
`Ex. 2024, 91:10-16; -1737 Reply (Paper 31) at 8; -1738 Reply (Paper 33) at 8
`
`168
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Apple’s combination theory requires using Zwiegincew’s scenario
`files to load Settsu’s “OS main body module 8 . . . from boot
`device 3 into memory 2”
`
`Q. And your combination of Zwiegincew with Settsu
`proposes to use Zwiegincew’s teachings as a part of
`the process of essentially moving the OS main body
`module 8 of Settsu from boot device 3 into memory 2,
`right?
`A. Yes, I think that’s correct.
`
`Ex. 2024, 106:5-11; --1737 Reply (Paper 31) at 8; -1738 Reply (Paper 33) at 8
`
`169
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Use Zwiegincew’s scenario files
`
`Apple’s
`Combination
`Theory
`
`Ex. 2024, 106:5-11; --1737 Reply (Paper 31) at 8; -1738 Reply (Paper 33) at 8
`
`170
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`But as both experts agree, Zwiegincew’s scenario files can’t be
`used until Settsu’s Virtual Memory Manager is enabled
`
`“[B]asically, Zwiegincew assumes that the virtual memory is available
`to it when he needs it. So in that sense, it’s enabled when it – it
`certainly has to be enabled by the time – by the time you leave the
`loading process in Zweigincew or preloading, if you will.”
`
`Ex. 2024 (Neuhauser depo), 103:6-12; -1737 Reply (Paper 31) at 8-9; -1738 Reply (Paper 33) at 8-9
`
`“Both the problem addressed by Zwiegincew— ‘hard page faults’—and
`the solution it proposes— ‘prefetching’ of ‘scenario files’—rely on the
`virtual memory manager in an operating system being enabled.”
`Ex. 2025 (Back Decl.) ¶18; -1737 Reply (Paper 31) at 8-9; -1738 Reply (Paper 33) at 8-9
`
`171
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Settsu’s Virtual Memory Manager is a module within OS main
`body module 8
`Use Zwiegincew’s scenario files
`
`Apple’s
`Combination
`Theory
`
`Ex. 2025, ¶ 21;
`-1737 Reply
`(Paper 31) at 9;
`-1738 Reply
`(Paper 33) at 9
`
`
`
`172
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Zwiegincew’s scenario files can’t be used until Settsu’s Virtual
`Memory Manager has been enabled
`Use Zwiegincew’s scenario files (requires virtual memory
`processing module 22 to be enabled)
`
`Apple’s
`Combination
`Theory
`
`Ex. 2025, ¶ 21;
`-1737 Reply
`(Paper 31) at 9;
`-1738 Reply
`(Paper 33) at 9
`
`
`
`173
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Settsu’s Virtual Memory Manager is not enabled before OS main
`body module 8 has moved from boot device 3 into memory 2
`
`Q. Before the OS main body module has moved from
`boot device 3 into memory 2, are the modules within
`the OS main body module enabled?
`A. What do you mean by “enabled” here?
`Q. Are they booted, loading and running?
`A. I don’t believe so.
`
`Ex. 2024, 106:5-11; -1737 Reply (Paper 31) at 9; -1738 Reply (Paper 33) at 9
`
`174
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Settsu’s Virtual Memory Manager is not enabled before OS main
`body module 8 has moved from boot device 3 into memory 2
`Use Zwiegincew’s scenario files
`
`Apple’s
`Combination
`Theory
`
`Not yet
`enabled
`
`Ex. 2025, ¶ 21;
`-1737 Reply
`(Paper 31) at 9;
`-1738 Reply
`(Paper 33) at 9
`
`
`
`175
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Therefore, Zwiegincew’s can’t be combined with Settsu as Apple
`has proposed
`
`Use Zwiegincew’s scenario files (requires virtual Use Zwiegincew’s scenario files (requires virtual
`
`memory processing module 22 to be enabled) memory processing module 22 to be enabled)
`
`Apple’s
`Combination
`Theory
`
`Not yet
`enabled
`
`Ex. 2025, ¶ 21;
`-1737 Reply
`(Paper 31) at 9;
`-1738 Reply
`(Paper 33) at 9
`
`
`
`176
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Therefore, Zwiegincew’s can’t be combined with Settsu as Apple
`has proposed
`
`Use Zwiegincew’s scenario files (requires virtual Use Zwiegincew’s scenario files (requires virtual
`
`memory processing module 22 to be enabled) memory processing module 22 to be enabled)
`
`Would not work
`
`Apple’s
`Combination
`Theory
`
`Not yet
`enabled
`
`Ex. 2025, ¶ 21;
`-1737 Reply
`(Paper 31) at 9;
`-1738 Reply
`(Paper 33) at 9
`
`
`
`177
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Apple’s rebuttal theory: load Settsu’s virtual memory manager
`before the rest of OS main body module 8
`
`“[A] POSITA seeking to use Zwiegincew’s
`techniques in Settsu’s system would have used a
`function definition file 71 to ensure that Settsu’s
`virtual memory processing module 22 is
`preloaded and enabled prior to other modules.”
`
`-1737 Supp. Brief in Opp. to Mot. to Amend (Paper 37) at 12
`-1738 Supp. Brief in Opp. to Mot. to Amend (Paper 39) at 12
`
`178
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Apple’s rebuttal theory fails
`
`“[L]oading the virtual memory manager module
`before the other modules in Settsu’s OS main
`body module 8 still would not allow a POSA to use
`Zwiegincew’s ‘prefetching’ teachings to load the
`remaining modules within the OS main body
`module 8.”
`
`Ex. 2027 ¶ 85; -1737 Supp. Response (Paper 39) at 12; -1738 Supp. Response (Paper 41) at 12
`
`179
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Zwiegincew does not contain teachings related to the booting of
`an operating system
`
`“[T]he Zwiegincew reference that Apple and Dr.
`Neuhauser rely on as prior art does not teach or
`suggest using ‘prefetching’ as part of the boot
`process of an operating system.”
`
`Ex. 2027 ¶ 88; -1737 Supp. Response (Paper 39) at 12; -1738 Supp. Response (Paper 41) at 12
`
`180
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Zwiegincew CIP is not prior art
`
`Q. Dr. Neuhauser, I want to quickly ask you about paragraph 78 of your
` declaration where you refer to a CIP of Zwiegincew.
`A. 78? Okay.
`Q. You see that you refer to a CIP by Zwiegincew?
`A. I do.
`Q. And you see that you refer to that as the Zwiegincew ‘968 reference?
`A. That’s correct.
`Q. That’s different than the Zwiegincew reference that you talk about
` elsewhere in these declarations, right?
`A. That’s correct.
`…
`Q. And the Zwiegincew ‘968, in fact, is not prior art, right?
`A. That’s correct.
`
`Ex. 2026 at 163:19-165:9; Ex. 2027 ¶ 86; -1737 Supp. Response (Paper 39) at 12; -1738 Supp. Response (Paper 41) at 12
`
`181
`
`
`
`Failure to Prove Motivations to Combine
`
`Settsu and Zwiegincew
`
`Therefore a POSA would not have been motivated to modify Settsu
`based on Zwiegincew as Apple has proposed
`
`Settsu alone
`
`Sukegawa, Dye, and
`Kroeker
`
`Settsu and Zwiegincew
`
`Sukegawa, Dye, and
`Esfahani
`
`182
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`183
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`Apple’s combination theory with respect to Kroeker is based on
`only two alleged motivations: (1) cost; (2) speed
`
`Q. And the specific reason you say that a person of skill in the art would have
`been motivated to combine Sukegawa with Kroeker is because, according
`to you, in February of 2000, the use of nonvolatile flash memory as taught
`in Sukegawa was significantly more expensive than the use of volatile RAM
`as taught in Kroeker; is that true?
`[A.] That’s the basic motivation. There’s some other motivation that’s
`important, too, but the cost is a clear quantitative kind of thing that I
`pointed to.
`Q. What other motivation?
`A. Well, I think I – in my declaration, I spoke about access, speed and write
`time, so it’s faster to read RAM than it is to read flash, at least in those
`days. It’s also faster to write, so there’s these access time issues.
`
`Ex. 2026, 26:9-27:4; Ex. 2027 ¶ 15; -1737 Supp. Response (Paper 39) at 2-3; -1738 Supp. Response (Paper 41) at 2-3
`
`
`184
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The only support in Dr. Neuhauser’s declaration for a purported
`cost advantage of RAM over flash is a citation to Dye
`
`Q. Throughout your two declarations, the only citation
`that you have to external evidence about the relative
`cost of flash and RAM as of around February 2000 is
`this reference to Dye, right?
`
`…
`[A.] Yes, I think that’s correct.
`
`Ex. 2026 76:16-77:15; Ex. 2027, ¶19; -1737 Supp. Response (Paper 39) at 3; -1738 Supp. Response (Paper 41) at 3
`
`185
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`Dye does not show or suggest that RAM cost significantly
`less than flash in February 2000 because:
`1. Dye is from April 1999, almost a year before Feb. 2000
`2. Dye teaches that RAM prices were increasing relative
`to flash as of April 1999
`3. The cost of flash was changing rapidly relative to RAM
`between the late 1990s and February 2000
`
`Ex. 2026 at 81:6-24, 79:5-20, 83:13-85:12, 135:6-16; Ex. 2027, ¶¶19-24; -1737 Supp. Response (Paper 39) at 3-4;
`-1738 Supp. Response (Paper 41) at 3-4
`
`186
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`Contrary to Apple’s theory, a POSA would have known that flash
`was actually cheaper, per MB, than RAM in February 2000
`
`December 1, 1999
`
`March 7, 2000
`
`March 21, 2000
`
`Ex. 2027, ¶¶25-29; -1737 Supp. Response (Paper 39) at 4; -1738 Supp. Response (Paper 41) at 4
`
`187
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`And as Dr. Neuhauser admitted, incorporating RAM into Sukegawa would
`entail significant implementation costs, which he did not consider
`A. . . . .It would depend whether they had board space
`available, whether they had certain types of
`connectors available, certain power supplies available
`already, or would they have to add a new power
`supply. All of those things they would have to
`consider, and those would be on an individual basis.
`Q. You don’t talk about those considerations in your
`declaration, right?
`A. No, I do not.
`
`Ex. 2026 at 142:23-145:24; Ex. 2027, ¶31; -1737 Supp. Response (Paper 39) at 4-5; -1738 Supp. Response (Paper 41) at 4-5
`
`188
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The evidence thus refutes Apple’s cost motivation
`
`“It is my opinion that a POSA would have viewed those
`design and implementation costs as significant and would
`have been dissuaded from modifying Sukegawa’s system
`to incorporate RAM even if RAM costs were comparatively
`cheaper than flash, and would have been particularly
`dissuaded from doing so in light of the reality,
`demonstrated above, that in February 2000 RAM costs
`could exceed that of flash.”
`
`Ex. 2027, ¶32; -1737 Supp. Response (Paper 39) at 4-5; -1738 Supp. Response (Paper 41) at 4-5
`
`189
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`Apple’s Exhibits 1048 & 1049 cannot be considered
`
`-1737 Final Reply (Paper 43) at 5; -1738 Final Reply (Paper 45) at 5
`
`1. Untimely new evidence submitted in last brief
`2. No expert testimony to support
`3.
`Inadmissible hearsay
`4. Lacks authentication
`5. Lacks relevance (exhibits are from 2005 and 2007; do not
`demonstrate POSA’s knowledge in February 2000)
`Ex. 2027, ¶32; -1737 Mot. to Exclude (Paper 46) at 7-10; -1738 Mot. to Exclude (Paper 48) at 7-10
`
`
`190
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The evidence also refutes Apple’s speed motivation
`
`A. . . . .So whether the total time, you know, from the beginning
`of the boot cycle to some particular point during this process
`of booting is longer or shorter in the combination is
`unknowable . . . .
`Ex. 2026 48:21-50:13; Ex. 2027, ¶39; -1737 Supp. Response (Paper 39) at 5-7; -1738 Supp. Response (Paper 41) at 5-7
`
`A. . . . .So the process really has a lot of aspects to it that are
`unknowable, and therefore, trying to make a comparison of
`time is going to be difficult, because you just don’t know
`whether it might be faster for one system, faster – you know,
`the same system.
`Ex. 2026 56:15-59:2; Ex. 2027, ¶40; -1737 Supp. Response (Paper 39) at 5-7; -1738 Supp. Response (Paper 41) at 5-7
`
`191
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The evidence also refutes Apple’s speed motivation
`
`[Q.] Based on what’s in your declarations, the amount of detail
`that’s in there, would a person of skill in the art as of
`around February 2000 have known whether it would take
`more time, less time, or the same amount of time to load
`the same number of megabytes or megabits or kilobytes,
`whatever, of boot data from nonvolatile flash alone, as
`taught by Sukegawa plus Dye, versus nonvolatile flash
`and some amount of RAM, as proposed in your
`combination of Sukegawa, Dye and Kroeker?
`[A.] Well, I think the short answer is no, they wouldn’t . . . .
`Ex. 2027, ¶41; Ex. 2026 60:9-63:1; -1737 Supp. Response (Paper 39) at 5-7; -1738 Supp. Response (Paper 41) at 5-7
`
`192
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The evidence also refutes Apple’s speed motivation
`
`Q. And I think we’ve said several times – I think you’ve said several
`times that it’s just not clear, without additional information,
`whether adding in RAM from Kroeker is going to make the overall
`time required to load boot data for the operating system from
`nonvolatile flash plus RAM to be less time than simply taking the
`same boot data from nonvolatile flash. Is that true?
`[A.] I think that it’s true in the general sense that, without specifics,
`we don’t know, but of course, we don’t – you can’t make a
`general statement that it would be faster or slower is what I’m
`saying. Might be the same, might be either or the same.
`
`Ex. 2027, ¶42; Ex. 2026 67:23-69:6; -1737 Supp. Response (Paper 39) at 5-7; -1738 Supp. Response (Paper 41) at 5-7
`
`193
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`The evidence also refutes Apple’s speed motivation
`
`“I agree with Dr. Neuhauser’s testimony that whether the
`suggested modifications to Sukegawa would improve its
`speed is ‘unknowable’ and that it presents a ‘difficult
`engineering question.’”
`
`Ex. 2027, ¶43; -1737 Supp. Response (Paper 39) at 5-7; -1738 Supp. Response (Paper 41) at 5-7
`
`194
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Kroeker
`
`Therefore a POSA would not have been motivated to modify
`Sukegawa based on Kroeker as Apple has proposed
`
`Settsu alone
`
`Sukegawa, Dye, and
`Kroeker
`
`Settsu and Zwiegincew
`
`Sukegawa, Dye, and
`Esfahani
`
`195
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`196
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`Apple’s combination theory with respect to
`Esfahani also rests on the same two alleged
`motivations: (1) cost; (2) speed
`
`Ex. 2027, ¶¶56-59; -1737 Supp. Response (Paper 39) at 9; -1738 Supp. Response (Paper 41) at 9
`
`197
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`As shown, a POSA would have known in February 2000 that flash
`could be obtained more cheaply than RAM, per MB, and would
`entail significant implementation costs
`
`December 1, 1999
`
`March 7, 2000
`
`March 21, 2000
`
`Ex. 2027, ¶66; -1737 Supp. Response (Paper 39) at 9; -1738 Supp. Response (Paper 41) at 9
`
`198
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`And contrary to Apple’s assertion, Esfahani does not teach a cost
`advantage to using RAM instead of flash
`
`Apple’s misrepresentation
`
`Esfahani’s actual statement
`
`“Esfahani recognized
`that . . . ‘[t]oday, RAM and
`disk space are
`inexpensive, have high
`capacity, and are fast
`compared to the ROM’”
`
`“Today, RAM and disk
`space are inexpensive,
`have high capacity, and
`are fast compared to the
`ROM, RAM and disk in the
`original Macintosh.”
`
`Ex. 1043, ¶45 (emphasis Apple’s); -1737 Supp. Response (Paper 39) at
`9-10; -1738 Supp. Response (Paper 41) at 9-10
`
`
`Esfahani at 5:3-5; Ex. 2027, ¶¶62-65; -1737 Supp. Response (Paper 39)
`at 9-10; -1738 Supp. Response (Paper 41) at 9-10
`199
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`And contrary to Apple’s assertion, Esfahani does not teach a cost
`advantage to using RAM instead of flash
`
`Q. It [i.e., the statement in column 5, lines 3 to 5, in
`Esfahani] does not compare the cost of RAM, as of
`the time Esfahani was written, to the cost of ROM as
`of the time Esfahani was written, true?
`A. I think that’s correct.
`
`Ex. 2026 at 200:3-8; Ex. 2027 ¶63; -1737 Supp. Response (Paper 39) at 9-10; -1738 Supp. Response (Paper 41) at 9-10
`
`200
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`And contrary to Apple’s assertion, Esfahani does not teach a cost
`advantage to using RAM instead of flash
`
`Q. Okay. The statement in column 5, lines 3 to 5, in
`Esfahani is comparing the cost of three types of
`memory, as of the time that Esfahani was written, to
`the cost of those same types of memory as of the
`time of the original McIntosh [sic], true?
`A. I think I see what you’re asking. I think in general
`that’s true. . . .
`
`Ex. 2026 at 198:22-199:23; Ex. 2027 ¶64; -1737 Supp. Response (Paper 39) at 9-10; -1738 Supp. Response (Paper 41) at 9-10
`
`201
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`The evidence thus refutes Apple’s cost motivation as to the
`combination of Sukegawa and Dye with Esfahani
`
`“Accordingly, neither Esfahani nor Dye would have
`provided a POSA with a cost savings motivation for
`modifying Sukegawa to incorporate RAM into its boot
`process in the manner Apple and Dr. Neuhauser have
`proposed.”
`
`Ex. 2027 ¶67; -1737 Supp. Response (Paper 39) at 9-10; -1738 Supp. Response (Paper 41) at 9-10
`
`202
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`The evidence also refutes Apple’s speed motivation as to the
`combination of Sukegawa and Dye with Esfahani
`
`“I also disagree that a POSA would have been motivated to
`incorporate RAM into Sukegawa’s boot process in the hopes of
`achieving a speed improvement. As I discussed in detail in
`paragraphs 34 to 44 of this declaration, above, a POSA would
`have no reliable basis to believe that such a modification would
`actually yield any speed improvement at all. Rather, as Dr.
`Neuhasuer acknowledged, the POSA would know that such a
`modification could actually slow down Sukegawa’s system
`relative to its unmodified form.”
`
`Ex. 2027 ¶68; -1737 Supp. Response (Paper 39) at 9-10; -1738 Supp. Response (Paper 41) at 9-10
`
`203
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye with Esfahani
`
`Therefore a POSA would not have been motivated to modify
`Sukegawa based on Esfahani as Apple has proposed
`
`Settsu alone
`
`Sukegawa, Dye, and
`Kroeker
`
`Settsu and Zwiegincew
`
`Sukegawa, Dye, and
`Esfahani
`
`204
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye
`
`205
`
`
`
`Failure to Prove Motivations to Combine
`
`Sukegawa and Dye
`
`As Dr. Neuhauser acknowledged, incorporating Dye’s data
`compression into Sukegawa would entail significant costs
`
`A. . . . . [D]ata compression is not without cost.
`Q. What do you mean by “cost” when you say that?
`A. Well, there’s a lot of different costs, but the cost I’m
`thinking about right now is the actual monetary cost
`of the system, right, because nonvolatile memory
`costs something, RAM costs something, the support
`logic costs something, and compression requires
`logic, specialized logic in the case of Dye, and that
`costs something.
`Ex. 2026 at 97:4-98:10; Ex. 2027 ¶47; -1737 Supp. Response (Paper 39) at 7-9; -1738 Supp. Response (Paper 41) at
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