UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________
`
`APPLE, INC.,
`Petitioner
`
`v.
`
`REALTIME DATA LLC,
`Patent Owner
`
`____________________
`
` Case IPR2016-01737
`Patent 8,880,862
`
`____________________
`
`EXPERT DECLARATION OF DR. GODMAR BACK IN SUPPORT OF
`PATENT OWNER’S REPLY TO ITS MOTION TO AMEND
`
`Realtime 2025
`Page 1 of 21
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`
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`____________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________
`
`APPLE, INC.,
`Petitioner
`
`v.
`
`REALTIME DATA LLC,
`Patent Owner
`
`____________________
`
` Case IPR2016-01737
`Patent 8,880,862
`
`____________________
`
`EXPERT DECLARATION OF DR. GODMAR BACK IN SUPPORT OF
`PATENT OWNER’S REPLY TO ITS MOTION TO AMEND
`
`Realtime 2025
`Page 1 of 21
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`
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`TABLE OF CONTENTS
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`INTRODUCTION ............................................................................................ 1
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`PROFESSIONAL BACKGROUND ................................................................ 2
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`
`
`
`
`I.
`
`II.
`
`III. PERSON OF ORDINARY SKILL IN THE ART ........................................... 2
`
`IV. THE ’862 PATENT’S TEACHINGS AS TO “PRELOADING” .................... 3
`
`V. SETTSU DOES NOT TEACH “PRELOADING” BECAUSE IT ONLY
`BEGINS LOADING BOOT DATA AFTER RECEIVING A REQUEST OVER
`COMPUTER BUS ..................................................................................................... 6
`
`VI. A POSA WOULD NOT COMBINE SETTSU WITH ZWIEGINCEW AS
`DR. NEUHAUSER HAS PROPOSED ..................................................................... 8
`
`VII. SUKEGAWA, ESFAHANI, APPLE’S INVALIDITY CONTENTIONS,
`AND THE PRIOR ART CITED ON THE FACE OF THE PATENT ...................14
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`I, Godmar Back, declare as follows:
`
`I.
`
`INTRODUCTION
`
`
`
`1.
`
`On June 14, 2017, I submitted a declaration in support of the motion
`
`to amend, and the proposed substitute claims, submitted by Realtime Data LLC in
`
`this proceeding, in which I explained and concluded that the proposed substitute
`
`claims are supported by the original non-provisional application and are patentable
`
`over the prior art at issue in this proceeding, as well as the material art discussed
`
`during prosecution.
`
`2.
`
`I understand that Apple, Inc. and its expert, Dr. Charles J. Neuhauser,
`
`subsequently submitted a response and accompanying declaration, respectively. I
`
`also understand that Dr. Neuhauser was cross-examined with respect to the
`
`opinions set forth in that declaration. I have been asked to consider Apple’s
`
`arguments, Dr. Neuhauser’s declaration (Ex. 1030), and Dr. Neuhauser’s cross-
`
`examination testimony (Ex. 2024) to determine whether those materials affect the
`
`analysis and conclusions stated in my declaration of June 14, 2017. I have
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`additionally been asked to review the Reply in support of Patent Owner’s Motion
`
`to Amend submitted concurrently with this declaration. For the reasons explained
`
`in this declaration, my opinions remain unchanged, and the arguments and
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`evidence submitted by Apple, as elucidated by Dr. Neuhauser’s cross-examination
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`
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`testimony, further support my conclusion that the proposed substitute claims are
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`
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`patentable.
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`3.
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`In forming my opinions, I have reviewed and considered the materials
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`identified in the paragraph above, those identified in my prior declaration of June
`
`14, 2017, and relevant portions of Apple’s invalidity contentions from the district
`
`court litigation (Ex. 1039).
`
`4. My opinions are based on my experience and knowledge of the
`
`relevant art, the documents identified above, as well as the documents discussed in
`
`this declaration.
`
`5.
`
`In this declaration, I address Apple’s prior art references and
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`unpatentability theories. My decision to discuss below only certain shortcomings
`
`of those references or theories should not be understood as a concession that those
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`references or theories teach other limitations of the proposed amended claims that
`
`are not specifically discussed.
`
`II.
`
`PROFESSIONAL BACKGROUND
`
`6. My professional background and Curriculum Vitae were provided as
`
`part of my declaration of June 14, 2017, and I do not repeat my qualifications here.
`
`III. PERSON OF ORDINARY SKILL IN THE ART
`
`7. My understanding and views as to the “person of ordinary skill in the
`
`art” were set forth in my prior declaration of June 14, 2017, and have not changed.
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`IV. THE ’862 PATENT’S TEACHINGS AS TO “PRELOADING”
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`
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`8.
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`Section V of the ’862 specification, titled “Instant Boot Device for
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`Operating System, Application Program and Loading,” is instructive as to the
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`meaning of “preloading” within the context of the patent. That section contrasts the
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`“preloading” approach taught in the specification from prior art approaches. Ex.
`
`1001 at 20:36-22:11. The specification explains that “with conventional boot
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`device controllers, after reset, the boot device controller will wait for a command
`
`over the computer bus (such as PCI).” Id. at 20:38-40. It then explains that since
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`the boot device controller is typically ready to operate before the computer bus,
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`“this wait period is unproductive time.” Id. at 20:40-43. And it further explains that
`
`once a boot device controller receives a command for boot data over the computer
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`bus, “a long delay is seen by the computer user.” Id. at 20:45-48.
`
`9.
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`The specification then proposes a solution: “a technique of data
`
`preloading to decrease the computer system boot time.” Id. at 20:50-53 (emphasis
`
`added). Specifically, the specification teaches that “prior to host system reset [e.g.,
`
`PCI bus reset], the data storage controller can proceed to pre-load the portions of
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`the computer operating system from the boot device (e.g., hard disk) into the on-
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`board cache memory.” Id. at 20:58-61 (emphasis added). “Preloading” thus occurs
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`before the computer bus has been reset, i.e., before commands can be sent or
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`received across the computer bus. The specification further clarifies that fact,
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`stating “it is advantageous for the boot device controller to preload [ ] portions [of
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`
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`the operating system] and not wait until it is commanded to load the operating
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`system.” Ex. 1001 at 20:63-66 (emphasis added). “Once the data is preloaded,
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`when the computer bus issues its first commands to the data storage controller
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`seeking operating system data, the data will already be available in the cache
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`memory of the data storage controller.” Id. at 21:3-6 (emphasis added).
`
`10.
`
`In situations where a request is made “for boot data that is not
`
`preloaded in the local memory of the data storage controller . . ., the controller will
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`retrieve the requested data from the boot device. . . .” Id. at 21:60-65 (emphasis
`
`added). Consequently, boot data that begins loading only after a request for that
`
`data has already been made should not be considered “preloaded” for the purposes
`
`of the ’862 patent.
`
`11.
`
`I understand that the cross-examination testimony of Apple’s expert,
`
`Dr. Neuhauser, is consistent with the above discussion of the specification’s
`
`teachings. Specifically, I note that Dr. Neuhauser has testified that “preloading” of
`
`boot data, as taught in the ’862 patent, must begin before a request for the boot
`
`data has been received over a computer bus:
`
`Q. The idea of preloading as taught in the ’862 patent is to place the
`boot data that will be needed for booting the operating system into
`cache before a request has been made for that data over the computer
`bus, right?
`
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`[A.]: I certainly think that’s an objective of the ’862.
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`
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`Ex. 2024 at 61:21-62:3. I also note that Dr. Neuhauser further acknowledged that
`
`an approach whereby the boot device controller begins loading boot data after
`
`receiving a command for that data over a computer bus is not “preloading”:
`
`Q. Take a look at . . . Column 20, starting with Line 38.
`A. 20, Line 38?
`Q. Yes. You see it says, “Typically, with conventional boot device
`controllers, after reset, the boot device controller will wait for a
`command over the computer bus.”
`Do you see that?
`A. Uh-huh.
`Q. Do you understand that to be talking about an approach that is
`different than the preloading taught by the ’862 patent?
`A. I think that’s -- yeah. I have an understanding of that.
`
`Id. at 61:6-20 (emphasis added).
`
`12.
`
`I agree with Dr. Neuhauser on both points. Indeed, the ’862 patent’s
`
`specification contains no alternative teaching as to the meaning of “preloading.”
`
`Rather, in every instance in which the specification gives context to “preloading,”
`
`it would be clear to one of ordinary skill in the art that “preloading” must begin
`
`before a request for the data has been received over a computer bus. Thus, an
`
`interpretation of “preloading” that includes beginning to load operating system
`
`boot data only after receiving a request for that data over a computer bus would
`
`find no support in the teachings of the ’862 specification.
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`SETTSU DOES NOT TEACH “PRELOADING” BECAUSE IT ONLY
`V.
`BEGINS LOADING BOOT DATA AFTER RECEIVING A REQUEST
`OVER A COMPUTER BUS
`
`
`
`13.
`
`I understand that Dr. Neuhauser has alleged that the process by which
`
`Settsu’s mini OS module 7 transfers the main body OS module 8 from boot device
`
`3 into memory 2 constitutes “preloading”:
`
`Q. You say that the process by which Settsu mini OS module 7 takes
`the main body, OS module 8, from boot device 3 into memory 2
`constitutes preloading for purposes of Claim 118; is that right?
`A. Yes, that’s correct.
`
`Ex. 2024 at 110:22-111:2. Dr. Neuhauser also alleged that the mini OS module 7 in
`
`Settsu is the “boot device controller” that “receives a command over a computer
`
`bus to load the portion of the boot data,” for purposes of the proposed substitute
`
`claims:
`
`[Q.] So your theory is that the Mini OS module 7 in Settsu CPU is the
`boot device controller, and when it has handed over control of the
`boot process by the Code module 6 within the CPU, the mini OS
`Module 7 has then received a command over computer bus to load a
`portion of the operating system for purposes of Claim 118, Limitation
`3; is that right?
`[A.] Yes, that's correct.
`
` Id. at 110:9-20. Acording to Dr. Neuhauser’s theory, Settsu performs limitation
`
`118.3—“wherein the preloading occurs during the same boot sequence in which a
`
`boot device controller receives a command over a computer bus to load the portion
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`of boot data”—by using mini OS module 7 to load OS main body module 8 in
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`response to a jump or a call from firmware code module 6 within Settsu’s CPU.
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`Ex. 1030 ¶ 44; Ex. 2024 at 109:16-111:2.
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`14.
`
`I disagree. As noted earlier, “preloading” of operating system boot
`
`data within the meaning of the ’862 patent must begin before a command has been
`
`received over a computer bus. But in Dr. Neuhauser’s theory, the alleged
`
`“preloading” in Settsu—transferring the OS main body module 8 from boot device
`
`3 into memory 2—only begins after the mini OS module 7 (which Dr. Neuhauser
`
`calls a “boot device controller”) has received a jump or a call from the firmware
`
`code module 6 (which Dr. Neuhauser calls “receiving a command over a computer
`
`bus to load the portion of boot data”). Dr. Neuhauser acknowledged that at his
`
`deposition:
`
`[Q.] So in your theory, first, Settsu’s boot device controller, which is
`the mini OS module 7, receives a command over a computer bus from
`code module 6 to load the boot data, and then it begins preloading the
`boot data by taking OS Main Body module 8 from boot device 3 into
`Memory 2?
`[A.] Yes, that's correct.
`
`Ex. 2024 at 112:2-10. And I note that Dr. Neuhauser also acknowledged Settsu’s
`
`mini OS module 7 “does not transfer any data” into memory before it has received
`
`a command over a computer bus to load that data:
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`Q. Before mini OS module 7 has taken over control of the boot
`process from code module 6, mini OS module 7 does not transfer any
`data from boot device 3 to memory 2; is that right?
`[A.] Yes, I think that’s correct.
`[Q.] And so mini OS module 7 doesn’t start transferring OS main
`body module 8 into memory 2 until after mini OS module 7 has taken
`over control from code module 6, right?
`[A.] Yes, that’s correct.
`
` Id. at 111:3-15. I agree with Dr. Neuhauser on those points.
`
`15. Because Settsu’s approach to loading boot data only begins after the
`
`alleged “boot device controller” receives an alleged “command over computer bus
`
`to load the portion of boot data,” Settsu does not teach “preloading” within the
`
`scope of the ’862 patent. I made the same general observation in my declaration of
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`June 14, 2017. Ex. 2022 at ¶ 61 (“Settsu only teaches loading boot data when it is
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`accessed or requested by the system, not ahead of time.”).
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`16. Accordingly, the proposed substitute claims are patentable over
`
`Settsu.
`
`VI. A POSA WOULD NOT COMBINE SETTSU WITH ZWIEGINCEW
`AS DR. NEUHAUSER HAS PROPOSED
`
`17.
`
`I understand that Dr. Neuhauser’s declaration also alleges that
`
`Zwiegincew teaches “preloading.” Ex. 1030 ¶ 38. Specifically, the declaration
`
`alleges that by teaching the “prefetching” of “scenario files” to avoid the problem
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`of “hard page faults,” Zwiegincew teaches “preloading” of “boot data.” Id. I
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`understand that Dr. Neuhauser’s declaration further proposes that a POSA would
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`be motivated to incorporate those teachings from Zwiegincew as part of Settsu’s
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`boot process of loading the OS main body module 8 from boot device 3 into
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`memory 2. Ex. 2024 at 91:10-16, 106:5-11 (agreeing that “[his] combination of
`
`Zwiegincew with Settsu proposes to use Zwiegincew’s teachings as a part of the
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`process of essentially moving the OS main body module 8 of Settsu from boot
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`device 3 into memory 2”), 117:12-17; Ex. 1030 ¶ 20.
`
`18.
`
`I disagree. Both the problem addressed by Zwiegincew—“hard page
`
`faults”—and the solution it proposes—“prefetching” of “scenario files”—rely on
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`the virtual memory manager in an operating system being enabled. Hard page
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`faults occur in systems that exploit a virtual memory manager when the CPU
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`attempts to access data at a virtual address that has not yet been mapped to a
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`physical memory page. At this point, the virtual memory manager will be invoked,
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`recognize which data is being accessed, load the data from a secondary storage
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`device such as a hard disk into physical memory, and resume the faulting process. I
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`understand that Dr. Neuhauser appears to agree with me that the problem of “hard
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`page faults,” which “prefetching” is intended to address, cannot occur before the
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`virtual memory manager in an operating system has been enabled:
`
`Q. As you said, there is a point in time when the virtual memory
`manager in an operating system may be enabled and a point in time
`when it's not enabled, right?
`
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`A. Yes.
`. . . .
`Q. And before the virtual memory manager in an operating system is
`enabled, hard page faults can’t happen, right?
`A. I think we have agreed to that, yes.
`
`Ex. 2024 at 101:3-13 (emphasis added).
`
`19. Therefore, as Dr. Neuhauser appears to have recognized at his
`
`deposition, it is my opinion that a POSA would not want to use Zwiegincew’s
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`prefetching approach before the virtual memory manager in an operating system
`
`has been enabled. Id. at 103:23-104:16 (explaining that it “seems to me that the
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`best approach would be to enable virtual memory set up -- well, set up virtual
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`memory, enable virtual memory, and then allow Zwiegincew to operate”). Rather,
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`a POSA would recognize that Zwiegincew’s prefetching solution cannot be used
`
`until after the virtual memory manager has been enabled—a point on which Dr.
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`Neuhauser and I again appear to agree. Id. at 102:14-103:22.
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`20. Simply put, a POSA would be unable to use Zwiegincew’s
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`prefetching approach before the virtual memory manager has been enabled because
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`the virtual memory manager is responsible for maintaining each process’s virtual
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`memory layout. A process’s virtual memory layout includes the association
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`between its virtual addresses and the on-disk data a process expects to be able to
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`access at these addresses (which may include program code or data). If the module
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`that maintains this association is not enabled, prefetching simply cannot take place.
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`Accordingly, a POSA would not be motivated to use Zwiegincew’s prefetching
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`technique before the virtual memory manager in Settsu has been enabled. Indeed,
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`in my opinion, a POSA would not even have considered it obvious to try
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`combining Zwiegincew with Settsu as proposed by Dr. Neuhauser, as the
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`combination could not be achieved using techniques known to a person of ordinary
`
`skill.
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`21. Settsu’s virtual memory manager is a module called the “virtual
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`memory processing module 22” within the OS main body module 8, as Settsu’s
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`Figures 3 and 5 clearly show:
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`DEVICE DRIVER MODULE
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`KERNEL MODULE
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`SIGNAL W'AGEWNT MODULE
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`VIRTUAL MEMORY PROCESSING MODULE
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`
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`4
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`BOOT BLOCK
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`2
`
`MODUH‘:
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`W C
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`ODE
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`MINI OS MODULE
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`5
`
`__
`
`FILE SYS’I‘EM
`
`SYSTEM CALLS
`PROCESSING MODULE
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`-
`
`'
`
`
`
`MEMORY
`
`08 MAIN
`BODY
`
`PROCESS MANAGEMEN'I‘
`MODULE
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`COMMON MEMORY
`
`MANAGEMENT MODULE
`
`
`MESSAGE MANAGEMI
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`20“ _
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`MODULE
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`SIGNALMANAGEMENT
`MODULE
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`VIRTUAL MEMORY
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`PROCESSING MODULE
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`DEVICE DRIVER MODULE
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`21
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`22. The modules within Settsu’s OS main body 8 are not enabled before
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`the OS main body module 8 has moved from boot device 3 into memory 2—a fact
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`that Dr. Neuhauser appears to have acknowledged as well:
`
`Q. Before the OS main body module has moved from boot device 3
`into memory 2, are the modules within the OS main body module
`enabled?
`A. What do you mean by “enabled” here?
`Q. Are they booted, loading and running?
`[A.] I don’t believe so.
`[Q.] The way that Settsu teaches booting the OS main body module is
`to move it from boot device 3 into memory 2, right?
`A. Yes, that’s correct.
`
`Ex. 2024 at 105:17-106:4. Settsu’s virtual memory processing module is therefore
`
`not enabled until after OS main body module 8 has already been loaded into
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`memory 2, i.e., after the point at which Dr. Neuhauser proposes that a POSA
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`would use Zwiegincew’s “prefetching” approach. It thus necessarily follows that a
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`POSA would not and could not use Zwiegincew’s prefetching technique (which
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`requires virtual memory manager to be enabled) to “preload” Settsu’s OS main
`
`body module 8 into memory 2, as Dr. Neuhauser has proposed. Id. at 106:5-11
`
`(agreeing that “[his] combination of Zwiegincew with Settsu proposes to use
`
`Zwiegincew’s teachings as a part of the process of essentially moving the OS main
`
`body module 8 of Settsu from boot device 3 into memory 2”).
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`23.
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`I also note that using Zwiegincew’s prefetching technique as part of
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`Settsu’s process of loading OS main body module 8 into memory 2 would, in any
`
`case, not constitute “preloading” because it would only begin after Settsu’s mini
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`OS module 7 (which Dr. Neuhauser calls the “boot device controller”) had
`
`received a command over a computer bus to load the OS main body module 8 (the
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`alleged “boot data”) into memory.
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`24. Accordingly, Zwiegincew does not teach “preloading” of operating
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`system boot data, and would not and could not be used by a POSA in combination
`
`with Settsu to “preload” Settsu’s OS main body module 8 into memory 2.
`
`VII. SUKEGAWA, ESFAHANI, APPLE’S INVALIDITY CONTENTIONS,
`AND THE PRIOR ART CITED ON THE FACE OF THE PATENT
`
`25.
`
`I understand that Apple has argued that a POSA would have found it
`
`obvious to use volatile memory as part of Sukegawa’s boot process, and that the
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`proposed substitute claims are unpatentable based on Grounds 1-5 of the Petition.
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`Resp. at 7-8. I do not agree. As an initial matter, I note that Dr. Neuhauser has not
`
`provided testimony to support Apple’s obviousness allegations as to Sukegawa.
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`Ex. 2024 at 14:14-25, 18:20-19:19. Moreover, it is my opinion that a POSA would
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`not be motivated to modify Sukegawa in the way Apple proposes.
`
`26. Specifically, Apple asserts that “a POSITA would have looked to
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`Sukegawa’s description of main memory used for caching AP and OS data, and
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`would have found it obvious to transfer boot data expected to be needed most
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`quickly after power-on into the nonvolatile flash memory, and to preload the
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`
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`remaining boot data into main memory upon power-on.” Resp. at 8 (citing Ex.
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`1005 at 1:5-49, 4:38-46, 5:10-6:58, 7:66-8:33, FIGS. 1-2). I disagree. Although
`
`Sukegawa mentions using main memory to cache AP and OS data, Sukegawa
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`nowhere discusses the possibility of preloading boot data into main memory.
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`Rather, in the passages to which Apple refers, it recognizes that “the cache system
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`using the above-described main memory does not effectively function when the
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`first access request for the HDD occurs at the time of turning-on of power.” Ex.
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`1005 at 1:38-41. And therefore, it concludes that “[c]onsequently, when the
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`computer system is started up, the cache system cannot be utilized to run the
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`operating system (OS) or frequently used application programs (AP).” Id. at 1:41-
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`43. The reason for this inability lies in the main memory’s volatility. Given these
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`teachings, I do not believe a POSA would be motivated to modify Sukegawa to use
`
`volatile memory for preloading boot data, and I note that Dr. Neuhauser has not
`
`opined that a POSA would be motivated to do so.
`
`27. Separately, I also note that Sukegawa teaches loading boot data into
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`memory in one cycle and using that data for booting the operating system in the
`
`next power on cycle. Dr. Neuhauser agrees with me on this point.
`
`Q. So Sukegawa’s teaching is that the boot data that is loaded into
`non-volatile memory in one cycle is used for booting the operating
`system in the next power on cycle; is that right?
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`A. Yes. I think that’s generally correct.
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`
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`Ex. 2024 at 22:7-11. By contrast, all of the proposed substitute claims require
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`“preloading [ ] during the same boot sequence in which a boot device controller
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`receives a command over a computer bus to load the portion of boot data.”
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`(emphasis added). Since Sukegawa loads its “boot data” during one cycle for use
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`during a next cycle, Sukegawa cannot meet the proposed amended claims. I
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`previously made the same point in my June 14, 2017 declaration. Ex. 2022 ¶ 63.
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`28.
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`I also understand that Apple has made unspecified unpatentability
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`allegations based on Esfahani. See Resp. at 5. I note that neither Apple nor Dr.
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`Neuhauser has put forth an element-by-element analysis purporting to show the
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`unpatentability of any proposed claim based on Esfahani, whether alone or in
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`combination with any other art. In any case, Esfahani does not teach “preloading”
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`within the meaning of the ’862 patent. Rather, Esfahani teaches that its Open
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`Firmware first initializes, and then locates its “Boot Info file (40),” which Open
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`Firmware then loads into RAM (12). Ex. 2020 at Fig. 6A, 8:40-9:6. It further
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`teaches that “[b]y default, the Boot Info file 40 is located by . . . searching for a file
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`with a predetermined file type.” Id. at 8:5-10. A POSA would thus understand that
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`Esfahani teaches that its boot data is first requested and located in response to a
`
`command over a computer bus, and only begins to load after such a request has
`
`been received, and is thus not “preloaded.”
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`29.
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` I am also aware that Apple has submitted the entirety of its
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`voluminous invalidity contentions from its district court litigation with Realtime
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`Data and urged that “Apple’s detailed mappings applied these references to claim
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`features that are similar to those presented by Realtime in the amendments at issue
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`in this proceeding.” Resp. at 3-4 (citing and quoting Ex. 1039 at 27 as “listing
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`references said to disclose ‘preloading boot data, including loading into a cache
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`and loading prior to completion of initialization of the processor.’”). Based on my
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`review of the relevant portions of the invalidity contentions, including the listing
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`cited by Apple and corresponding portions of the invalidity charts, the invalidity
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`contentions appear to simply provide various quotations from the cited prior art
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`without explaining how or why those quotations teach the relevant limitations. For
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`example, although the invalidity contentions identify twelve references as
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`purportedly teaching “preloading,” Ex. 1039 at 27-28 (identifying Bennett, two
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`references collectively titled Esfahani, Feigenbaum, Greene, Hillis, Lillich, two
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`references collectively titled Linux Kernel, Kikinis, Settsu, and Sukegawa), I did
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`not see any explanation in Apple’s invalidity charts as to how any of those
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`references teaches beginning to load boot data before a command for that data has
`
`been received over a computer bus. I am also not aware of any such teaching in
`
`those references. Based on my review of Apple’s invalidity contentions and
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`accompanying charts, none of the references appears to teach the “preloading”
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`
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`limitation of the proposed substitute claims.
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`30.
`
` In addition, I am not aware of any specific analysis provided by
`
`Apple indicating that the proposed claims are unpatentable over any of the twenty-
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`eight pages of prior art references cited on the face of the patent, whether alone or
`
`in combination. Based on my review of the prosecution history, the proposed
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`claims are patentable over each of the material prior art references at issue during
`
`the prosecution, as I explained in my prior declaration. Ex. 2022 ¶¶ 66-71.
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`31.
`
` For the reasons discussed above and in my prior declaration, none of
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`the prior art discussed herein or otherwise at issue in this proceeding teaches or
`
`suggests the subject matter of the proposed claims, whether alone or in
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`combination, particularly when viewed from the standpoint of a POSA as of the
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`priority date of the ’862 patent.
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`Dated: October 11, 2017
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`By:
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`Dr. Godmar Back
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`Realtime 2025
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