IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`James J. Fallon, et al.
`In re Patent of:
`8,880,862 Attorney Docket No.: 39521-0025IP1
`U.S. Patent No.:
`November 4, 2014
`Issue Date:
`Appl. Serial No.: 13/118,122
`Filing Date:
`May 27, 2011
`Title:
`SYSTEMS AND METHODS FOR ACCELERATED
`LOADING OF OPERATING SYSTEMS AND
`APPLICATION PROGRAMS
`
`DECLARATION OF DR. CHARLES J. NEUHAUSER
`
`I.
`
`Introduction
`
`1. My name is Dr. Charles J. Neuhauser. I understand that I am submitting a
`
`declaration in connection with an Inter Partes review (“IPR”) proceeding before
`
`the United States Patent and Trademark Office for U.S. Patent No. 8,880,862
`
`(“the ’862 Patent”).
`
`
`
`2.
`
`I have been retained on behalf of Apple Inc. to offer technical opinions with
`
`respect to the ’862 Patent and the prior art references cited in this IPR. My
`
`compensation is not based on the outcome of this matter.
`
`
`
`3.
`
`I am not a lawyer. However, counsel has advised me of legal concepts that are
`
`relevant to IPR proceedings and to the opinions that I offer in this declaration. I
`
`understand that, during IPR, claims of the subject patent are given a broadest
`
`reasonable interpretation. Counsel has advised me that the broadest reasonable
`
`
`
`1
`
`Apple v. Realtime
`Proceeding No. IPR2016-01737
`APPLE 1030
`
`
`
`James J. Fallon, et al.
`In re Patent of:
`8,880,862 Attorney Docket No.: 39521-0025IP1
`U.S. Patent No.:
`November 4, 2014
`Issue Date:
`Appl. Serial No.: 13/118,122
`Filing Date:
`May 27, 2011
`Title:
`SYSTEMS AND METHODS FOR ACCELERATED
`LOADING OF OPERATING SYSTEMS AND
`APPLICATION PROGRAMS
`
`DECLARATION OF DR. CHARLES J. NEUHAUSER
`
`I.
`
`Introduction
`
`1. My name is Dr. Charles J. Neuhauser. I understand that I am submitting a
`
`declaration in connection with an Inter Partes review (“IPR”) proceeding before
`
`the United States Patent and Trademark Office for U.S. Patent No. 8,880,862
`
`(“the ’862 Patent”).
`
`
`
`2.
`
`I have been retained on behalf of Apple Inc. to offer technical opinions with
`
`respect to the ’862 Patent and the prior art references cited in this IPR. My
`
`compensation is not based on the outcome of this matter.
`
`
`
`3.
`
`I am not a lawyer. However, counsel has advised me of legal concepts that are
`
`relevant to IPR proceedings and to the opinions that I offer in this declaration. I
`
`understand that, during IPR, claims of the subject patent are given a broadest
`
`reasonable interpretation. Counsel has advised me that the broadest reasonable
`
`
`
`1
`
`Apple v. Realtime
`Proceeding No. IPR2016-01737
`APPLE 1030
`
`
`
`
`
`interpretation must be consistent with the specification, and that claim language
`
`should be read in light of the specification and teachings in the underlying patent.
`
`
`
`4.
`
`I have reviewed the ’862 Patent, including the claims of the patent in view of the
`
`specification, and I have reviewed the ’862 Patent’s prosecution history. In
`
`addition, I have reviewed the following documents: U.S. Patent No. 6,374,353
`
`(“Settsu”), U.S. Patent No. 6,145,069 (“Dye”), U.S. Patent No. 7,190,284 (“Dye
`
`’284”), Burrows et al., “On-line Data Compression in a Log-structured File
`
`System” (1992) (“Burrows”), U.S. Patent No. 6,317,818 (“Zwiegincew”), Jeff
`
`Prosise, DOS 6 – The Ultimate Software Bundle?, PC Magazine, Apr. 13, 1993
`
`(“Prosise”), Decoder, File, Program File, Direct Memory Access, RAM, and
`
`RAM Cache, Microsoft Press Computer Dictionary (3d ed. 1997)(“MSFT
`
`Dictionary”), Jacob Ziv & Abraham Lempel, A Universal Algorithm for
`
`Sequential Data Compression, IT-23 No. 3 IEEE Transactions on Information
`
`Theory 337 (1977)(“Ziv”), James A. Storer & Thomas G. Szymanski, Data
`
`Compression via Textual Substitution, 19 No. 4 Journal of the Association for
`
`Computing Machinery (1982)(“Storer”), Kyle Loudon, Mastering Algorithms
`
`with C (1999) (“Loudon”), Michael Barr, Programming Embedded Systems in C
`
`and C++ (1999)(“Barr”), Eric Pearce, Windows NT in a Nutshell
`
`
`
`2
`
`
`
`(1999)(“Pearce”), and Tim O’Reilly, Troy Mott, and Walter Glenn, Windows 98
`
`
`
`in a Nutshell (1999)(“O’Reilly”).
`
`
`
`5.
`
`I am an electrical engineer by training and profession with a specialization in the
`
`area of computer based systems. My educational and practical background also
`
`includes extensive experience in the field of computer science and engineering. I
`
`have been a practicing electrical engineer since 1968. In formulating my
`
`opinions, I have relied upon my training, knowledge, and experience in the
`
`relevant art. A copy of my curriculum vitae was provided as Appendix A to my
`
`previous Declaration, and it provides a description of my professional experience,
`
`including my academic and employment history, publications, conference
`
`participation, and more.
`
`
`
`6.
`
`I have extensive educational and professional engineering experience. I was
`
`awarded a BSEE degree from the University of Notre Dame in 1968.
`
`Immediately after graduating from the University of Notre Dame, I was
`
`employed as a Technical Staff Member by Bell Telephone Laboratories (which
`
`has subsequently become Alcatel-Lucent).
`
`
`
`
`
`3
`
`
`
`
`
`7. During my time at Bell Telephone Laboratories, I worked on the specification,
`
`testing, and development of computer controlled data and telephone switching
`
`systems. During that time, I also received my MSEE from Northwestern
`
`University (1971) under a company sponsored program.
`
`
`
`8.
`
`I left Bell Telephone Laboratories in 1971 to pursue a Ph.D. in a joint CS/EE
`
`program at Johns Hopkins University. In 1980, I was awarded a doctorate based
`
`on my research in evaluating computer architectures using emulation techniques.
`
`
`
`9. While working on my Ph.D. research, I joined the Digital Systems Laboratory at
`
`Stanford University as a research associate in 1974. There, I worked on the
`
`development of emulation systems for architectural research. In 1974, I also
`
`began working on a part-time basis at Palyn Associates, Inc. to develop a range
`
`of commercial products based on this research.
`
`
`
`10. In 1980, I joined Palyn as a full-time member of the Technical Staff. I later
`
`became Director of Engineering at Palyn and, by 1985, I was the Vice President
`
`of Engineering. At Palyn, I was responsible for directing product development
`
`on behalf of our clients, which consisted of a range of international entities
`
`
`
`4
`
`
`
`involved in computer technology. I also directly consulted with clients regarding
`
`
`
`processor and peripheral design.
`
`
`
`11. In my consulting role at Palyn, I was responsible for the specification, design,
`
`testing, and debugging of a wide range of computer devices, including mini-
`
`computers, microprocessors, printers, and communication interfaces. This
`
`involved both hardware and software development.
`
`
`
`12. Since 1994, I have been an independent consultant focusing on technical analysis
`
`primarily in support of litigation or potential litigation. In this role I have
`
`analyzed many different types of computer based systems, including robotic
`
`manufacturing systems, television transmission and reception systems,
`
`microprocessors, main-frame systems, peripheral systems and networked
`
`systems. I also have led teams of engineers in the functional analysis of various
`
`types of systems, including robotic systems, networked processors, processor
`
`operation, and video production equipment.
`
`
`
`13. Other details concerning my background, including a list of my publications,
`
`professional service, and more, are set forth in my curriculum vitae. In forming
`
`the opinions expressed in this report, I have relied upon my education and my
`
`
`
`5
`
`
`
`
`
`nearly 50 years of professional experience in the fields of electrical and computer
`
`engineering and of computer science. This declaration is organized as follows:
`
`
`
`I.
`
`Introduction
`
`II. Detailed Discussion
`
`III. Legal Principles
`
`
`
`II. Detailed Discussion
`
`A. One of Ordinary Skill
`
`14. It is my understanding that I must analyze and apply the prior art cited above
`
`from the perspective of a person having ordinary skill in the art as of February 3,
`
`2000 (“one of ordinary skill”), which I understand to be the ’862 Patent’s earliest
`
`possible priority date.
`
`
`
`15. The ’862 Patent relates to accessing data in conventional computer systems.
`
`Figure 1 is an exemplary figure that illustrates the basic structure of one
`
`embodiment of the ’862 Patent’s system [’862 Patent, 4:36-37, 5:63-65]. This
`
`and other similar figures of the ’862 Patent show straightforward and well known
`
`structures related to conventional computer systems, such as the widely used
`
`personal computer. In my opinion, one of ordinary skill would be a person with a
`
`
`
`6
`
`
`
`
`
`Bachelor’s Degree in electrical engineering, computer engineering, or a related
`
`area of study. In addition, this person would have between three and five years
`
`of practical experience in the design and implementation of computer systems,
`
`such as personal computers. Alternatively, a person with a Master’s Degree in
`
`the area of electrical engineering, computer engineering, or a related area of study
`
`and somewhat less practical experience would be similarly qualified.
`
`
`
`16. I am well aware of the qualifications of such a person because I have worked
`
`with, supervised, and hired engineers with similar capabilities. By the year 2000,
`
`I had been awarded a Ph.D. in CS/EE with a specialization in computer
`
`engineering and had over 30 years of practical experience. Thus, by February 3,
`
`2000, I was at least as qualified as the person having ordinary skill in the art that I
`
`have identified above. Moreover, I understand the perspective of one of ordinary
`
`skill, which I have applied in my analysis.
`
`
`
`B.
`
`Prior Art and the Claims of the ’862 Patent
`
`17. The amendments introduced by Patent Owner in its proposed substitute claims
`
`are directed toward trivial features that one of ordinary skill would have
`
`considered obvious over the prior art. As I discuss in detail below, for example,
`
`
`
`7
`
`
`
`
`
`Settsu, both alone and in combination with Zwiegincew, renders obvious every
`
`feature of the proposed substitute claims, including the amended features.
`
`Independent Claim 118 (Amendment of Challenged Claim 1)
`
`[118.0] A method for providing accelerated loading of an operating system in a
`
`computer system, the method comprising:
`
`18. The system of Settsu is a “computer system” as claimed in the preamble of
`
`amended claim 118. One of ordinary skill in the art would have understood this
`
`from, for example, Settsu Fig. 1, 5 and 12 which show the basic software and
`
`hardware aspects of a computer system [5:58-60, 6:4-6, 6:29-31]. Further, the
`
`purpose of Settsu is related to “booting up and information processing
`
`apparatus” [Abstract, 1:1-4, 1:44-50, 13:49-55] and one of ordinary skill in the
`
`art would have understood that information processing apparatus is a “computer
`
`system”.
`
`
`
`19. In general, Settsu is related to improving the speed of loading an operating
`
`system. For example, under the title “Field of the Invention” Settsu states “The
`
`present invention relates to an information processing apparatus capable of
`
`reducing the time required for booting itself when it is powered on, and a method
`
`of booting an information processing apparatus at high speed” [1:8-12]. One of
`
`ordinary skill in the art would have understood from this citation and from other
`
`
`
`8
`
`
`
`
`
`discussion in Settsu that one of the objectives of Settsu is “providing accelerated
`
`loading of an operating system” because it is explicitly stated [1:44-50, 10:36-39,
`
`14:64-15:4].
`
`
`
`20. In a system of Settsu as modified to include the teachings of Zwiegincew the
`
`basic system of Settsu would be retained but the system would be extended to
`
`include the so called “scenario files” of Zwiegincew. Zwiegincew makes use of
`
`scenario files to load pages from hard disk into random access memory in
`
`anticipation of their need. One of ordinary skill in the art would have understood
`
`that this speeds up the loading and execution of applications because a time
`
`consuming hard page fault is not needed by the system to access prefetched data
`
`[Abstract, 1:5-10, 4:6-13].
`
`
`
`21. Thus, to one of ordinary skill in the art either Settsu alone or Settsu as modified
`
`by Zwiegincew would have met the requirements of the preamble to claim 118.
`
`
`
`[118.1] preloading a portion of boot data in a compressed form into a volatile
`
`memory, the portion of boot data in compressed form being associated that is
`
`with a portion of a boot data list for booting the computer system into a memory,
`
`
`
`9
`
`
`
`
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`22. Both Settsu and Zwiegincew disclose “preloading a portion of boot data in
`
`compressed form”. Claim 118 amends claim 1 by replacing “loading” with
`
`“preloading”. One of ordinary skill in the art would have understood that
`
`“preloading” is simply a form of “loading” but restricted as defined further on in
`
`the claim. In general, “preloading” information before it is explicitly required
`
`would have been well-known to one of ordinary skill in the art as is clear from
`
`Settsu alone or Settsu in combination with Zwiegincew.
`
`
`
`23. Settsu describes multiple “preferred embodiments,” but sometimes omits
`
`description of like elements between embodiments [See Settsu 10:43-51, 13:49-
`
`55]. Settsu is nevertheless clear that functionality ascribed to elements from one
`
`embodiment applies equally to similar elements of other embodiments. As such,
`
`one of skill would have understood and found it obvious that the description of
`
`elements provided by Settsu with respect to one embodiment applies equally to
`
`similar elements of other embodiments.
`
`
`
`24. The fourth embodiment of Settsu describes the loading of the OS main body
`
`module 8 into the memory 2 [generally, Settsu Figs. 12-14, 13:49-15:4]. Settsu
`
`describes structuring the operating system OS as a mini OS module 7 and a OS
`
`main body module 8 [see, e.g., Fig. 1, 1:51-57]. Upon initialization, mini OS
`
`
`
`10
`
`
`
`
`
`module 7 is loaded first and then the mini OS module 7 carries out the loading of
`
`the OS main body module 8 [Settsu Fig. 4, 9:4-11, 9:40-43]. Thus, one of
`
`ordinary skill in the art would have understood that OS main body module 8 is
`
`the required “portion of boot data” required by element 118.1 because it is data
`
`that associated with data requests expected to result from a system power-
`
`on/reset.
`
`
`
`25. Settsu describes an embodiment that explicitly makes use of “boot data in
`
`compressed form”, namely the fourth embodiment [Settsu Figs. 12-14, generally,
`
`13:49-15:4]. In this embodiment components of the OS main body module 8 are
`
`stored on the boot device 3 in compressed form [3:6-12,13:55-65]. Thus, one of
`
`ordinary skill in the art would have understood that the OS main body module 8
`
`is “a portion of boot data in compressed form” as required by element 118.1.
`
`
`
`26. Settsu explains that the use of compression and decompression reduces the time
`
`required for I/O processing, which further reduces the time required for booting
`
`up [Settsu, 14:58-15:5]. Because Settsu’s OS main body module 8 is loaded
`
`when the information processing apparatus is powered on and represents the
`
`operating system data needed to boot the information processing apparatus,
`
`Settsu’s OS main body module 8 includes data associated with data requests
`
`
`
`11
`
`
`
`
`
`expected to result from a system power-on/reset and, thus, meets the claimed
`
`boot data. As such, by its description of transferring the OS main body module 8
`
`from boot device 3 into memory 2 as a plurality of compressed files, Settsu
`
`discloses preloading a portion of boot data in a compressed form into memory.
`
`
`
`27. In more detail, Settsu Fig. 12 (reproduced below in annotated form) illustrates the
`
`“computer system” of Settsu [5:58-60, 7:66-8:9]. To prepare the system for
`
`operation the OS main body module 8 is loaded into memory 2 [8:21-35]. Settsu
`
`does not indicate whether memory 2 is non-volatile or volatile memory.
`
`However, one of ordinary skill in the art would have understood that either type
`
`of memory would be suitable for use as memory 2 because they both serve the
`
`purpose of holding the OS main body module so that it may be executed by the
`
`system [10:21-24].
`
`
`
`
`
`12
`
`
`
`
`
`
`
`28. From basic knowledge one of ordinary skill in the art would have known that
`
`
`
`volatile memory would be the most appropriate type of memory o use in the
`
`implementation of Settsu memory 2. They would have known this for two
`
`reasons. First, there is no stated reason in Settsu that memory 2 must be non-
`
`volatile memory. One of ordinary skill in the art would have known from basic
`
`knowledge that boot device 3 is a non-volatile memory because it is shown as a
`
`disk, which is well-known to be non-volatile and therefore, implementing
`
`memory 2 as non-volatile memory would be pointless within the context of
`
`Settsu. Second, one of ordinary skill in the art would have known that in typical
`
`computer systems the main operating memory is volatile because it is generally
`
`cheaper, faster and smaller than a non-volatile memory that can be loaded
`
`arbitrarily. Thus, one of ordinary skill in the art would have understood that
`
`
`
`13
`
`
`
`
`
`Settsu memory 2 would have or could have been “volatile memory” as required
`
`by element 118.1. Furthermore, it would have been obvious to one of ordinary
`
`skill in the art to implement Settsu memory 2 as volatile memory, such as
`
`SDRAM, because this was a very common approach in the design of computer
`
`systems.
`
`
`
`29. Thus, one of skill would have found it obvious to preload a portion of boot data
`
`in a compressed form into a volatile memory in Settsu’s system.
`
`
`
`30. Considering the fourth embodiment of Settsu, one of ordinary skill in the art
`
`would have understood that the OS main module 8 (i.e. the “the portion of boot
`
`data in compressed form” is associated with a “boot data list” in two ways. First,
`
`the compressed files that make up the OS main body module are themselves a
`
`form of list. Second, in fourth embodiment the mini OS module 7 maintains a
`
`list of the OS main body module files to be loaded.
`
`
`
`31. With respect to the first type of boot data list, Settsu Fig. 12 shows a file system 5
`
`that contains the multiple files that make up the OS main body module 8 [7:66-
`
`8:9, 13:55-65]. One of ordinary skill in the art would have understood that a file
`
`is a type of list, and would have further understood that an OS functional module
`
`
`
`14
`
`
`
`
`
`file stored on boot device 3 and preloaded into memory 2 includes a boot data list
`
`in the form of a list of data necessary for starting the OS. [“File: Microsoft Press
`
`Computer Dictionary (3d ed. 1997)]. Settsu also would have made this clear to
`
`one of ordinary skill in the art.
`
`
`
`32. Settsu Fig. 36 (reproduced below in annotated form) illustrates how the compiled
`
`code is divided into a mini OS module 7 and an OS main body module 8. The
`
`OS main body module 8 is composed of a header 114, a code portion 108 and a
`
`data portion 110. Header 114 locates and defines the code portion 108 and data
`
`portion 110 within the OS main body file [24:44-62, see particularly 24:60-62].
`
`One of ordinary skill in the art would have understood that the header is a list
`
`locating information with in a file and the organization of the OS main body
`
`module file is a list because that is what is shown in Fig. 36. Because the mini
`
`OS module uses the header information and the structure of the file to load the
`
`OS main body module, one of ordinary skill in the art would have understood
`
`that this list is a “boot data list”.
`
`
`
`
`
`15
`
`
`
`
`
`
`
`
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`33. With respect to the second type of “boot data list” the fourth embodiment makes
`
`it clear that in the process of loading the OS main body module 8 the mini OS
`
`module 7 makes use of a type of list. One of ordinary skill in the art would have
`
`seen this clearly from Fig. 14 related to the fourth embodiment [6:35-38, 14:13-
`
`17]. Fig. 14 illustrates the operation of the OS loading and decompression
`
`processing module 50 of Fig. 13 [14:13-17]. The illustrated flow chart shows
`
`that each functional module of the OS main body module is loaded in a sequence
`
`Fig. 14, step ST181. At step ST185 a check is made to determine if all the
`
`functional modules have been loaded [14:17-28, 14:44-52]. To one of ordinary
`
`skill in the art this would suggest a list is being used to control the loading of the
`
`
`
`16
`
`
`
`
`
`functional modules because this is a common approach to carrying out this
`
`process. Settsu describes two types of such a list.
`
`
`
`34. Fig. 3 illustrates a first type of list, namely those files or functional modules that
`
`make of the OS main body module in the form of a kernel module 15 [8:50-55].
`
`It is the responsibility of the OS loading and initialization processing module 11
`
`in mini OS module 7 to ensure that each of these functional modules is loaded
`
`[9:56-66]. In performing this function according to the sequencing shown in the
`
`flowchart of Fig. 14 one of ordinary skill in the art would have found it obvious
`
`to make use of a list because the structure of the files (as explained above) and
`
`the ordering of the files in Fig. 3 suggests ordering and sequencing. Similarly,
`
`Fig. 12 related to the fourth embodiment suggest files to be loaded sequentially
`
`until are files are loaded as Fig. 14 illustrates. One of ordinary skill in the art
`
`would have found it natural to use a list of the functional modules to control the
`
`loading as this is a common and well-known structure for identifying items to be
`
`manipulated in sequence.
`
`
`
`35. Settsu describes a second type of list, namely function definition files. Settsu
`
`Figs. 17-20 relate to an embodiment of Settsu that controls the loading and
`
`starting of application programs. As shown in Fig. 17 the OS main body 8 is
`
`
`
`17
`
`
`
`
`
`divided into a number of functional modules [16:13-21]. In this embodiment, a
`
`function definition file 71 contains a list of the OS functional modules required
`
`for a particular application module 70 to run [16:26-30]. In order to speed up the
`
`start of the application module the mini OS module (specifically, the AP
`
`Execution and OS Load processing module 72, Fig. 19) first preloads all those
`
`mini OS modules that are needed by the application module 70. To do this the
`
`mini OS module makes use of the function definition file 71 [Fig. 20, steps
`
`ST213, ST216; 16:7-17:62]. One of ordinary skill in the art would understand
`
`that the function definition file 71 is a list because Settsu states that it is [16:26-
`
`30, 16:65-17:1]. Because the function definition file 71 is used to control the
`
`preloading of OS main body modules one of ordinary skill in the art would have
`
`understood that it is a “boot data list” as required by element 118.1. Thus, to one
`
`of ordinary skill in the art Settsu makes obvious all the aspects of element 118.1.
`
`
`
`36. Zwiegincew complements Settsu’s teachings with additional disclosure of
`
`preloading boot data into volatile memory, and of updating a boot data list in the
`
`same context. Indeed, Zwiegincew would have provided further motivation to
`
`one of skill to preload boot data into volatile memory, and to update boot data
`
`lists in Settsu’s system. One of skill would have been motivated, for example, to
`
`associate compressed boot data for booting Settsu’s system with a boot data list,
`
`
`
`18
`
`
`
`
`
`and to preload the compressed boot data from boot device into memory 2
`
`(implemented as volatile memory) using the boot data list.
`
`
`
`37. Settsu when modified by Zwiegincew also discloses all the aspects of element
`
`118.1. In more detail, Fig. 1 of Zwiegincew (reproduced below in annotated
`
`form) illustrates a conventional personal computer system [3:57-59, 4:31-46].
`
`This system includes RAM (Random Access Memory) 125, which one of
`
`ordinary skill in the art would have understood to be a type of volatile memory
`
`because this is basic engineering knowledge.
`
`
`
`
`
`19
`
`
`
`
`
`38. Zwiegincew recognizes that hard page faults, that is page faults that require a
`
`
`
`disk access to correct, are an important hindrance to satisfactory performance
`
`[1:36-44]. Zwiegincew addresses this problem by creating scenario files that
`
`contain copies of pages likely to be need after particular hard page faults [2:56-
`
`59, 6:64-67]. When the particular scenario is detected, indicating that a series of
`
`hard page faults may occur the pages identified in the associated scenario file are
`
`prefetched (i.e. “preloaded”) in anticipation of the hard page fault [4:6-13, Fig. 3
`
`steps 312-318; 9:65-10:18]. Thus, one of ordinary skill in the art would have
`
`understood that Zwiegincew meets the element 118.1 requirement of “preloading
`
`a portion of boot data” and that the “portion of boot data” is “associated with a
`
`portion of a boot data list”, namely the scenario file.
`
`
`
`39. Zwiegincew also disclosed to one of ordinary skill in the art compressing data for
`
`the purpose of improving disk performance during load [8:66-9:13]. The page
`
`data to be preloaded is stored on the disk file and because in one embodiment of
`
`Zwiegincew the disk data is compressed one of ordinary skill in the art would
`
`understand that the scenario files are also compressed. Thus, one of ordinary
`
`skill in the art would have understood that what is being “preloaded” in
`
`Zwiegincew is “a portion of boot data in a compressed form” [2:56-60].
`
`
`
`
`
`20
`
`
`
`
`
`40. Thus, one of ordinary skill in the art would have understood that Settsu as
`
`modified by Zwiegincew disclosed all aspects of element 118.1
`
`
`
`[118.2] wherein the preloading comprises transferring the portion of boot data in
`
`the compressed form into the volatile memory,
`
`41. In Settsu’s fourth embodiment [Figs. 12-14, generally, 13:49-15:4] the mini OS
`
`module transfers function modules of the OS main body module from boot
`
`device 3 to memory 2. To one of ordinary skill in the art it would have been
`
`obvious to implement memory 2 as volatile memory, such as RAM. As stated
`
`above the OS main body module 8 and its associated functional modules are the
`
`“portion of boot data” of element 188.2. Settsu discloses that the OS main body
`
`is stored in compressed form on the disk and is transferred in “compressed form”
`
`into memory 2 [13:49-65, 14:30-37]. As shown in Settsu Fig. 14 each OS
`
`functional module is loaded into memory (ST181) and then subsequently
`
`decompressed (ST182) [14:13-37]. Thus, one of ordinary skill in the art would
`
`have understood that Settsu alone or in combination with Zwiegincew meets all
`
`the aspects of element 118.2.
`
`
`
`
`
`21
`
`
`
`
`
`[118.3] and wherein the preloading occurs during the same boot sequence in
`
`which a boot device controller receives a command over a computer bus to load
`
`the portion of boot data;
`
`42. The “boot sequence” of Settsu begins with the firmware 6 located in ROM 1
`
`loading the mini OS module 7 from the boot block 4 contained on boot device 3
`
`[Fig. 1, 7:65-8:23, 11:44-65, Fig. 4, 9:4-11]. Once the mini OS module 7 is
`
`loaded the code of the mini OS module 7 running on the information processing
`
`apparatus [Fig. 1] is the “boot device controller.” One of ordinary skill in the art
`
`would have understood this from comparing the operation and structure of the
`
`data storage controller 10. In the ‘862 the data storage controller 10 acts initially
`
`as a boot device controller because it is responsible for booting the operating
`
`system and any applications that must start immediately after power on or reset
`
`[‘862 Fig. 2, 9:4-14, 9:55-10:10]. Code stored in ROM 24 contains the code
`
`which performs the boot device function. One of ordinary skill in the art would
`
`have understood that while the data storage controller of the ‘862 has the well-
`
`known structure and organization of an information processing system, its
`
`character as a boot device controller comes from the programming contained in
`
`ROM 24. They would have understood this because the use of processors, such
`
`as DSP or processor 21 in device this configuration to perform more or less
`
`arbitrary functions is a basic concept of computer engineering. The ‘862 patent
`
`
`
`22
`
`
`
`
`
`recognizes this basic concept because directly under “Detailed Description of
`
`Preferred Embodiments” the ‘862 patent states:
`
`
`
`
`
`“It is to be further understood that the present invention may be
`
`implemented in various forms of hardware, software, firmware,
`
`or a combination thereof. Preferably, the present invention is
`
`implemented on a computer platform including hardware such
`
`as one or more central processing units (CPU) or digital signal
`
`processors (DSP), a random access memory (RAM), and
`
`input/output (I/O) interface(s).” [‘862 5:2-8]
`
`43. This simply confirms the understanding of one of ordinary skill in the art that
`
`CPUs, DSPs, microcomputers and so forth, when properly programmed, may
`
`perform specific special purpose functions. One of ordinary skill in the art would
`
`have understood this because not only is it basic computer engineering, but it is
`
`the foundational concept that gives programmable systems their power. Thus,
`
`one of ordinary skill in the art would have understood that mini OS module 7
`
`running on the information processing apparatus of Settsu is the required “boot
`
`device controller” of element 118.3.
`
`
`
`
`
`23
`
`
`
`44. In Settsu initialization of the system results in immediate execution of the
`
`
`
`firmware code module 6 in ROM 2. This module in turn loads the mini OS
`
`Module 7 from the boot block 4 on boot device 3. Once the mini OS module 7 is
`
`loaded the firmware code module 6 “transfers control” to the mini OS module 7
`
`[Figs. 1, Fig. 4, 8:8-13, 9:4-11]. One of ordinary skill in the art would have
`
`understood that in an information processing apparatus (Settsu’s term) that
`
`control is typically transferred to other parts of the program by a jump, a call, a
`
`signal or some other similar mechanism or that it would have been obvious to do
`
`so because this is basic computer engineering. One of ordinary skill in the art
`
`would have understood that transferring control with a jump, a call or a signal is a
`
`type of command at least because it initiates the execution of the target code.
`
`Thus, one of ordinary skill in the art would have understood that the mini OS
`
`module 7 of Settsu “receives a command… to load a portion of boot data “.
`
`Further, one of ordinary skill in the art would have understood that an
`
`information processing apparatus typically contains bus over which instructions
`
`(jumps, calls, signal etc.) are issued. This person would have understood this
`
`from their basic knowledge of computer engineering because computer busses
`
`and bus systems are a fundamental structure in almost all processors. Thus, one
`
`of ordinary skill in the art would have understood that in Settsu the mini OS
`
`
`
`24
`
`
`
`module “receives a command over a computer bus to load a portion of boot
`
`
`
`data”.
`
`
`
`45. In Settsu, the “boot sequence” begins with the execution of firmware code
`
`module 6 [8:8-13, 8:21-23, 9:4-11]. From Settsu, one of ordinary skill in the art
`
`would have understood that execution of the firmware code module leads directly
`
`to the loading and subsequent execution of the mini OS module as explained
`
`directly above [Fig. 4, 9:4-11]. The mini OS module proceeds to load the OS
`
`main body module, which one of ordinary skill in the art would have understood
`
`to be the “portion of boot data” as explained above with respect to element 118.1.
`
`
`
`46. In a system Settsu as modified by Zwiegincew one of ordinary skill in the art
`
`would have understood that the hard disk drive 127 (disk storage 230) would be
`
`controlled partially by software and partially by the hard disk drive interface 132
`
`[Zwiegincew Fig. 1, 4:47-65]. Thus, in the combination one of ordinary skill in
`
`the art would have understood that the “boot device controller” in the
`
`combination of Settsu with Zwiegincew would include the hard disk drive
`
`interface 123, mini OS module 7 and the processor of Settsu or processing unit
`
`121 of Zwiegincew. It would be clear to one of ordinary skill in the art that in the
`
`combination of Settsu with Zwiegincew that the hard disk drive interface 127
`
`
`
`25
`
`
`
`
`
`receives commands over the system bus 123 because the structure shown is a
`
`basic personal computer system and this is a commonly known aspect of such
`
`systems [3:57-59, 4:47-65] and thus would meet the requirements of element
`
`118.3.
`
`
`
`47. Thus, one of ordinary skill in the art would have understood that Settsu as
`
`modified by Zwiegincew meets all the requirements of element 118.3.
`
`
`
`[118.4] accessing the preloaded portion of the boot data in the compressed form
`
`from the volatile memory;
`
`48. In Settsu, the OS loading and decompression processing module 50 has the
`
`function of decompressing a loaded functional module of the OS main body
`
`module 8 [14:6-12]. Fig. 14 details this process [6:35-38]. Step ST181 the OS
`
`loading and decompression module 50 loads one of the compressed OS
`
`functional modules from the OS Main Body 8 in to memory 2 in compressed
`
`form [Fig. 14, 3:16-25, 14:17-28]. At Step ST182 the loaded functional module
`
`is decompressed [Fig. 14, 14:28-37]. One of ordinary skill in the art would have
`
`understood that in order to decompress information stored in memory 2 it would
`
`be necessary to access that memory because the decompression is carried out by
`
`a processor that is not a
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