Patent Database Search Results: apd/19760101->19980609 AND ICL/G11C07/00 OR IC...
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`Searching US Patent Collection...
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`Results of Search in US Patent Collection db for:
`(((APD/19760101->19980609 AND ICL/G11C07/00) OR ICL/G11C011/34) OR
`ICL/G11C013/00): 2952 patents.
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`apd/19760101->19980609 AND ICL/G11C07/00 OR I
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`Title
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`4 6,970,391
`
`PAT.
`NO.
`1 6,977,848 Data output control circuit
`2 6,977,840
`Storage element with a defined number of write cycles
`3 6,972,998 Double data rate memory devices including clock domain alignment circuits and
`methods of operation thereof
`Semiconductor device incorporating internal power supply for compensating for
`deviation in operating condition and fabrication process conditions
`5 6,970,383 Methods of redundancy in a floating trap memory element based field
`programmable gate array
`Semiconductor memory
`6 6,970,381
`7 6,967,876 Method for controlling programming voltage levels of non-volatile memory cells,
`the method tracking the cell features, and corresponding voltage regulator
`8 6,967,873 Memory device and method using positive gate stress to recover overerased cell
`9 6,967,868
`Semiconductor memory device having flexible column redundancy scheme
`10 6,967,866
`Semiconductor memory and semiconductor integrated circuit
`11 6,965,525
`Clock synchronized nonvolatile memory device
`12 6,963,508 Operation method for non-volatile memory
`13 6,963,504 Apparatus and method for disturb-free programming of passive element memory
`cells
`
`14 6,954,400
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`http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%...
`
`5/9/2017
`
`Limestone Memory Systems, LLC – Exhibit 2016, p. 1
`
`

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`Patent Database Search Results: apd/19760101->19980609 AND ICL/G11C07/00 OR IC...
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`Page 2 of 3
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`Memory system, method and predecoding circuit operable in different modes for
`selectively accessing multiple blocks of memory cells for simultaneous writing or
`erasure
`15 6,954,385 Method and apparatus for sensing resistive memory state
`16 6,952,365
`Reducing the effects of noise in non-volatile memories through multiple reads
`17 6,950,348
`Source controlled operation of non-volatile memories
`18 6,947,331 Method of erasing an EEPROM cell utilizing a frequency/time domain based erased
`signal
`19 6,947,321 Organic thin-film switching memory device and memory device
`20 6,944,054 NRAM bit selectable two-device nanotube array
`21 6,944,042 Multiple bit memory cells and methods for reading non-volatile data
`22 6,944,041
`Circuit for accessing a chalcogenide memory array
`23 6,940,761 Merged MOS-bipolar capacitor memory cell
`24 6,940,751 High density semiconductor memory cell and memory array using a single transistor
`and having variable gate oxide breakdown
`Circuit and method for programming charge storage memory cells
`25 6,937,511
`3-transistor OTP ROM using CMOS gate oxide antifuse
`26 6,927,997
`27 6,925,523 Managing monotonically increasing counter values to minimize impact on non-
`volatile storage
`Stacked memory device having shared bitlines and method of making the same
`28 6,925,015
`Programming flash memories
`29 6,925,011
`Segmented metal bitlines
`30 6,922,358
`31 6,922,356 Method of operation for a programmable circuit
`32 6,922,355
`Thin film magnetic memory device capable of conducting stable data read and write
`operations
`Semiconductor memory device with modified global input/output scheme
`Semiconductor memory device with structure of converting parallel data into serial
`data
`35 6,914,819 Non-volatile flash memory
`36 6,912,156
`Clock synchronized nonvolatile memory device
`37 6,912,148 Magnetic semiconductor memory and the reading method using spin-polarized
`electron beam
`Chalcogenide glass constant current device, and its method of fabrication and
`operation
`Block select circuit in a flash memory device
`39 6,909,640
`Programmable memory cell using charge trapping in a gate oxide
`40 6,909,635
`Band-gap voltage reference
`41 6,906,956
`Semiconductor memory device
`42 6,903,973
`43 6,903,967 Memory with charge storage locations and adjacent gate structures
`44 6,898,125
`Semiconductor device and method for driving the same
`45 6,898,118
`Clock synchronized non-volatile memory device
`46 6,898,116
`
`33 6,920,068
`34 6,914,828
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`38 6,912,147
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`http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%...
`
`5/9/2017
`
`Limestone Memory Systems, LLC – Exhibit 2016, p. 2
`
`

`

`Patent Database Search Results: apd/19760101->19980609 AND ICL/G11C07/00 OR IC...
`
`Page 3 of 3
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`High density semiconductor memory cell and memory array using a single transistor
`having a buried N+ connection
`47 6,894,928 Output voltage compensating circuit and method for a floating gate reference
`voltage generator
`48 6,894,927 Data writing and reading methods for flash memories and circuitry thereof
`49 6,891,744
`Configurable nanoscale crossbar electronic circuits made by electrochemical
`reaction
`Electric-field actuated chromogenic materials based on molecules with a rotating
`middle segment for applications in photonic switching
`
`50 6,888,978
`
`http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%...
`
`5/9/2017
`
`Limestone Memory Systems, LLC – Exhibit 2016, p. 3
`
`