United States Patent [19]
`Bond et al.
`
`[54] SCRAMBLING AND UNSCRAMBLING
`VIDEO SIGNALS IN A PAY TV SYSTEM
`
`[75]
`
`Inventors: John A. Bond; Yuan-Lu Li, both of
`Ottawa; Leslie J. Crane, Nepean, all
`of Canada
`
`[73] Assignee: Northern Telecom Limited, Montreal,
`Canada
`
`[21] Appl. No.: 246,878
`
`[22] Filed:
`
`Mar. 23, 1981
`
`[51]
`Int. Cl.3 ............................................... H04N 7/16
`[52] u.s. Cl •.................................... 358/119; 358/120;
`358/123
`[58] Field of Search ................ 358/119, 120, 122, 123
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`2,972,008 2/1961 Ridenour et a!. ................... 358/123
`3,184,537 5/1965 Court eta!. .......................... 178/5.1
`3,313,880 4/1967 Bass ...................................... 178/5.1
`3,813,482 5/1974 Blonder ................................ 178/5.1
`4,081,832 3/1978 Sherman ............................. 358/124
`4,163,254 7/1979 Block eta!. ......................... 358/122
`4,266,243 5/1981 Shutterly ............................. 358/120
`4,333,107 6/1982 McGuire ............................. 358/122
`4,338,628 7/1982 Payne eta!. ........................ 358/122
`
`[11]
`
`[45]
`
`4,390,898
`Jun.28, 1983
`
`OTHER PUBLICATIONS
`NASA Tech Brief, vol. 3, No. 1, MSC-16843, Spring
`1978.
`Primary Examiner-S. C. Buczinski
`Attorney, Agent, or Firm-R. Haley Haley
`ABSTRACT
`[57]
`A scrambler scrambles a video signal by replacing its
`vertical intervals with dummy video signal lines, and
`separately providing information relating to the timing
`of the replaced vertical intervals. This information is
`encoded using an encryption key and is distributed with
`the scrambled video signal by modulation of the hori(cid:173)
`zontal sync. pulses of the scrambled video signal. An
`unscrambler derives the information from the horizon(cid:173)
`tal sync. pulses, which it regenerates, and decodes the
`information and uses it to generate a vertical interval of
`correct timing to replace the dummy lines of the scram(cid:173)
`bled video signal, thereby producing an unscrambled
`video signal reproducible on a conventional TV re(cid:173)
`ceiver. The scrambling is further enhanced by varying
`the number of dummy lines which are used to replace
`different vertical intervals, thereby producing a video
`signal of variable field length, which is not susceptible
`of recording.
`
`16 Claims, 9 Drawing Figures
`
`VIDEO 1---- FIELD n ----o-1--- FIELD n+l - - . . f - - - FIELD n+2 -----1
`INCOMING
`f--D--1
`SCRAMBLED
`- - - -+ - - -F IELD n+ l - - - t - - - - FIELD n+2 ----i
`VIDEO
`-i (nY2) I-
`-i (nY3) I-
`I R I v I p I c I
`I R I v I p I
`( n•S l
`
`( n+4)
`
`NOISE
`
`DATA
`
`NOISE
`
`NOISE
`
`APPLE EX. 1024
`Page 1
`
`

`
`U.S. Patent
`
`Jun. 28, 1983
`
`Sheet 1 of 6
`
`4,390,898
`
`PROGRAM
`SOURCE
`
`AUDIO
`
`~
`
`/o
`
`VIDEO
`
`TRANSMITTER
`
`SCRAMBLER
`
`t IZ
`
`SCRAMBLED
`VIDEO
`
`/~
`
`ENCRYPTION
`a PROGRAM
`DATA
`
`CABLE
`
`;1
`
`CHANNEL
`CONVERTER
`
`/~
`
`19--- UNSCRAMBLER I-- T.V.
`;5
`
`INTERFACE
`
`2().-..
`
`CONTROL,DATA
`21 ............ COLLECTION,
`a BILLING
`CENTRE
`
`22
`~'"'-
`
`INTERFACE
`
`I TELEPHONE
`I CENTRAL
`OFFICE
`
`)
`/8
`
`FIG.
`
`90
`f
`
`PROGRAM
`SOURCE
`
`CONTROL
`a SYNC.
`GENERATOR
`
`9t
`
`AUDIO
`
`VIDEO
`
`9~
`
`I
`95;
`VIDEO
`BLANKING
`LEVEL
`
`y
`
`/6
`IT
`
`TO TRANSMITTER
`
`SELECTOR
`
`SCRAMBLED
`
`VIDEO
`
`93
`
`DATA
`PROCESSOR
`
`9'2
`
`DATA FROM
`INTERFACE
`
`FIG. 9
`
`APPLE EX. 1024
`Page 2
`
`

`
`U.S. Patent
`
`Jun. 28, 1983
`
`Sheet 2 of 6
`
`4,390,898
`
`VIDEO
`
`INPUT l
`
`FILTER
`
`1--200
`
`2~2
`
`203
`I
`
`SCRAMBLED
`VIDEO
`OUTPUT
`
`t
`FILTER a
`EQUALIZER
`
`208-
`
`VIDEO
`BLANKING
`LEtL 2?6
`
`20~ t
`LATCH a
`D-A
`CONVERTER
`
`A-D
`~
`CONVERTER
`a LATCH
`fs
`
`TIMING
`EXTRACTOR
`
`,______
`
`201
`
`1----
`
`MEMORY
`UNIT
`
`f..-
`
`SELECTOR 1--
`
`Hs
`
`• •
`I
`+
`
`CONTROL
`CIRCUIT
`
`204
`
`--
`
`•
`I
`
`+
`DATA
`PROCESSOR
`
`t 2o5
`
`DATA FROM
`INTERFACE
`
`FIG. 2
`
`VIDEO
`IN
`
`303
`
`SYNC
`SEPARATOR
`
`304
`
`LINE
`COUNTER
`
`BURST
`EXTRACTOR
`
`BURST
`P.L.L.
`
`fb
`
`300
`
`301
`
`P.L.L.
`a
`FREQUENCY
`DIVIDERS
`
`302
`
`FIG. 3
`
`ff 305 olE
`
`FIELD
`COUNTER
`
`f = 10 fb
`
`f 5 =4fb
`fl=fs/13
`fh
`NG
`
`APPLE EX. 1024
`Page 3
`
`

`
`~
`Cl'.l .
`
`402 ~
`
`400 ''\
`
`403 ''\
`
`404 '"'\
`
`t
`
`SHIFT
`REGISTER
`
`f fs
`
`!
`
`LATCH
`
`tfl
`
`ECLITTL
`CONVERTERS
`a RAMS
`
`LATCH
`
`SHIFT
`REGISTER
`
`DIGITAL
`SCRAMBLED
`VIDEO
`OUTPUT
`
`J------------t ..,
`ADDRESS a CONTROL
`SIGNALS FROM
`CONTROL CIRCUIT
`
`t
`
`'fl
`
`f fs
`
`I•
`FIELD n ___ __.,.-.. ___ FIELD n+l - - - - t - - - - FIELD n+2 ___ ..,.
`1--D-1
`t - - - - - FIELD n ----+----FIELD n+l----+--1---- FIELD n+2
`--i l ~) I-
`--l ( n~2) 1--
`--i ( n~l ) 1--
`l R I v I p I c I
`I R I v I p I c I
`I R I v I p I c I
`
`•I
`--l ( nY3) 1--
`I R I v I p I
`
`NOISE
`
`NOISE
`
`NOISE
`
`CHECK
`BITS (C)
`
`NOISE
`
`DIGITAL
`VIDEO
`INPUT
`401-
`
`FIG. 4
`
`INCOMING
`VIDEO
`
`SCRAMBLED
`VIDEO
`
`DATA
`
`FIG. 7
`
`APPLE EX. 1024
`Page 4
`
`

`
`ADDRESS a CONTROL
`SIGNALS TO MEMORY UNIT
`~
`
`PROM
`
`----~SELECTOR
`
`fh
`
`SELECT
`
`N/V
`
`EQ
`
`MICROPROCESSOR
`
`506
`
`505
`
`FIG. 5
`
`APPLE EX. 1024
`Page 5
`
`

`
`U.S. Patent
`
`Jun. 28, 1983
`
`Sheet 5 of 6
`
`4,390,898
`
`FIELD n
`
`OUTPUT DATA
`FOR FIELD n+2
`TO LATCH 523
`
`READ 0/E, R.N.
`SOURCE, a ENC.
`KEY, P. DATA,
`a REF. WORD
`FROM LATCHES
`524
`
`CALCULATE,
`FOR FIELD n+3 1
`VERT. TIMING
`DATA a OFFSETS
`a ADDRESSES
`FOR LATCHES
`
`ENCODE AND
`FORMAT DATA
`
`CLEAR FLAG
`
`OUTPUT N/V,
`OFFSET TO
`LATCH 511,
`a ADDRESS
`TO LATCH
`515
`
`607
`
`OUTPUT N/V,
`OFFSET TO
`LATCH 510,
`a ADDRESS
`TO LATCH
`515
`
`READ START
`ADDRESS FROM
`LATCH 520.
`SET FLAG
`
`FIG. 6
`
`APPLE EX. 1024
`Page 6
`
`

`
`U.S. Patent
`
`Jun. 28, 1983
`
`Sheet 6 of 6
`
`4,390,898
`
`MODULATOR
`a VSB
`FILTER
`
`8/0-
`
`-:-850
`
`807-
`
`SELECTOR
`
`STRIP a
`REINSERT
`
`809
`
`l805
`832) 83~ 834-...,
`I
`/
`
`/
`
`H. SYNC. ~ 8J7
`835 J
`
`R.F.
`
`INPUT
`
`1
`./-8oo · R.F. OUTPUT
`
`·....,--
`808
`8291
`U-
`
`836 r8
`¢l
`
`R.F. AMP. 1-80/
`DEMO D.
`D.C. REST.
`
`~802
`
`H. SYNC.
`SEPARATOR
`
`03
`8
`
`TIMING
`CIRCUIT
`
`811-i 8/3-
`
`1--804
`
`CK
`FLIP-
`r-D FLOP
`Q
`
`821 1
`
`SHIFT
`f-----. REGISTER
`8/27l·-----T
`LATCH ~ 823-o
`8/4_; --------------.. ----1
`
`INT.
`
`MICROPROCESSOR
`
`15.../
`8
`
`t
`
`REF.
`WORD
`
`DE! ICE
`CODE
`
`1-820
`8J6
`8/8
`)
`
`'
`
`COUNTER
`CK I-
`
`PROGRAM MONTHLY
`CODE
`DATA
`
`8/9_;
`
`FIG. 8
`
`830
`-83/
`
`8i9SJ-
`-:-822
`
`f-
`
`f-
`
`COUNTER
`
`CK
`
`827;:
`
`826
`
`) 828-
`
`825-
`
`Q
`
`FLIP- R r-
`FLOP
`s
`
`1
`817.../ L
`
`LATCH
`
`COMP.
`
`r7
`824
`
`APPLE EX. 1024
`Page 7
`
`

`
`1
`
`4,390,898
`
`SCRAMBLING AND UNSCRAMBLING VIDEO
`SIGNALS IN A PAY TV SYSTEM
`
`2
`use of such a highly secure coding scheme does not
`alone assure the security of the pay TV system. On the
`contrary, the highly structured nature and information
`redundancy in the scrambled signal(s) of the known
`scrambling schemes discussed above makes it possible
`This invention relates to subscription television (pay
`for unauthorized persons to effect unscrambling di-
`TV) systems, and is particularly concerned with a
`method of and apparatus for scrambling and unscram-
`rectly from the scrambled signal(s), by-passing any
`coding scheme which may be used. In this respect, it is
`bling video signals for use in such systems.
`observed that in the known scrambling schemes there is
`It is known in the art of pay TV systems to scramble
`a video signal before broadcasting it, with the intent 10 a high correlation from line to line and from field to
`that only authorized persons, equipped with an appro-
`field in the scrambled video signal, which correlation
`priate unscrambler, should be able to unscramble the
`may be utilized to facilitate unscrambling by unautho-
`video signal for viewing on a conventional television
`rized persons.
`receiver, in return for payment of a fee. The video
`Accordingly, a need exists to provide a more secure
`signal may be scrambled in a variety of ways, with or 15 video signal scrambling scheme, which is less suscepti-
`without simultaneous scrambling of the accompanying
`ble to direct unscrambling and which can be used in
`audio signal. For example, Court et al. U.S. Pat. No.
`conjunction with a secure coding scheme to facilitate
`3,184,537, issued May 18, 1965 discloses a pay TV sys-
`provision of a secure pay TV system. An object of this
`tern in which video signal scrambling is effected by
`invention is to provide a method of and apparatus for
`suppressing to a constant grey level horizontal and 20 scrambling a video signal in a pay TV system by means
`vertical synchronizing (sync) signals and blanking inter-
`of which this need may be fulfilled. Further objects are
`vals, unscrambling being enabled by composite sync
`to provide a method of and apparatus for unscrambling
`pulses which are modulated upon the normal audio
`the scrambled video signal, and to provide a pay TV
`carrier. Bass U.S. Pat. No. 3,313,880 discloses a pay TV
`system embodying such scrambling and unscrambling
`system in which the nature of the ordinary sync signals 25 apparatus.
`is changed, and additional signals having the nature of
`According to one aspect this invention provides a
`the ordinary sync signals but having a different timing
`method of scrambling a video signal, comprising video
`are transmitted as part of the video signal to produce
`signal lines and vertical intervals, to produce a scram-
`unsynchronized operation of television receivers not
`bled video signal, said method comprising replacing
`equipped with unscramblers. Blonder U.S. Pat. No. 30 each vertical interval by dummy video signal lines and
`3,813,482 issued May 28, 1974 discloses a pay TV sys-
`separately providing information relating to the timing
`tern in which scrambling of the video signal is effected
`of the replaced vertical intervals of the scrambled video
`by alternately depressing and not depressing to blanking
`signal, wherein different numbers of dummy video sig-
`level, at a rate of about 10 Hz, the vertical sync signals
`nal lines are used to replace different vertical intervals,
`to produce a shifting, rolling picture on an unauthorized 35 whereby the field length of the scrambled video signal
`television receiver, a keying signal for unscrambling the
`is varied.
`video signal at an authorized receiver being modulated
`Thus the conventional vertical synchronizing infor-
`mation of the video signal is completely replaced, in the
`on the audio carrier.
`Such known pay TV systems have the disadvantage
`scrambled video signal, by dummy video signal lines
`that the security of the system exists entirely in the 40 which are indistinguishable by a conventional television
`scrambling scheme. In other words, anyone acquiring
`receiver from the normal video signal lines of the video
`or making an appropriate unscrambler can unscramble
`signal. In consequence, without unscrambling, a televi-
`the scrambled signal(s) without payment of any fee. In
`sion receiver supplied with the scrambled video signal
`order to provide a more secure pay TV system, which
`would produce a vertically unsynchronized and un-
`makes it more difficult to unscramble the scrambled 45 watchable picture.
`signal(s) without payment of fees, it is known to supply
`The separately provided information conveniently
`a code periodically and separately from the broadcast
`indicates the start of each replaced vertical interval, and
`video signal to authorized subscribers of the pay TV
`is conveniently provided as part of the scrambled video
`system, which code must be compared with a code
`signal. Preferably the information is modulated onto
`broadcast with the scrambled video signal in order to 50 horizontal line synchronizing information forming a
`enable unscrambling. For example the separately sup-
`part of each video signal line. In this case the scrambled
`plied code can be supplied monthly to each authorized
`video signal reproduced on a conventional television
`subscriber by mail in a system as described in Sherman
`receiver without unscrambling is not only vertically
`U.S. Pat. No. 4,081,832 issued Mar. 28, 1978 or via a
`unsynchronized but also largely horizontally unsyn-
`non-dedicated telephone line in a system as described in 55 chronized, making it even more unwatchable.
`Block et al. U.S. Pat. No. 4,163,254 issued July 31, 1979.
`In order to provide further security to a pay TV
`The security of such systems exists partly in the coding
`system using this method of scrambling, the information
`scheme and partly in the scrambling scheme.
`is preferably encoded in accordance with an encryption
`As disclosed in a co-pending application Ser. No.
`key, which can be recurrently changed and provided
`251,085 by Y. J. Aminetzah filed on Apr. 6, 1981 and 60 only to authorized subscribers of the pay TV system to
`entitled "Method of Controlling Scrambling and Un-
`enable proper unscrambling of the scrambled video
`scrambling in a Pay TV System", the entire disclosure
`signal.
`of which is hereby incorporated herein by reference,
`The use of different numbers of dummy video signal
`the coding scheme used in a pay TV system can be
`lines to replace different vertical intervals inhibits unau-
`made highly secure, so that it is difficult or impossible 65 thorized unscrambling of the scrambled video signal by
`for unauthorized persons to gain access within a reason-
`persons using a known form of vertical interval genera-
`able time to a proper code to effect unscrambling of the
`tor to synchronize a conventional television receiver to
`scrambled signal(s) in the normal manner. However, the
`receive the scrambled video signal. The scrambled
`
`APPLE EX. 1024
`Page 8
`
`

`
`4,390,898
`
`3
`video signal consequently has a non-standard and vari(cid:173)
`able lield length, rendering unauthorized unscrambling
`in this manner ineffective in vertically synchronizing
`the resultant picture. A further advantage provided in
`this respect is that the video signal, even after proper,
`authorized, unscrambling, has a variable field length
`which inhibits proper operation of a video signal re(cid:173)
`corder which may be used to try to record the video
`signal for subsequent use or duplication.
`According to another aspect, the invention provides 10
`a method of scrambling a video signal, comprising
`video signal lines and vertical intervals, to produce a
`scrambled video signal which comprises said video
`signal lines and dummy video signal lines in place of
`said vertical intervals, said method comprising the steps 15
`of: storing the video signal lines of the video signal to be
`scrambled sequentially in a memory and reading them
`sequentially from the memory to constitute the video
`signal lines of the scrambled video signal; re-reading
`video signal lines from the memory to produce said 20
`dummy video signal lines of the scrambled video signal,
`different numbers of video signal lines being re-read
`from the memory to produce dummy video signal lines
`to replace different vertical intervals, whereby the field
`length of the scrambled video signal is varied; and sepa- 25
`rately providing information relating to the timing of
`the replaced vertical intervals.
`In accordance with another aspect of the invention,
`there is provided apparatus for scrambling a video sig(cid:173)
`nal, comprising video signal lines and vertical intervals, 30
`to produce a scrambled video signal, said apparatus
`comprising: a memory unit; means for storing the video
`signal lines sequentially in the memory unit; means for
`providing an indication of the timing of each vertical
`interval relative to the video signal lines stored in the 35
`memory unit; means for reading the video signal lines
`sequentially from the memory unit, the reading means
`being responsive to said indication to re-read video
`signal lines from the memory unit to produce dummy
`video signal lines in place of each vertical interval, the 40
`reading means re-reading different numbers of video
`signal lines to replace different vertical intervals; said
`video signal lines sequentially read from the memory
`unit and said dummy video signal lines constituting the
`scrambled video signal; and means for providing infor- 45
`mation relating to the timing of each replaced vertical
`interval of the scrambled video signal.
`The apparatus preferably includes means for selec(cid:173)
`tively removing horizontal line synchronizing pulses
`from the video signal lines of the scrambled video signal 50
`in dependence upon said information.
`According to yet another aspect, the invention pro(cid:173)
`vides a subscription television system comprising: a
`scrambling apparatus comprising means for replacing
`each vertical interval of a video signal, comprising 55
`video signal lines and vertical intervals, by a plurality of
`dummy video signal lines to produce a scrambled video
`signal, different vertical intervals being replaced by
`different numbers of dummy video signal lines whereby
`the scrambled video signal has a variable field length, 60
`and means for providing information relating to the
`timing of each replaced vertical interval of the scram(cid:173)
`bled video signal; means for distributing said scrambled
`video signal and said information to at least one un(cid:173)
`scrambling apparatus; and at least one said unscram- 65
`bling apparatus comprising means responsive to said
`information for generating vertical intervals each hav(cid:173)
`ing a timing coincident with the timing of said dummy
`
`4
`video signal lines of the scrambled video signal, and
`means for replacing said dummy video signal lines of
`the scrambled video signal by said vertical intervals to
`produce an unscrambled video signal.
`Preferably, said scrambling apparatus comprises
`means for modulating horizontal line synchronizing
`pulse~ of the video signal lines of the scrambled video
`signal with said information, whereby the distributing
`means distributes said information as part of the scram(cid:173)
`bled video signal with which it is supplied, and said
`unscrambling apparatus comprises means for deriving
`said information from the horizontal line synchronizing
`pulses of the video signal lines of the scrambled video
`signal and for regenerating said horizontal line synchro(cid:173)
`nizing pulses.
`The invention will be further understood from the
`following description with reference to the accompany(cid:173)
`ing drawings, in which:
`FIG. 1 illustrates a pay TV system including a scram(cid:173)
`bler and an unscrambler which operate in accordance
`with this invention;
`FIG. 2 shows a block diagram of the scrambler which
`includes a timing extractor, a memory unit, a control
`circuit, and a data processor;
`FIG. 3 shows a block diagram of the timing extractor;
`FIG. 4 shows a block diagram of the memory unit;
`FIG. 5 shows a block diagram of the control circuit
`and the data processor;
`FIG. 6 is a flow chart illustrating the operation of the
`data processor;
`FIG. 7, which is on the same sheet as FIG. 4, is a
`timing diagram illustrating the format of data which is
`transmitted with the scrambled video signal;
`FIG. 8 shows a block diagram of the unscrambler;
`and
`FIG. 9, which is on the same sheet as FIG. 1, shows
`a block diagram of a simplified form of scrambler spe(cid:173)
`cifically for use where the TV program source is at the
`same location as the scrambler.
`Referring to FIG. 1, there is shown therein parts of a
`pay TV system in which video signals from a program
`source 10 are scrambled in a scrambler 11, the resultant
`scrambled video signals and audio signals from the pro(cid:173)
`gram source being supplied to a transmitter 12 for
`broadcasting to subscribers of the pay TV system. As
`shown, the audio signals are not scrambled, but they
`could also be scrambled in known manner if desired.
`The audio signal path from the program source 10 to
`the transmitter 12 may also include a delay unit, (not
`shown), for example providing a signal delay of 30 ms,
`(the duration of one television field), to keep the timing
`of the transmitted audio signals matched to the average
`timing of the scrambled video signals. The broadcast
`signals are illustratively supplied to a subscriber's home
`via a cable 13, but they could alternatively be supplied
`by electromagnetic radiation, directly or via a satellite
`link.
`The subscriber's home includes a conventional chan(cid:173)
`nel converter 14, television receiver 15, and telephone
`16, the latter being connected via a conventional tele(cid:173)
`phone line 17 to a telephone central office 18. An un(cid:173)
`scrambler 19 is coupled between the output of the chan(cid:173)
`nel converter 14 and the input of the television receiver
`15, and is also coupled via an interface circuit 20 to the
`telephone line 17. The interface circuit 20 is preferably
`of the type described in a co-pending patent application
`Ser. No. 247,229, filed on Mar. 25, 1981 by T. H. Murto
`and S. D. Alvey, entitled "Interface Circuits for Con-
`
`APPLE EX. 1024
`Page 9
`
`

`
`4,390,898
`
`.5
`nection to Non-Dedicated Telephone Lines", the entire
`disclosure of which is hereby incorporated herein by
`reference.
`The pay TV system also includes a control, data
`collection, and billing centre 21, which can be located at
`the program source 10, scrambler 11, and transmitter
`12, or at the telephone central office 18, or separately
`from both. In any event the centre 21 is coupled via an
`appropriate interface 22 to the telephone central office
`18 for communicating recurrently with each unscram(cid:173)
`bler 19 via the relevant telephone line 17, and is cou(cid:173)
`pled, either permanently or when required via a tele(cid:173)
`phone or data transmission line, to the scrambler 11 for
`supplying encryption and program data thereto. As an
`alternative, the program data may instead originate in
`the program source 10, and be supplied from there to
`both the scrambler 11 and the centre 21.
`The centre 21 recurrently, for example monthly,
`supplies encryption and program data to the scrambler
`11, which scrambles the video signals supplied to it in 20
`the manner described below and in dependence upon
`the encryption data, and also inserts the program data
`into the scrambled video signals. In order to enable each
`authorized unscrambler 19 to unscramble the scrambled
`signals when desired, the centre 21 periodically supplies 25
`thereto, via the interfaces 22 and 20 and via the tele(cid:173)
`phone central office 18, a code (monthly code) which in
`conjunction with a device code individual to the sub(cid:173)
`scriber enables proper operation of the unscrambler.
`This coding scheme is described fully in the co-pending
`application by Y. T. Aminetzah already referred to, to
`which reference is directed in this respect.
`FIG. 2 shows a block diagram of the scrambler 11.
`The video input signal from the program source 10 is
`conducted via a 4.2 MHz low-pass anti-aliasing fJJ.ter 35
`200 to a timing extractor 201 and to the input of an
`analog-digital (A-D) converter and latch 202. The A-D
`converter samples the analog video signal at a fre(cid:173)
`quency fs, supplied by the timing extractor 201, and
`equal to four times the video signal color subcarrier 40
`frequency fb, and linearly converts each sample into an
`8-bit digital value which is stored in the latch. This
`gives 910 digital samples per horizontal line, for an
`NTSC video signal for which the color subcarrier fre(cid:173)
`quency fb is 3.579545 MHz. These digital samples are 45
`written into, and subsequently read from, a memory
`unit 203 under the control of a control circuit 204 and a
`data processor 205. A selector 206 is controlled by the
`processor 205 to supply either the digital samples read
`from the memory unit 203 or a digital video blanking 50
`level to a latch and digital-analog converter 207, which
`operates at the frequency fs to latch the digital values
`supplied thereto and to convert them into an analog
`video signal. This analog video signal is filtered and
`equalized in a 4.2 MHz low-pass filter and a (sin x)/x 55
`equalizer, shown as a single block 208, whose output
`constitutes the scrambled video output signal. The tim(cid:173)
`ing extractor 201 supplies various timing signals to the
`units 203, 204, and 205, as well as the signal fs to the
`units 202 and 207. The data processor 205 is supplied 60
`with the encryption and program data from an interface
`(not shown) which is coupled to the centre 21.
`The timing extractor 201 is shown in greater detail in
`FIG. 3. A color burst extractor 300 extracts the color
`burst from each horizontal line of the incoming video 65
`signal and supplies it to a color burst phase locked loop
`(PLL) 301, which regenerates the color burst frequency
`fb. This is supplied to a further PLL including an oscil-
`
`6
`lator having a frequency 40 fb, whose output is fre(cid:173)
`quency divided to produce the various frequency sig(cid:173)
`nals indicated in FIG. 3 and described below. This
`further PLL and the frequency dividers are shown as a
`single block 302. The incoming video signal is also
`supplied to a sync separator 303, which derives the
`composite sync signals from the video signal and trig(cid:173)
`gers a line counter 304 to count the horizontal lines of
`each field. The output signal ff of the line counter 304,
`10 which is a logic 0 during each vertical interval, is fre(cid:173)
`quency-divided by two in a field counter 305 to produce
`a signal 0/E which changes state each field, and whose
`state thus corresponds to the phase of the color burst of
`the incoming video signal. The counters 304 and 305 are
`15 synchronized by a signal f produced in the block 302
`and having ten times the color subcarrier frequency fb.
`The block 302 also produces the signal fs=4 fb already
`described, a signal fl having a frequency which is one-
`thirteenth the frequency fs, a signal fh having the hori(cid:173)
`zontal line frequency, and a signal NG also having the
`horizontal line frequency and which is a logic 0 during
`each horizontal line sync pulse of the video signal. Thus
`the various timing signals have the following frequen(cid:173)
`cies:
`f=35.79544 MHz
`fs=14.31818 MHz
`fl=l.1014 MHz
`fh=NG= 15.734 kHz
`ff=59.94 Hz
`30 O/E=29.97 Hz
`FIG. 4 illustrates the memory unit 203 in greater
`detail. This unit comprises 104 TTL 64 kbit RAMs
`(random access memories), together with associated
`ECL to TTL and TTL to ECL converters, shown as a
`single block 400. The RAMS are cyclically controlled
`and addressed, by address and control signals supplied
`by the control unit 204, for write-in and read-out of the
`digital video signal. In view of the relatively slow speed
`of each memory access cycle, the digital video signal is
`written into and read from the RAMs 13 8-bit words at
`a time, 1 bit of each word being written into or read
`from a respective one of the 104 RAMS. Accordingly,
`the 8-bit video signal words from the A-D converter
`and latch 202 are shifted into a shift register 401 under
`the control of the signal fs, and the words are trans(cid:173)
`ferred 13 at a time to a latch 402 under the control of the
`signal fl, to be written into the RAMs. Conversely, the
`8-bit words are read out from the RAMs and stored in
`an output latch 403 13 at a time under the control of the
`control circuit 204, and are loaded in parallel from the
`latch 403 into a shift register 404 under the control of
`the signal fs to constitute the digital scrambled video
`output of the memory unit 203. The number of 13 words
`written into and read from the RAMs is selected in view
`of the speed of the RAMs and the number of 910 sam(cid:173)
`ples per horizontal line of the video signal, to provide a
`convenient number of 70 memory access cycles each
`horizontal line.
`The control circuit 204 is shown to the left, and the
`data processor 205 is shown to the right, of a broken line
`500 in FIG. 5. The control circuit 204 includes a modu(cid:173)
`lo-65 counter 501, a PROM 502, and a latch 503 for
`producing control signals and selecting address signals,
`by means of an address selector 504, for each memory
`access cycle. The counter 501 is clocked by the signal f
`to increment its count, and for each count the PROM
`502 is addressed to produce a set of control signals
`which are latched in the latch 503 under the control of
`
`APPLE EX. 1024
`Page 10
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`
`7
`the signal f. The control signals in the latch 503 control
`the cyclical operation of the RAMs (block 400) and
`latch 403 of the memory unit and the selection of a write
`address from a bus 505 or a read address from a bus 506
`for supply to the RAMs.
`The write address on the bus 505 is produced by a
`16-bit synchronous counter 507 which is clocked by the
`signal fl, so that the incoming video signal words are
`written cyclically into successive memory locations.
`The read address on the bus 506 is produced by adding 10
`to the current write address, in a modulo 216 adder 508,
`an offset which is selected by a selector 509 from a latCh
`510 or a latch 511, and latching the sum in a latch 512
`under the control of the signal fl. The selector 509 is
`controlled by a signal 'SELECT' produced at the Q 15
`output of a D-type flip-flop 513, which signal is also
`supplied to a microprocessor 514 in the data processor
`205. The microprocessor 514 supplies the offsets to the
`latches 510 and 511, and supplies a read address to a
`latch 515, via a common bus 516 under the control of 20
`respective latch loading signals on lines 517. The micro(cid:173)
`processor also supplies a signal N/V to the data input D
`of the flip-flop 513. A comparator 518 compares the
`read address on the bus 506 with the read address stored
`in the latch 515 and, when the compared addresses are 25
`the same, produces an output signal which is gated with
`the signal fl in an AND gate 519 to produce a signal EQ
`which is supplied to the clock input CK of the flip-flop
`513 and as an interrupt signal to the microprocessor 514.
`The microprocessor 514 is also supplied with a vertical 30
`interval start address from a latch 520; this is the write
`address on the bus 505 which exists at the start of a
`vertical interval of the video signal and which is latched
`in the latch 520 under the control of the signal ff.
`The components 507 to 520 of the control circuit 204 35
`and the data processor 205 operate as follows. As al(cid:173)
`ready explained, the incoming video signal words are
`written cyclically into the memory, and the start ad(cid:173)
`dress of each vertical interval is stored in the latch 520.
`Reading from the memory of the video signal words of 40
`picture lines (i.e. lines not in the vertical interval) takes
`place sequentially after a delay, or offset, which is deter(cid:173)
`mined by the contents of the latch 510. Accordingly,
`during such reading, with the signals EQ=O, N/V =0,
`and SELECT= 1, the selector 509 is controlled to sup- 45
`ply the offset from the latch 510 to the adder 508, where
`this offset is added to the write address to produce the
`read address. The offset is stored in the latch 510 by the
`microprocessor 514 as described below, and is an inte(cid:173)
`gral multiple of 70 so that video signal lines are read 50
`from the memory a whole number of line periods after
`being written into the memory.
`The microprocessor 514 also stores a different offset,
`again an integral multiple of 70, in the latch 511, and
`stores the vertical interval start address, obtained from 55
`the latch 520, in the latch 515. Accordingly, with con(cid:173)
`tinued reading from the memory, the comparator 518
`eventually detects equality of the read address and the
`address in the latch 515, in response to which the signal
`EQ becomes 1 and then again becomes 0 with the next 60
`falling edge of the signal fl supplied to the gate 519. This
`1-to-0 transition of the signal EQ triggers the flip-flop
`513 via its cl~k input CK, to transfer the logic level of
`the signal N/V at its D input to its Q output, so that the
`singal SELECT becomes 0, and also constitutes an 65
`interrupt to the microprocessor 514. In response to the
`interrupt, the microprocessor 514 reads the state of the
`signal SELECT, supplies a new address to the latch
`
`4,390,898
`8
`515, and sets the signal NiV to 1 (opposite to the new
`state of the signal SELECT). The new address which is
`latched in the latch 515 is different from the current
`read address, which is now offset from the write address
`by the offset contained in the latch 511 which with the
`signal SELECT=O is selected by the selector 509. The
`comparator 518 no longer detects equality and the sig(cid:173)
`nal EQ remains 0.
`The offset stored in the latch 511 is selected so that
`now picture signal lines from another part of the mem(cid:173)
`ory are read out instead of the vertical interval signals.
`The address which is stored in the latch 515 is selected
`in relat