throbber
69.0)
`
`Europaisohes Patent'an'lt
`
`European Patent Office
`
`Ofiloe européen des brevets
`
`61 Publication number:
`
`0 1GB 441 BI
`

`
`EUROPEAN PATENT SPECIFICATION
`
`Date of publication of patent specification: 04.03.92
`
`Int. Gl.-'-.- HO4L 121’28, GOSF 18/42,
`GOSF 1 511 6
`
`® Application number: 851079613
`
`63 Dale of filing: 27.05.35
`
`@ Proprietor: Hewlett-Packard Company
`Mail Stop 20 84:), 3000 Hanover Street
`Palo Alto. California 943041US}
`
`@ Inventor: Calne. Nathanael T.
`777 South Mathilda Ave
`
`Sunnyvale California 94087IUS}
`Inventor: Simon. Jean-Jacques
`6 Rue du Fournet
`
`F-amzo Saint-EgrevelFfi)
`
`Representative: Llesegang. Roland. Dr. et a!
`BOEl-IMEHT 8: BOEHMERT Widenmayer-
`strasae 4n
`
`ill-8000 Mtinohen 22(DE)
`
`@ Computer network.
`
`69 Priority: 29.06.84 US 525944
`
`@ Date Of publication of application:
`02.01.86 Bulletin W01
`
`@ Publication of the grant of the patent:
`04.03.92 Bulletin 92310
`
`® Designated Contracting States:
`DE FR B IT NL
`
`References cited:
`FR-A- 2 214 385
`us-A- 3 652 993
`US-A- 4 322 849
`
`PATENT ABSTRACTS OF JAPAN. vol. 7. no.
`no (E—168)[1225]. 2nd April 1983; a. JF-A-sa
`7949 (OK! DENKI KOG'YO mu 17-01-1983-
`
`
`
`Note: Within nine months from the publication of the mention of the grant of the European patent. any person
`may give notice to the European Patent Office of opposition to the European patent granted. Notice of oppositicm
`shall be filed in a written reasoned statement. It shall not be deemed to have been filed until the opposition tea
`has been paid (Art. 99(1) European patent convention).
`
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`EP 016644131
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`Description
`
`Prior art networks are shown in Figures 1-3. Figure 1 shows a star network where a plurality of network
`devices 11 through 16 are coupled as shown to a central device to. Figure 2 shows a bus network where
`central device 10 and network devices 11 through 16 are all coupled as shown to a bus 20. In figure '3.
`central device 10 and network devices 11 through 16 are coupled in a loop network wherein information.
`flows around the loop in a specified direction.
`US-A-4,322,B49 describes a data relay system for accessing large quantifies of data. In the said system
`the data relays serve to receive data and to transmit these data to the host device. The host device gives
`addresses to the data relays.
`is known to set a plurality of terminals to a loop transmission mode by a
`From JP-A-56-105129 it
`detecting signal and a loop pole command. According to the said system a so-called poiing telegramm is
`transmitted between different terminals.
`
`The object underlying the invention is to provide a network according to the pro-characterizing clausepts-
`the main claim. all the elements of the network can communicate with one another by not only transmitting»
`data from the network devices to the central device. but also from the central device to any network device.
`According to the invention the above object is aimed by a network according to claim 1.
`Preferred embodiments oi the invention are claimed in the subclaims.
`
`In accordance with claim 1. a network is presented having substantial advantages over each of the
`above-mentioned networks. According to an underlying concept of the invention. each network device of the
`network is provided with a sand path comprising a send input and a send output for receiving data signals
`from the preceding device in the chain and for transmitting data signals to the succeeding device in the
`chain as well as with a return path comprising a return input and a return output for receiving data signals
`from the succeeding device and for transmitting data signals to the preceding device. Each network device
`comprises means for selectively connecting its send path to its return path such that data signals coming
`from a preceding device can be directed to the return path of the device. thus providing a transmission path
`for the data signals back through all preceding devices of the network and finally into the central device.
`In the network according to the invention. the network devices are coupled serially. thus forming a chain
`of devices. Data signals are transterred from the central device through each network device until a last
`network device in the chain is reached. The last network device returns the data signals to the central
`device back through the network devices.
`If a new device is to be added to the chain. the send input and the return output of the new device are
`connected to the send output and the return input, respectively. of the last device in the chain. and the
`connection between the send output and the return input of the last device is opened and a connection
`between the send output and the return input of the added device is established. Thus. a new device can
`simply be attached just by connecting the send output and the return input of the last device with the send
`input and the return output oi the new device. respectively.
`Relative to the star and the bus networks. the network according to claim 1 has the advantage that there
`need not exist an information path for every network device directly to the central device and that the
`addition of network devices to the network is not limited by the number of available connection ports to the
`central device or to the bus.
`
`Relative to the loop network. the network according to claim 1 has the advantage that network devices
`can be added without requiring to break prior connections and that the network device to be added has to
`be coupled only to a single device.
`According to claim 2. data signals between the network devices can be transmitted in a bit serial
`manner. so that the interconnection between devices requires only two lines. one for the send path and one
`for the return path.
`According to claim 4. the power lines for the various devices and the two data transmission lines can be
`combined in one cable.
`In this case. each device comprises a first receptacle for accepting the two data
`lines and the power lines from the preceding device and a second receptacle for accepting the two data
`lines and the power lines extending to the succeeding device. Thus. a new device can be added to the
`network and power can be supplied to the new device simply by plugging one end of a cable into the
`device to be added and the other end into the last device in the chain of network devices.
`
`Subsequently. an embodiment of the invention is expiained in detail with reference to the drawings.
`Figure 1. Figure 2. and Figure 3 show prior art networks.
`Figure 4 shows a network in accordance with the preferred embodiment oi the present invention.
`Figure 5 shows a network in accordance with the preferred embodiment of the present invention
`incorporated in user oriented devices.
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`Figure 6A and Figure BB show a network device in accordance with the preferred embodiment of the
`present invention.
`Figure 7 shows a 15-bit data frame used with the network shown in Figure 5.
`Figure 4 shows a network architecture in accordance with a preferred embodiment of the present
`invention. A central device 41 is coupled serially to network devices 42. 43. 44. and 45. Information from
`central device 41 flows through data paths 51, 52. 53. and 54. Network device 45 receives information from
`data path 54 and returns information through network devices 44. 43. and 42 to central device 41. by way of
`data paths 64. 63. 62. and 61.
`Figure 5 shows how the network architecture shown in Figure 4 may be incorporated in a network for
`user oriented devices. A network interface device 71 may form part of a computer system. Within network
`interface device 71 may reside. for instance. a microprocessor 111 such as a 8086 manufactured by Intel
`Corporation of Santa Clara, California. and a central processor 81. Central processor 81 may be any
`processor or series of processors capable of handling the protocol described below. Through a send data
`path 91 and a return data path 101. central processor 81 is coupled to a network processor 82. Network
`processor 82 is coupled to a network processor 83 through a send data path 92 and a return data path 102.
`Network processor 83 is coupted to a network processor 84 through a send data path 93 and a return data
`path 103. Network processors 82. 83. and 84 may each be any processor or series of processor capable of
`handling the protocol described below.
`Network procassor 82 is coupled to a microcontroller 112 within a user oriented device (touchscreen
`circuit) 72. network processor 83 is coupled to a microcontroller 113 within a user oriented device (keyboard
`circuit) 73. and network processor 84 is coupled to a microcontrolter 114 within a user oriented device
`(mouse circuit) 74. Microcontrollers 112—114 may each be. for instance. a GOP 420. a GOP 440 or a GOP
`2440. all of which are manufactured by National Semiconductor Corporation of Santa Clara. California.
`Microcontroller 112 is shown coupled to a touchscreen 122 through a touchscreen interface 122a.
`Microcontroller 113 is shown coupled to a keyboard 123. and microcontroller is shown coupled to a ball 124
`through encoders 124a and 124b.
`Additional network devices can be added to the network shown in Figure 5 through a port 134a and a
`port 134b. Port 134a is coupled to network processor 84 through a send data path 94. and port 134b is
`coupled to network processor 84 through a return data path 104. Network processors 82-84 along with any
`other processors added are collectively referred to as a (the) link. A power line 109 and a ground line 99
`may also be coupled from network interface device 71 to each user oriented device 72-74 so that user
`oriented devices 72 - 74 do not need a separate power supply.
`Figure 5A shows how information flows through network processor 83. Information from send data path
`92 flows in into network processor 83. is processed by an information processor 83a and flows out to send
`data path 93. Information from return data path 103 flows directly through network processor 83 to return
`data path 102. Because network processor 83 sends information it receives to data path 93. it is said to be
`in passthrough mode.
`Figure BB shows how information flows through network processor 84. Information from send data path
`93 flows into network processor 84. Is processed by an information processor 84a and is directed to flow
`out to return data path 103.
`If another network processor were added to ports 134a and 134D (shown in
`Figure 5). then information paths within network processor 84 would be configured to be similar to the
`information paths within network processor 83 {as shown in Figure 6A). Because network processor 84
`sends information back on return data path 103 it is said to be in loop back mode.
`Many different protocols may be used by the network architecture. One embodiment. given as an
`example. sends data serially in fifteen bit data "frames". A frame 140 is shown in Figure 7. Bit 141 is a start
`bit indicating that a frame follows. In this embodiment. start bit 141 is always a "0".
`Bits 142-144 are address bits. Address bits 142-144 may be used to address up to seven user oriented
`devices. leaving an address (000) to be used as a universal address.
`A bit 145 is a "1" if frame 140 contains data and a "0" if frame 140 contains an encoded command.
`
`Bits 146 —- 153 contain a byte of data or an encoded command as indicated by bit 145. Bit 154 is a parity bit
`used for error detection. Bit 155 is a stop bit. in this embodiment always a "1".
`Upon initial activation. or whenever user oriented devices are added or subtracted from the network
`shown in Figure 5. each user oriented device needs to be assigned an address. The process of assigning
`addresses to each user oriented device in the network is called configuration. Configuration may be
`performed as follows.
`Central processor 81 first sends out a Device Hard Fleset command (FEM. see below for a table of
`commands and their hexadecimal representation). The Device Hard Fleset command is sent with the
`universal address (000). Network processor 82 receives the Device Hard Reset command. resets microcon-
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`troller 112. and retransmits the Device Hard Reset Command to Network processor 83. Network processor
`83 resets microcontroller 113 and retransmits the Device Hard Reset Command to Network processor 84.
`and so on. Upon receipt of the Device Hard Reset Command each network processor 82—84 goes into loop
`back mode.
`
`Central processor 81 then individually assigns each network processor 82—84 an address. Central
`processor 81 sends an Interface Clear (IFC) Command (00......) with a universal address. Upon receipt and
`after performing a self test operation to assure its interface with microcontroller 112. network processor 82
`loops the IFC command directly back to central processor 81.
`Central processor 81 then sends an Auto Configure command (09m).using the universal address.
`Network processor 82 receives the Auto Configure command. notes that it is device #1. increments the Auto
`Configure command from 09.,“ to 0AM. and loops the Auto Configure command directly back to central
`processor 81.
`At
`this point central processor is done configuring network processor 82. so it sends to network
`processor 82 an Enter Passthrough Mode command (01) with an address {in address bits 142-144) of the...
`Network processor 82 then goes into passthrough mode (meaning it will then pass through all messages it
`receives to Network processor 83). The Passthrough Mode command is forwarded to network processor 83.
`which loops the message back to central processor 81 through network processor 82.
`Central processor 81 is now ready to configure network processor 83. Central processor 81 sends an
`IFC command to network processor 82. Since network processor is already configured it
`ignores this
`command and forwards the IFC command to network processor 83. Network processor loops the IFC
`command back to central processor 81.
`Central processor 81 then sends an Auto Configure command (09). Network processor 82 receives the
`command. increments the 09...... to DA”. and retransmits the command to network processor 83. Network
`processor 83 receives the Auto Configure command. notes that it is device #2.
`Network processor 83 then increments the Auto Configure command from GA...“ to Oma and loops the
`command back to central processor 81.
`At
`this point central prooessor is done configuring network processor 83. so it sends to network
`processor 83 an Enter Passthrough Mode command (01) with an address {in address bits 142-144) of 2.”.
`Network processor 82 receives this command, notes that it is not addressed to Device #1. and so merely
`passes the message on to Network processor 83. Network processor 83 sees that the Enter Passthrough
`Mode command is addressed to it (Device #2), so it goes into passthrough mode (meaning it will then pass
`through all messages it receives to Network processor 84).
`Central processor repeats the above configuring sequence with network processor 84. and with as
`many other network processors as are coupled to the network. The Auto Configure command is incre—
`mented by each network processor before sending it to the next network processor (if it is in passthrough
`mode) or back to the central processor (If
`it
`is in toopback mode). The Auto Configure command is
`incremented in the following sequence as it travels through each network processor:
`09 -> 0A —> OB —> 00 —> GO -> GE -> OF -> 08
`
`If a network processor receives an Auto Configure command which has been incremented to {08), then
`it knows that there are more than seven devices on the line. The network processor receiving a (18...m in bits
`146-153 would generate a Configure Error command (FUN) and sends it back to central processor 81.
`Presumably. at this point an error message is sent to a user who would remove some user oriented device
`from the network. limiting the number to 7.
`If in the course of configuring the network. central processor 81 sends out an Enter Passthrough Mode
`command to a network processor. which is device #n (where n is a positive integer less than or equal to 7).
`and does not get a command back. then that means that device #n is the last device on the chain. So. after
`waiting for a specified length of time (eg. “60 of a second). central processor 81 sends out an Enter
`Loopback Mode command (02) with addressed to device #n. At this point the network has been configured.
`Now central processor can send an Identify and Describe command (03) to each network processor 82-84.
`to find out what kind of device it
`is and what
`information it provides. The device will respond with a
`descriptor in an agreed upon format.
`Once central processor 81 is ready to receive data from the link. it sends a Poll command (10“) with
`the universal address field. Network processor 82 receives this command. and if it has no data for central
`processor 81. it immediately forwards the Poll command to network processor 83. If network processor 82
`does have information to return it performs the following sequence:
`(1) transmits a poll response header frame with an address of 1m indicating the data is from device #1.
`The frame would include 8 bits of data in bits 146 - 153 which would inform central processor 81 and/or
`microprocessor 111 the format of the data bits to follow.
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`(2) transmits data frames (with an address of 1m].
`(3) adds a number equal to the number of data frames {the number of data frames would include the poll
`response frame) transmitted to the low nibble (bits 150-153) at the original Poll command. and then
`forwards the. modified Po‘ll command to network processor 83. For instance, 11' network processor 82 sent
`out 8 frames. it would increment bits 143-153 to be 18...“.
`Network processor 83 performs in a manner similar to network processor 32. However. no more than
`fifteen frames may be sent in response to a Poll command. So.
`if network processor 83 sees that its
`response to the Poll command would require it to increment bits 150-153 to be greater than 15 {e.g..
`if
`notWork processor 82 sent out 8 frames. network processor 83 could send out 7 or terror frames}. then it
`will send the Poll command on to network processer unmodified. and wait tor the next Poll command.
`Central processor 81 receives this data and forwards it to microprocessor 111. Central processor 81
`may be prompted by microprocessor 111 to issue additional Poll commands. or central processor 81 may
`do so automatically.
`The following table gives a summary of the commands listed with the hexadecimal encoded values
`within bits 148-153.
`
`1'0
`
`15
`
`Gourmand the: val uel:
`oo
`
`Interface Clear (IFC)
`
`Tab] e 1
`
`Hallo:
`
`o1
`
`oz
`
`03
`
`or
`
`05
`
`no
`
`or
`
`as (08 -> 11F}
`
`to (-HF)
`
`20 1-) 2H
`30
`
`31
`
`32 -> x
`
`as
`
`at
`
`SF
`
`40 -> 4?
`
`48 ->- 4F
`
`50 -> FA
`
`F8
`
`F6
`
`FD
`
`FE
`
`FF
`
`Enter Passthrough Node
`
`Enter Loopback Mode
`
`Identtfy .1 Describe
`Devi Ce Soft Reset
`
`Perform Self Test
`
`Consent! Trailer
`
`Data Trailer
`
`Auto Configure
`Poll
`
`Repolt
`
`Report Name
`
`Report Status
`not used I reserved
`
`Disable Autoropea-t
`
`Enable Autorepeat,
`
`Cursor Rate = 1/30 second
`
`Enable Autorepeot,
`Cursor Rate = 1/60 second
`
`Prompt 0 4' 7
`
`Acknowledge 0 -> 7
`
`not used I reserved
`
`Master Hard Reset
`
`Data Error
`
`configure Error
`Device Hard Reset
`
`not used I prohibited
`
`50
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`Claims
`
`1. A network for
`the transmission of data signals between serially connected network devices
`(42.443.44.45) and at least one central device (41) ior controlling the network devices and ior processing
`data signals received from the network devices (42.43.44.45). said central device (41) being coupled to
`the iirst one (42) of said network devices (42.413.44.45), each oi the network devices (42.43.44.45)
`comprising:
`-
`a send input being directly or indirectly connectable to a send output oi the central device (41).
`-
`a send output having a transmission path from the send input of the network device (42) and
`being connectable to the send input of a further network device (43).
`a return output being directly or indirectly connectable to a return input of the central device (41)
`for transmitting data signals thereto. and
`a return input having a transmission path to the return output of the network device (42) and being
`connectable to the return output of the further network device (43) ior receiving data signals
`therefrom.
`
`-
`
`-
`
`characterized in that
`
`- each network device (42.43.44.45) is capable oi receiving data signals irom the central device
`(41) via its send input.
`- each network device (42.43.44.45) is capable of transmitting data signals to any further network
`device (43.44.45) via its send output.
`- each network device (42.443.44.45) is provided with a switching means (82.83.84) for selectively
`interconnecting the send output oi the network device (42.43. 44.45) with its own return input in
`such a manner that
`
`-
`
`an interconnection is established only between the send output and the return input oi the last
`network device (45) in the network and
`- data signals transmitted to the last network device (45) from the preceding device (44) oi the
`network are transmitted back to the return input oi the preceding device (44).
`
`2. A network according to claim 1.
`characterized in that the data signals are transmitted bit-serially between the devices (41.42.43.44.45)
`oi the network.
`
`3. A network according to claims 1 or 2.
`characterized in that the central device (41) and each network device (42.43.44.45) comprise means
`to supply power to the subsequent device in the network.
`
`4. A network according to any of the preceding claims.
`Characterized in that for supplying power from one device of the network to a subsequent device. a
`pair (99.109) of power lines is connectable with its one end to an output of the device and with its other
`end to an input of the subsequent device. one power line (99) providing a reference potential and the
`other power line (109) providing a supply voltage.
`
`5. A network according to any of the preceding claims.
`characterized in that each network device comprises an iniormation processor (833) for processing
`data signals. the iniorrnation processor having an input coupled to the send input of the network device
`and an output coupled to the send output oi the network device.
`
`Revendicatlons
`
`1. Un réseau pour la transmission de signaux de données entre des dispositifs de réseau (42. 43: 44. 45)
`relies en série et au moins un dispositif central (41) pour commander Ies dispositiis du réseau et pour
`traiter des signaux de données regus en provenance des dispositifs de réseau (42. 43. 44. 45). Iedit
`dispositii central (41) étant relié au premier (42) desdits dispositiis de réseau (42. 43. 44. 45). chacun
`des dispositiis de réseau (42. 43. 44. 45) comprenant :
`- une entrée d'envoi qui peut étre reliée directement ou indirectement a une sortie d'envoi du
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`dispositif central {41},
`- uno sortie d'onvoi oomportsnt una piste do transmission partant do l'antréo d'onvoi du dlspositif
`do résoau {42) et pouvant otro reliéo s I'ontréo d'snvoi d'un autro dispos‘itif (43} do résoau.
`- una sortie da rotour pouvant retro roliée directamont ou indirect'ament a una entréo do rotour du
`dispositif central (41} pour transmottro dos signaux do données é oolul—ci. at
`- uno antréo do rotour component uno piste do transmission reliéo a la sortie do rotour du
`dispositif do résoau (42} at pouvant étra reliée a la sortie do rotour do I'outro dispositit do résoau
`(43) pour racovoir dos signaux do données provonant do calui-ci.
`caractérlsé on ca qua :
`- cheque dispositlt do résoou (42. 43. 44. 45} est capable do reoovoir dos signaux do donnéos
`provonant du dispositif control {41} par l'intermédiaire do son entree d'onvoi.
`chaquo dispositif da résoau (42, 43. 44. 45) est capable do transmottro dos signaux do donnees it
`.tout autre dispositif do résoau {43. 44. 45} par l'lntormédialro do sasortio d'envoi.
`cheque dispositif do résoau (42. 43, 44. 45'} est pourvu d'un moyan do commutation (82. 83. 34)
`pour lntorconnactor séloctivement la sortie d'onvai du dispositif do résoou (42. 43. 44. 45) avac
`propro ontréo do rat-our d'uno mentors toils qua :
`- uns Intorconnoxion soil établie seulomont entre la sortie d‘envoi et l'entrée do retour du domier
`
`-
`
`-
`
`1'0
`
`1'5
`
`dispositif (45) du résoau ot
`- dos signaux do données transmis ou demior dispositif (45) du reason a .partir du dispositif
`précédant {44) sont ronvoyés a l‘ontrée do rotour du dispositif précédont (44).
`
`Un résoou salon la rovondication 1. oaractérisé on so quo los signaux do donnéos sont transmis aver:
`bits on oério entre las dispositifs (41. 42. 43. 4'4. 45} du réseau.
`
`Un réseau soldn les rovondications t ou 2. seractérisé on so que le dispositif control (41} ot cheque
`dispositif do -résoau {42. 43, 44. 45} oompronnont dos moyons pour alimontsr on oourent lo di'spositif
`suivant dans la réseau.
`
`Un réseau salon una quoloonque dos revendications précédantes. caractérlsé on es que. pour qu'un
`dispositit du résoau alimonto on courant un dispositif suivant. uno pairs {99. 109} do lignos d'alimonte—
`tion on courant pauvont étre rollées par une axtrérnlté 3 one sortie du dispositif at. par leur autro
`extrémité a one antréo du dispositif suivant. uno Iigno d'olimontation {99) fournissant un potential do
`reference at I'autre ligna d'allmentation {109) tournissant une tension d'alimentation-.
`
`Un réseau salon une quolconquo dos rovendlcations pre'oédontos. caractérisé an ce que chaqua
`dispositif do résoau oomprend un procassour d'information {83a} pour traitor dos signaux do donnéos.
`lo processaur d'lnforrnation component una entree relies Ea l'antrée d‘anvoi du disposin do réseau at
`one sortie raliéo a la sortie d‘envoi du dispositif do resoau.
`
`«1
`
`Potontonspruoho
`
`1. Notzwork ftir die Ubertragung von Datonsignalan zwischon sorioll vorbundonon Notzworkoinrichtungon
`{42,43,44.45) und mindestons elnar Zontralainriohtung (41) zum Uberwaohon dor' Notzworkainrichtungon
`und zurn Vorarboiton von Datensignalon. die von den Notzworkeinrichtungen (42.43.44.45) emptangon
`worden slnd. wobai dio Zantralainrlohtung (41} mit dar arstan (42} der Natzwarkoinrichtungon
`(42.431.44.45) vorbunden ist. woboi jode dor Notzwarkoinrichtungen (42.43.44.45} umfaBt:
`-' oinen Sendoeingang. der dirakt odor indirokt mit oinom Sondeausgang der Zentraleinrichtung (41)
`vorbi'ndbar ist.
`
`50
`
`- einen Sendaaus'gang. dar aian Ubortragungspfad tron darn Sandaoingang dar Natzwarkoinrich-
`tung {42-} umfaBt und mit dem Sendooingong einor waitoran Netzwarkainrich'tung {43) varbindbsr
`ist..
`
`-
`
`-
`
`oinen Backlaufausgang. dordirokt odor indirokl mit einom Rflcklaufoingang der Zontraioinrichtung
`(41} varbindbar ist. urn darsn Datensignala zu ijbortragan. und
`einan Rflcklaufaingang. dor oinon Ubortragungspfad zu dam Rflcklaulausgsng dor Notzworkain-
`richtung (42) autwoist und mit dam FliJoktaufausgang dor woitoron Notzwerkoinriohtung (43)
`verbindbar Est. urn Datensigno‘ls davon zu ompfangen.
`dadurch gokonnzoiohnot. deli!
`-
`jade Natzwsrkoinriohtung {412.43.44.45} Datensignalo von dor Zentraleinrlchtung {41) ubor ihron
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
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`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 7
`
`

`

`EP 0166441 B1
`
`-
`
`-
`
`Sendeeingang empfangen kann.
`jade Netzwarkeinrichtung {42.43,44.45) Datensignale an jecle waiters Netzwerkeinrichtung
`(43.44‘45) Uber ihren Sendeausgang {Ibertragen kann.
`jade Natzwerkeinrichtung {42.43.414.45} eina Schalteinrichlung (82.83.84) zum seleklivan Verbin-
`den des Sendeausgangsder Netzwerkeinrichtung (4233.44.45) mil ihrern aigenen Rijcklaufain—
`gang autweist und zwaa' darart. daB
`-
`sine Verbindung nur Zwiechen dam Sendeausgang 'uncl dam RUcklaufeingang d'er letzten
`netzwerkeinrichtung {45} in dem Netzwerk 'hergestellt ist und
`- Datensignale. die an die letzle Netzwarkainrichtung {45} van der vorhergahenden Einrichtung
`{44) dos Netzwarks Ubertragen warden. zurUck zu darn Fltlcklauieingeng der vorherganenden
`Einrichtung {44} Ubenragen warden.
`
`Nelzwerk nach Anspmch 1. dadurch gellennzalchnet. daB' die Datensignala bitseriall zwischen den.
`Einrichtungen (41.42'.43.44.45) des Netzwerks Uberlragen warden.
`
`'Neizwerk nach Anspruch 1 oder 2. dadurch gekannzelohnet, dafl die Zentraleinrichtung (41) und jade
`Netzwarkeinflchtung (42.43.44.451 sine Einfichturlg zum Versergen dar n'achfoigendan Einricmung in
`darn Natzwerk mi! Energie aufiveisen.
`
`Netzwerk nach einem der vorangahandan Ansprflche. dadurch nekennzelchnet, daB zum Abgeben
`van Enargie van einar Elnrichtung des Netzwerks an. eine nachfolgende Einrichtung ein Paar (99.109)
`Energieversorgungsleitungen mi! seinern einen Ende an einen Ausgangsanschiufi dar Einrichtung und
`'mit seian anderan Enda an einan Eingangsensohlufl der nachfolgenden Bnrichtung anschliefibar Est.
`wobei sine Energieversorgungsleitung {99) ein Bezugspotentiai zur Verfflgung stall! und die endow
`Energiavefsorgungsleflung (109} eine Energieversorgungsspannung zur Verfflgung stellt.
`
`5'
`
`Netzwerk nach einem der vorangehenden Ansprflche. dadunch gekennzelchnet, dafl jade Netzwark-
`einricl'rtung einen Datanprozessor (83a) zum Verarbeiten van Datansignal'en umfaflt. wobei der Baton-
`_prezessor ainen Eingangsanschlufi. der mil dam Sendeeingang der Neizwerkeinrlchtung verbunden isll
`und ainen Ausgengeanschlufl aufweist. der mit darn Sendeausgang der Netzwerkeinrichtung var-hunden
`ist“
`
`H}
`
`W-
`
`20
`
`25
`
`40
`
`4s
`
`50
`
`55-
`
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
`
`Page 8
`
`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 8
`
`

`

`EPU16644131
`
`15
`
`16
`
`1O
`
`13
`
`‘2
`
`D4“
`
`FIG 1 (PRIOR ART)
`
`9
`
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
`
`Page 9
`
`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 9
`
`

`

`EP 0168 441 B1
`
`
`
`FIG 3 (PRIOR ART)
`
`‘0
`
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
`
`Page 10
`
`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 10
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`

`

`EP0136441BI
`
`r.._____.—_-—-——-—
`
`
`
`
`
`11
`
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
`
`Page 11
`
`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 11
`
`

`

`EP 0166 441 B1
`
`
`
`12
`
`PMC Exhibit 2137
`
`Apple v. PMC
`|PR2016-01520
`
`Page 12
`
`PMC Exhibit 2137
`Apple v. PMC
`IPR2016-01520
`Page 12
`
`

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