throbber
United States Patent (19J
`Frederiksen
`
`(11] Patent Number:
`[45] Date of Patent:
`
`4,742,543
`May 3, 1988
`
`(54] VIDEO TRANSMISSION SYSTEM
`Inventor:
`Jeffrey E. Frederiksen, 603 West
`(76]
`Haven Dr., Arlington Heights, Ill.
`60005
`(21] Appl. No.: 884,217
`Jul. 10, 1986
`(22] Filed:
`
`(56]
`
`Related U.S. Application Data
`(62] Division of Ser. No. 564,405, Dec. 22, 1983, Pat. No.
`4,682,360.
`Int. Cl.4 ................................................ G04L 9/00
`(51]
`(52] U.S. Cl . .......................................... 380/9; 380/19;
`380/46; 380/49; 375/26
`(58] Field of Search ........................ 179/1.5 R, 1.5 M;
`358/119, 121, 145, 147; 380/9, 10, 19, 46, 33,
`49; 375/26; 381/31
`References Cited
`U.S. PA TENT DOCUMENTS
`2,516,587 7/1950 Peterson ................................ 375/26
`3,750,024 7/1973 Dunn et al ............................ 381/31
`4,130,729 12/1978 Gagnon ................................. 381/31
`4,221,931 9/1980 Seiler ................................ 179/1.5 S
`4,266,243 5/1981 Shutterly .......................... 179/1.5 S
`4,270,027 5/1981 Agranal et al ........................ 381/31
`4,295,223 10/1981 Shutterly ......................... 179/1.5 R
`4,314,369 2/1982 Caillet et al. .......................... 375/26
`4,318,125 3/1982 Shutterly ............................. 358/121
`4,433,211 2/1984 McCalmont et al. ............ 179/1.5 S
`4,525,844 6/1985 Scheuermann ................... 179/1.5 S
`4,550,222 10/1985 Hanni et al. ..................... 179/1.5 R
`4,608,456 8/1986 Paik et al. ......................... 179/1.5 S
`Primary Examiner-Salvatore Cangialosi
`Attorney, Agent, or Firm-Arnold, White & Durkee
`
`ABSTRACT
`(57]
`A subscriber cable television system uses predominantly
`digital signal processing techniques and has extremely
`high security and an increased capacity for transmitting
`program and customer data to individual decoder units.
`For ease of data handling, two-channel audio, video,
`and high capacity program and customer data are multi(cid:173)
`plexed for transmission on the composite video signal.
`The decoder unit employs a system timing circuit
`which precisely synchronizes the sample times on the
`received composite video signal to the chroma burst,
`regardless of whether the video information is for a
`color or black-and-white program. An improved time(cid:173)
`warp and segment scrambling method is disclosed along
`with means for suppressing the undesirable effects of
`discontinuities in the scrambled video signal. The digital
`audio is transmitted as scrambled most significant bits in
`low resolution samples and unscrambled least signifi(cid:173)
`cant bits in a high resolution remainder sample. The
`system timing circuit has a horizontal sync detector
`accommodating variable line length such as is provided
`by some video recording apparatus. The clock to the
`horizontal counter is selectively phase-reversed in re(cid:173)
`sponse to early or late horizontal sync so that the timing
`resolution is twice the clock period. An improved self(cid:173)
`adjusting threshold detector and other means are dis(cid:173)
`closed for detecting a "20 IEEE" suppressed horizontal
`sync so that the full range of video modulation may be
`used more effectively. Circuitry is also disclosed for
`transmitting the customer and program information in a
`multi-level correlative signalling format in order to
`more effectively use the band width of the entire televi(cid:173)
`sion channel.
`
`7 Claims, 15 Drawing Sheets
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 1
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 1 of 15
`
`4,742,543
`
`FIG. I
`24
`
`SYNC
`CETECTORS
`
`STATE
`COUNTERS
`BDECOOERS
`
`26
`
`22
`
`SYSTEM CLOCK
`
`CHROMA
`BURST
`PLL
`CHROMA
`~-------' BURST
`. GATE
`23
`
`MAX·
`27
`REFERENCE ..---.i...--.i.,
`GATE
`VIDEO
`SCRAMBLER
`
`'32
`
`3/
`
`_ AU0/0
`AUDIO
`O/GrrCi!l:/?.51--~~~~--t-~scRAMBLER
`
`2/
`
`STATION
`VIDEO
`
`TWO
`CHANNEL
`STATION
`AUDIO
`
`DIGITAL
`VIDEO
`
`8 BIT
`AID
`
`RANDOM NO.
`
`RANDOM
`NO.
`GENERATOR
`28
`
`25
`DIGITAL
`CUSTOMER
`8 - - - - . . - - - -~ DATA
`29
`21"
`PROGRAM
`FORM.ll:rTING .._ _ _._s_E_E_D _ _,
`DATA
`
`TRANSMITIED
`ENCODED
`OJMPOSITE
`VIDEO
`
`3?
`
`33
`
`'34
`
`~ 2 0
`
`FIG~ 2
`
`58
`
`41
`
`STATE
`COUNTERS
`&DECODERS
`
`44
`NTSC SYNC
`t----~i-1BLANKII\G 8
`CHROMA BJRST
`
`SYNC
`)
`RECEI_V ... ED--- DETECTORS
`ENOJDED
`COMPOSITE
`VIDEO
`
`4.'"'
`<::
`
`DIGITAL
`VIDEO
`
`REF GND
`8 BIT
`AID
`
`45
`
`50
`
`CUSTOMER
`ID PROM
`
`.--,;:;S=EE=D----- ~~ERATOR
`
`"'--40
`
`DIGITAL
`COLOR KILLER SK>NAL
`DATA
`PROCESSING l=====~====~DATA
`'\_51
`OJTPUT
`
`49
`
`4?
`
`VIDEO DE(cid:173)
`SCRAMBLER
`
`52
`
`AUDIO DE(cid:173)
`SCRAMBLER
`
`RANDOM NO.
`48
`RANDOM
`
`56
`
`54
`
`0/A
`CONJ/£RTFRS TWO
`CHANNEL
`AUDIO
`
`SYSTEM CLOCK
`- - - ' ' - - - - , ,
`CHROMA
`BURST
`CHROMA
`PLL
`~-
`-,----,BURST
`4
`GATE
`..------, MAX
`GATE ---.____.
`
`-3
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 2
`
`

`

`CONVENTIONAL
`60a
`HORIZONTAL
`I
`SYNC TIP
`I
`--i:""r __ .:...:.:__
`60/r ~--
`I
`-------'
`
`MAX
`REF.
`PULSE
`
`60b
`
`FIG. 5
`
`CHROMA BURST
`
`~
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`
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`
`HORIZONTAL
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`NO.
`
`SCRAMBLED VIDEO
`OR CUSTOMER
`DA.TA
`
`0
`I
`•
`•
`•
`8
`9
`
`• • •
`
`260
`261
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`•
`•
`270
`271
`•
`•
`•
`524
`
`HOUSEKEEPING
`CUS"TOriER DATA
`IN TIME - SLOT
`FORMAT
`(FIELD 0)
`SCRAMBLED
`VIDEO
`(FIELD 0)
`
`CUSTOMER DATA
`IN TIME - SLOT
`FORMAT
`
`SCRAMBLED
`VIDEO
`(FIELD I)
`
`'
`
`65
`
`FIG. 4
`
`,&;-.
`-..
`
`~ -..
`Ul t3
`
`SAMPLE CUXK = SYSTEM
`7/a :::fl HORIZONTAL RESET PULSE
`~ol1 l213l4!5l6!7lsl9l1ol11 I
`_________________ ___.
`
`CLOCK -:- 2 rv 10.7 MHZ
`
`72:-:, CHROMA BURST GATE
`
`73a=::j
`
`t=WHITE REF. GATE
`
`73b----r
`
`l::.GND. REF. GATE
`
`_____ T_l_b_::=:::-rY__. HORIZONTAL PRESET PULSE
`
`l 57
`
`CYCLES SYNC a REF.
`REF.
`
`DIGITAL AUDIO CUSTOMER DATA
`1
`
`36 SAMPLE 1s90 SAMPLE CLOCK CYCLES
`CLOCK CYCLES SCRAMBLED VIDEO OR I
`"'''''>"" ---vvv-------"Wi"
`Lv. SYNC
`
`> , ( ' , J \ / ' - 4 - -~ - - - - - - - -~
`
`(4 SAMPLE CLOCK CYCLES)
`
`"
`_J SU PPRESS£0
`HORIZ
`SYNC TIP
`, _.
`
`.,,
`
`CH~OMA
`BURST
`
`63. s~ SEC HORIZONTAL LINE PERIOD
`FIG. 3
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 3
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 3 of 15
`
`4,742,543
`
`-s-Ys_T_E_M_ID-~--PR_OG_RA_M_I_NF-o---. ,-I s_EE_D__,.1-MISCE-LL-AN_EO_u_.s_, I Fl G. 6
`
`c:;74
`
`RECORD NO.
`
`CUSlOMER DATA
`
`IN TIME - SLOT FORMAT
`
`FIG. 7
`
`I SEC .0 II SEC I II SEC 2
`c~,
`l/02
`
`II SEC 7 I
`II SEC 3 II SEC 4 II SEC 5 II SEC 6
`. ~,oo
`
`SEGMENT 0
`
`SEGMENT ~
`
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`
`0
`
`SEGMENT 0
`
`SEGMENT
`
`lEerEl-11
`
`I
`
`I
`
`I Tl-13~32
`
`I 1N3~E>3S
`
`SEGMENT
`
`I
`
`2ECWEfil
`
`I
`
`I T"13Mc>3G
`
`I 1N3WE>3S'
`
`II
`II
`II
`II
`II
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`II
`SEGMENT 0
`II SEGMENT 0
`
`SEGMENT 0
`
`SEGMENT 0
`
`RANDOM NO.
`FIRST S=ID-JD SEC10R
`IR
`IR
`s
`00
`0
`00
`
`FIG. 9
`
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`
`0
`
`0
`
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`
`01
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`
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`
`bo
`
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`10
`
`II
`
`00
`
`01
`
`10
`
`II
`
`/06
`
`/07
`
`TRANSMITTED
`
`FIG. II
`
`SEGMENT I
`
`SEGMENT 0
`
`/08
`
`t
`ERROR
`t .
`
`RECEJYED
`
`~/09
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 4
`
`

`

`RECEIVED
`ENCODED
`COMPOSITE
`VIDEO
`r---------
`1 HORIZ
`82 - - - - - - - - - - - - ,
`
`'---r----1--.I SYNC TIP
`WINDOW
`DETEC1DR
`
`r;
`
`8/
`
`r43
`
`HORIZ
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`DETECTOR
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`
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`
`83
`
`I ~ I STATE
`
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`PLAS
`
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`
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`I GATE
`I CHROMA BURST GAT
`~
`I
`:
`
`V
`
`VERTICAL
`SYNC
`DETECTOR
`GAT
`I VERTICAL SYNC GATE
`L--MAX-REFERENCE
`GATE------
`
`ITTHffi
`GATING
`SIGNALS
`
`86
`
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`ECX)UNTER
`c
`i,;.. ______ _.
`_J
`
`SYSTEM TIMING
`89,-~ 4 6 - - -
`N.
`
`DIGITAL
`VIDEO
`
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`
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`I
`
`) ;
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`'
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`I
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`I
`l9IGITAL DATA PROCESSING _ _J
`
`8 BIT
`DIA
`
`DESCRAMBLED
`VIDEO
`
`53
`
`D/A
`
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`AUDIO
`
`48
`
`47
`
`I
`
`VIDEO
`~ I DESCRAMBLER
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`t VICEO GATES I
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`.... - - - - ) ! - ' · AUDIO
`DESCRAMBLER
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`
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`
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`50
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`SIGNAL
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`FIG. 8
`
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`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 5
`
`

`

`FIG. 10
`
`SAMPLE
`CLOCK-=-4
`
`2 MSB}
`DIGITAL
`VIDEO
`
`SAMPLE
`CLOCK+4
`
`SECTOR
`BOUNDARY
`GATE
`
`SEED
`LOAD
`,,.,,-Y
`GATES__.,.,-
`
`4 BIT
`. SIR
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`KEY LOGIC
`
`/04
`
`ONE BIT OF
`RANDOM NUMBER
`
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`~
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 6
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 6 of 15
`
`4,742,543
`
`--fief: 11 A.
`
`s''
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 7
`
`

`

`122_/
`
`6
`
`7
`
`11
`
`/24
`
`~/25
`
`~/25
`
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`
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`
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`256X8
`RAM
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`I SEG I SE. G I SEG I SEG I SEG I SEG I SEG I SEG I SEG I SEG
`SEG
`r
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`VIDEO ==,D Q
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`SAMPLE
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`
`FIG. 12
`
`133
`
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`
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`OUT
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`COUNT
`
`143 FIG. 13
`
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`START V/£)£0
`
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`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 8
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 8 of 15
`
`4,742,543
`
`•
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`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 9
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 9 of 15
`
`4,742,543
`
`LAm Lem
`
`/7..9er
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`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 10
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 10 of 15
`
`4,742,543
`
`#aR/Zc?Alm~ ~ LE
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`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 11
`
`

`

`2//
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`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 12
`
`

`

`7/b ~ .CHORIZ PRESET
`
`250 __,_
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`BURST
`GATE
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`OOALIFIED
`HORIZ
`LINE
`
`Qle
`
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`
`1280
`
`I
`
`255
`
`I I
`~-==~)~1~7
`J
`2-F173
`GATED LATCH
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`%~
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`C
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`3-Fl69
`OWN CNTR
`C
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`QUALIFIED
`HORIZ LINE
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`260
`
`1 I ;>1 END-oF-UNE
`PLA
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`GND. REF GATE
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`~
`V1
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`(C a
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`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 13
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 13 of 15
`
`4,742,543
`
`81---...._
`
`265
`
`266
`
`SELF-ADJUSTING
`COMPOSITE
`--..-i~o--~THRESHOLO
`DETECTOR
`
`I VIDEO
`
`HORIZ
`PRESET
`
`267
`
`Q
`
`D
`
`268
`
`Q
`
`D
`
`PEAK
`
`C a
`21MHZ
`CLOCK~-41--~~---4i.--~~~~t--~-,
`
`C Q
`
`FIG. 22
`
`-40
`-20
`0
`
`100
`IEEE
`UNITS
`
`_J
`
`PEAK
`
`278
`
`~
`275
`
`FIG. 20
`
`FIG. 23
`
`27/
`
`R
`C
`CNTR. CEP
`
`Q
`
`GND. REF. GATE
`
`111 r---v-294
`
`~7 ~6 1
`
`5Vp-p
`INVERTED
`COMPOSITE
`VIDEO
`
`PEAK
`
`21 MHz
`CLOCK
`
`( I
`-
`282
`
`~266
`
`FIG. 21
`
`291
`
`D
`
`C
`
`4 STAGE
`SHIFT REG.
`aa QI
`
`Q2 03
`
`295
`
`290
`
`/
`
`FIG. 24
`
`HORIZ
`PRESET
`
`293
`
`D
`
`Q
`
`C
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 14
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 14 of 15
`
`4,742,543
`
`FIG. 25
`
`TRANS
`DIGITAL
`GATE
`
`300~
`
`D
`
`Q
`
`C
`
`DIGITAL
`DATA
`5 MHZ
`RATE
`
`D1
`
`Do
`
`5MHZ
`CLOCK
`
`30/
`
`Q
`
`0
`
`A
`
`10 MHZ
`CLOCK
`
`OE
`
`V7-
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`Vo
`
`C
`
`FIG. 26
`
`3/7-
`
`01
`
`Do
`
`C
`
`3/0~
`TWO
`
`ONE
`
`ZERO
`
`3/7
`
`3/4
`
`3/5
`
`D
`
`Q
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`01
`
`a,
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`C
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`3/6
`
`Do
`
`Oo
`
`C
`
`Do
`
`v'
`7
`v' 6
`
`10 MHZ
`CLOCK
`
`5 MHZ
`CLDCK
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 15
`
`

`

`U.S. Patent May 3, 1988
`
`Sheet 15 of 15
`
`4,742,543
`
`2XCL()CK
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`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 16
`
`

`

`1
`
`4,742,543
`
`VIDEO TRANSMISSION SYSTEM
`
`This is a of co-pending application Ser. No. 564,405
`filed on Dec. 22, 1983 U.S. Pat. No. 4,682,360.
`
`15
`
`BACKGROUND OF THE INVENTION
`This invention relates generally to secure communi(cid:173)
`cation systems and, more particularly, to cable televi(cid:173)
`sion systems wherein designated subscribers are enabled 10
`to receive particular program material.
`In any such subscriber television system, means are
`required for scrambling the audio and video informa(cid:173)
`tion, and means are also required for transmitting pro-
`gram and subscriber information to designate subscrib(cid:173)
`ers permitted to view particular programs. Although
`the prior art discloses a wide variety of methods, com(cid:173)
`mercially accepted systems typically perform these
`functions by independent analog scrambling of the 20
`audio and video information, and by multiplexing digi-
`tal customer and program data with either the audio or
`video signals. Popular techniques include, for example,
`"sine-wave scrambling" of the video to suppress hori(cid:173)
`zontal synchronization and modulating the audio infor- 25
`mation on a supersonic subcarrier. More advanced com(cid:173)
`mercial systems employ a pseudo random code for
`scrambling the video information, for example, by po(cid:173)
`larity inversion of the video signal on a frame-by-frame
`or line-by-line basis. These techniques have required 30
`increased complexity and cost, but the additional secu(cid:173)
`rity is needed to frustrate pirates who have gained con(cid:173)
`siderable skill and experience in circumventing security
`measures.
`
`2
`FIG. 1 is a block diagram of the encoder or scrambler
`portion of the video transmission system according to
`the invention;
`FIG. 2 is a block diagram of the decoder or descram-
`5 bier portion of the video transmission system;
`FIG. 3 is a pictorial diagram of one horizontal line of
`the video signal encoded by the encoder of FIG. 1;
`FIG. 4 is a pictorial diagram showing the contents of
`the scrambled video or customer data portion of the
`horizontal lines by line number in the television frame;
`FIG. 5 is a pictorial diagram of the horizontal syn(cid:173)
`chronization and chroma burst portion of the beginning
`of each encoded horizontal line;
`FIG. 6 is a pictorial diagram showing the arrange(cid:173)
`ment of the housekeeping data packed into the first
`horizontal line of the television frame;
`FIG. 7 is a pictorial diagram showing the record
`number and parity check number in each line of cus(cid:173)
`tomer data in time-slot format;
`FIG. 8 is a block diagram of the decoder or receiver
`of FIG. 2, showing in detail the system timing portion
`which is common to both the encoder and decoder of
`the video transmission system;
`FIG. 9 is a pictorial diagram showing the method of
`scrambling or encoding the video portion of the hori(cid:173)
`zontal lines to prevent unauthorized reception;
`FIG. 10 is a simplified block diagram of a one bit
`portion of the random number generator used in the
`encoder and the decoder for preventing unauthorized
`persons from determining the encoding key merely by
`detailed analysis of the encoded signal;
`FIG. 11 is a pictorial diagram showing the undesir(cid:173)
`able effects of discontinuities introduced by the encod-
`35 ing scheme and one method for reducing the distortion
`from the decoded video signal;
`FIGS. llA, llB, and UC are pictorial diagrams
`showing the preferred method for virtually eliminating
`the distortion caused by the discontinuities introduced
`during scrambling;
`FIG. 12 is a pictorial diagram showing the memory
`contention problem occurring when the total number of
`video samples in a video line is increased and decreased
`during video encoding and decoding;
`FIG. 13 is a schematic diagram of a video scrambler/(cid:173)
`descrambler having a 256 byte memory in order to
`avoid the memory contention problem;
`FIG. 14 is a pictorial diagram showing the sampling
`and encoding of two-channel audio;
`FIG. 15 is a block diagram of the audio scrambling
`circuits for the video transmission system;
`FIG. 16 is a block diagram of the audio descrambling
`circuits for the video transmission system;
`FIG. 17 is a schematic diagram of a chroma burst
`phase-locked loop;
`FIG. 18 is a schematic circuit diagram of a horizontal
`sync detector accommodating varying line length and
`tolerating missing horizontal sync pulses;
`FIG. 19 is a timing diagram depicting the window
`gate signal which qualifies horizontal sync pulses;
`FIG. 20 is a schematic circuit diagram of a horizontal
`sync tip threshold detector;
`FIG. 21 is a schematic circuit diagram of a self-adjust(cid:173)
`ing threshold detector having a single operational am(cid:173)
`plifier functioning as a peak detector and as a threshold
`detector;
`FIG. 22 is a pictorial diagram of the input and output
`signals for the threshold detector of FIG. 21;
`
`45
`
`SUMMARY OF THE INVENTION
`A principal object of the invention is to provide a
`subscriber cable television system having an inexpen(cid:173)
`sive decoder yet also having extremely high security
`and an increased capacity for transmitting program and 40
`customer data to the decoder units.
`Another object is to provide a video transmission
`system wherein two-channel audio, scrambled video,
`and high capacity program and customer data are all
`multiplexed onto a composite video signal.
`An additional object is to provide an improved
`method of transmitting digitally-scrambled audio.
`Still another object is to provide an improved system
`timing circuit in the decoder unit for defining precisely
`synchronized sample times on the received composite
`video signal.
`Yet another object to provide a horizontal sync de(cid:173)
`tector circuit capable of accommodating variable hori(cid:173)
`zontal rates, such as are generated by some video re- 55
`cording apparatus.
`And another object is to provide a method of syn(cid:173)
`chronizing a counter to a reset pulse to obtain a timing
`resolution exceeding the clocking period of the counter.
`Moreover, it is an object to provide means for using 60
`the full range of video modulation for tranmsitting the
`video portion of the composite video signal.
`
`50
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`Other objects and advantages of the invention will 65
`become apparent upon reading the following detailed
`description and upon reference to the drawings, in
`which:
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 17
`
`

`

`15
`
`20
`
`4,742,543
`
`3
`FIG. 23 is a pictorial diagram of the operation of the
`threshold detector of FIG. 21 when processing a video
`signal having a "20 IEEE" suppressed horizontal sync;
`FIG. 24 is a schematic circuit diagram of a circuit for
`detecting "20 IEEE" suppressed horizontal sync;
`FIG. 25 is a schematic circuit diagram of a correla(cid:173)
`tive encoder for efficiently transmitting the digital cus(cid:173)
`tomer and program data within the bandwidth of the
`television channel;
`FIG. 26 is a schematic circuit diagram of the decoder 10
`for the encoder of FIG. 25, including error detection
`circuitry;
`FIG. 27 is a timing diagram for a clock rephase cir(cid:173)
`cuit for permitting the horizontal counters to have in-
`creased timing resolution;
`FIG. 28 is a schematic diagram of a clock rephase
`circuit generating the signals shown in FIG. 27; and
`FIG. 29 is a schematic diagram of a fast acting clamp
`circuit for establishing a ground reference level for the
`. d
`'d
`.
`I
`receive v1 eo s1gna .
`While the invention is susceptable of various modifi(cid:173)
`cations and alternative constructions, a certain pre(cid:173)
`ferred embodiment has been shown in the drawings and
`will be described below in detail. It should be under- 25
`stood, however, that there is no intention to limit the
`invention to the specific form described but, on the
`contrary, the intention is to cover all modifications,
`alternative constructions and equivalents falling with
`the scope of the appended claims.
`DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`Turning now to the drawings, there is shown in FIG.
`1 a block diagram of a scrambler or encoder generally 35
`designated 20 for one embodiment of the video trans(cid:173)
`mission system of the present invention. The scrambler
`20 receives station video on an input 21, two-channel
`station audio signals on an input 21' and customer and
`program data on a digital input 21". The scrambler 20 is 40
`most generally described as a synchronous logic circuit,
`with a predetermined set of operations occurring peri(cid:173)
`odically at predefined times with respect to the vertical
`and horizontal synchronization signals present in the
`station video on the input 21. In order to synchronize 45
`the scrambling functions with the horizontal and verti(cid:173)
`cal synchronization signals, sync detectors 22 isolate the
`horizontal and vertical synchronization signals from the
`station video, and a chroma burst phase-locked loop 23
`generates a system clock precisely phase-locked to the 50
`chroma burst signal in the station video so that the
`operations of the scrambler 20 may be even more pre(cid:173)
`cisely defined as a function of time with respect to the
`horizontal and vertical synchronization signals. The
`precise beginning of a horizontal line, for example, is 55
`indicated by the first transition in the system clock fol(cid:173)
`lowing a horizontal sync edge, thereby rejecting noise
`or jitter in the position of the horizontal sync edge. The
`detected horizontal and vertical sync signals are used to
`reset horizontal and vertical state counters 24 having 60
`decoders for generating gating signals which enable the
`scrambling or encoding operations to be performed at
`precise predetermined times with respect to the hori(cid:173)
`zontal and vertical synchronization signals. A chroma
`burst gate, for example, is fed back to the chroma burst 65
`phase-locked loop 23 to specify the time at which the
`chroma burst signal is present in the station video on the
`input 21.
`
`4
`The scrambling of the video signal is performed on a
`time-sampled basis, and the video samples are processed
`in digital form. The station video on the input 21 is
`sampled at three times the frequency of the chroma
`5 burst by an eight bit analog-to-digital converter 25.
`Since the chroma burst frequency represents the fre(cid:173)
`quency of the suppressed carrier for phase modulation
`of the chroma signals, a sampling rate of three times the
`chroma burst frequency is about the lowest sampling
`rate that may be used. For the standard 3.58-MHz
`chroma burst frequency, the sampling of the eight bit
`analog-to-digital converter 25 occurs at a 10. 7 MHz rate
`in synchronism with the system clock from the chroma
`burst phase-locked loop 23. Because of this high sam(cid:173)
`pling frequency, the analog-to-digital converter 25 is a
`parallel mode or "flash" converter. The digital video
`output of the analog-to-digital converter 25 is quantized
`to 256 levels specified by the eight bits from the analog(cid:173)
`to-digital converter; in practice it is found that the eight
`bits are sufficient for generating a digital video signal
`which may be processed and converted back to analog
`form without significant visual perception of the quanti(cid:173)
`zation error. Since the sampling rate is a multiple of the
`chroma burst frequency, the quantization error compo(cid:173)
`nents coincide with the existing components in the tele(cid:173)
`vision signal, and the intermodulation products "zero
`beat" to become unobtrusive.
`Due to the delay associated with video scrambling,
`sync and chroma burst regenerating circuits 26 are used
`30 to generate, in digital form, a delayed version of these
`signals. This delayed version is precisely synchronized
`to the system clock, and is in effect pre-programmed in
`a memory addressed during the beginning of each en-
`coded video line.
`A video scrambler 27 receives the digital data encod(cid:173)
`ing the beginning of each horizontal line from the sync
`and chroma regenerating circuits 26. Then the digital
`video is encoded in the video scrambler 27 by randomly
`scrambling the time positions of the digital video sam(cid:173)
`ples in response to a predetermined random number.
`The random number is specified by a free-running ran-
`dom number generator 28 containing predetermined
`and secret key logic. A seed number generated by the
`random number generator 28 is periodically transmitted
`from the encoder 20 to the decoder (40 in FIG. 2) to
`maintain synchronization so that a copy of the random
`number may be generated by a similar random number
`generator in the decoder. Because the key logic is se(cid:173)
`cret, the random number cannot be generated merely
`from the seed which could possibly be intercepted as it
`is transmitted from the encoder to the decoder.
`The seed numbers, as well as digital data for transmit-
`ting program identification and customer data, are time
`multiplexed with the scrambled video information and
`transmitted from the encoder to the decoder. The digi(cid:173)
`tal data, for example, are received from the customer
`and program data input 21" and loaded into storage
`r,egisters in the digital data formatting circuits 29. These
`buffered or stored data are then transmitted at predeter(cid:173)
`mined times in response to gating signals from the state
`decoders 24.
`The two audio channels are also digitized, scrambled,
`and time multiplexed with the scrambled video and the
`customer and program data. Each channel of the two(cid:173)
`channel station audio 21' is fed to a separate one of two
`audio digitizers 31, each generating binary audio data at
`a rate of 36 bits per horizontal video line, or 565,200 bits
`per second. The binary audio data for each audio chan-
`
`APPLE EXHIBIT 1069
`APPLE v. PMC
`IPR2016-01520
`Page 18
`
`

`

`25
`
`5
`nel for each horizontal line are scrambled by an audio
`scrambler 32 in response to the random number pro(cid:173)
`vided by the random number generator 28.
`In accordance with one feature of the present inven(cid:173)
`tion, the digital audio and the customer and program 5
`data are formatted into two-bit binary numbers which
`are converted to analog samples and then time multi(cid:173)
`plexed with the scrambled video for transmission. The
`72 binary bits of audio for each horizontal line are for(cid:173)
`matted into 12 two-bit binary numbers and six eight-bit 10
`binary numbers containing lesser significant digital
`audio bits. The binary numbers are routed by an output
`multiplexer to an eight-bit digital-to-analog converter
`33 so that the analog samples are placed before the
`video portion of each horizontal line in the encoded 15
`composite video. Similarly, the digitized customer and
`program data are also transmitted as analog samples.
`Due to the limited band width of the transmission
`channel, the scrambled digital video cannot be transmit(cid:173)
`ted through the channel in digital form. Therefore, the 20
`eight-bit digital-to-analog converter 33 is required to
`generate an analog video signal from the time scram(cid:173)
`bled digital video samples.
`In accordance with another feature of the present
`invention, a chroma burst signal is always transmitted
`regardless of whether the station video is for a color or
`black and white program. The chroma burst signal is
`used at the decoder for generating a system clock syn(cid:173)
`chronized to the system clock in the encoder. Thus, the 30
`sample times for the audio samples and the customer
`and program data may be determined at the decoder
`from the system clock phase-locked to the received
`chroma burst.
`A block diagram of the descrambler or decoder 40 is 35
`shown in FIG. 2. The encoded composite video is re(cid:173)
`ceived on an input 41, and sync detectors 42 strip off the
`horizontal and vertical synchronization information.
`The chroma burst phase-locked loop 43 regenerates a
`system clock and the system clock is fed to state count- 40
`ers 44 being reset by the horizontal and vertical syn(cid:173)
`chronization signals. As in the encoder 20, the state
`counters have decoders for generating gating signals
`such as a chroma burst gate which enables the chroma
`burst phase-locked loop 43 to sense the received en- 45
`coded composite video. The received encoded compos-
`ite video is also fed to an eight-bit analog-to-digital flash
`converter 45 for generating a digital video signal.
`In accordance with another feature of the present
`invention, the reference for the eight-bit analog-to-digi- 50
`ta! converter 45 in the decoder 40 is not supplied by a
`peak detector, but rather the reference is provided by a
`reference detector 46 gated by reference gates from the
`state counters and decoders 44. The eight-bit digital-to(cid:173)
`analog converter 36 in the encoder 20, for example, 55
`outputs a maximum or "max" reference signal in re(cid:173)
`sponse to a max reference gate from the state counters
`and decoders 24 so that a precise full scale signal is
`transmitted from the encoder 20 to the decoder 40. The
`state counters and decoders 44 in the decoder similarly 60
`generate a max reference gate fed to a max reference
`detector 46 which samples and holds the received max
`reference signal, for use as a reference to the eight-bit
`analog-to-digital converter 45. The state counters and
`decoders 44 also generate a ground reference gate for 65
`setting the horizontal sync tips precisely at signal
`ground so that the range of the eight-bit analog-to-digi-
`tal converter 45 is fully determined.
`
`4,742,543
`
`6
`The digital video is fed to a video descrambler 47 and
`digital data processing circuits 49. The digital data pro(cid:173)
`cessing circuits strip the seed number from the digital
`video and pass it to a random number generator 48. The
`seed number synchronizes the random number genera(cid:173)
`tor 48 in the decoder 40 to the random number genera(cid:173)
`tor 28 in the encoder 20. The random number regener(cid:173)
`ated in the decoder 40 is passed to the video descram(cid:173)
`bler 47.
`A customer identification PROM 50 is programmed
`with a unique customer number for each decoder. The
`customer identification number specifies a time slot in
`the digital video signal when specific customer informa(cid:173)
`tion is being transmitted and received. Some of this
`information is available on an output bus 51 so that the
`video transmission system may provide digital data
`transmission to support future products such as teletext
`and electronic mail.
`An audio descrambler 52 also receives the digital
`video signal and the random number from the random
`number generator 48. The two-channel audio signals
`are regenerated by two separate digital-to-analog con(cid:173)
`verters 53 and are fed via output lines 54 to the custom(cid:173)
`er's stero hi-ti. Two channels rather than just one are
`desired to provide for transmission of stereo or bi-lin(cid:173)
`gual programming. The descrambled video, on the
`other hand, is converted to analog form by an eight-bit
`digital-to-analog

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