`
`Samsung Exhibit 1015
`Samsung Electronics Co., Ltd. v. Daniel L. Flamm
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 1 of 8
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`5,151,871
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`Page 2 of 15
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 2 of 8
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`5,151,871
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`3
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`Page 3 of 15
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 3 of 8
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`5,151,871
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`Page 4 of 15
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 4 of8
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`5,151,871
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`U.S. Patent
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`5,151,871
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`Page 6 of 15
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`U.S. Patent
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`Sep. 29, 1992
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`5,151,871
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`Page 7 of 15
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 7 of 3
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`5,151,871
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`U.S. Patent
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`Sep. 29, 1992
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`Sheet 8 of 8
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`5,151,871
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`Page 9 of 15
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`1
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`5,151,871
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`METHOD FOR HEAT-PROCESSING
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`SEMICONDUCTOR DEVICE AND APPARATUS
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`FOR THE SAME
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`BACKGROUND OF THE INVENTION
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`1. Field of the Invention
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`The present invention relates to method and appara-
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`tus for heat-processing semiconductor wafer or LCD
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`and, more particularly, it relates to method and appara-
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`tus capable of controlling temperatures of these semi-
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`conductor wafers or LCD when these are heated up
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`and cooled down.
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`2. Description of the Related Art
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`Various kinds of heating processes are included in the
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`course of manufacturing various kinds of devices in
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`which semiconductors are included. Semiconductor
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`wafers are heated at the adhesion and baking processes
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`in the course of photo-lithographing semiconductor
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`integrated circuits, for example. More specifically, the
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`semiconductor wafers are heated and their surfaces are
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`treated with HMDS vapor at the adhesion process so as
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`to promote the photoresist bonding performance on
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`wafer surface. After the semiconductor wafer being
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`coated with photoresist, which is baked at a certain
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`temperature to remove solvent in the photoresist and to
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`enhance the polymetric cross linking of photoresist.
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`As shown in FIG. 1, various kinds of processing units
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`1 to 6 are housed in a resist-processing system 10 to
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`process the semiconductor wafers one by one. A sender
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`I is located on the inlet side of the system 10 and a
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`receiver 6 on the outlet side thereof. The semiconductor
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`wafer is transferred one by one from the sender 1 to an
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`adhesion unit 2, and adhesion-processed by the adhesion
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`unit 2. After being heated by the adhesion unit 2, the
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`semiconductor wafers are forcedly cooled by a cooling
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`unit 3 and coated with photoresist in a coating unit 4.
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`After being coated with photoresist, they are baked by
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`a baking unit 5 and transfer to the receiver 6. They are
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`carried from the receiver 6 to an exposure unit (not
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`shown) through an interface (not shown) and exposed
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`by the exposure unit located outside the system 10.
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`is needed that
`the semiconductor wafers are
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`forcedly cooled at a high speed by the cooling unit 3.
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`This is because temperatures of the wafers must be
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`accurately controlled and their surfaces must be cooled
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`to have a certain temperatureso as to uniformly coat
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`their surfaces with resist at a next process.
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`In other words, the temperature of the wafer which
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`has been processed by the conventional adhesion unit 2
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`depends upon its temperature obtained when the adhe-
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`sion process is finished relative to it on a wafer-stage in
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`the unit 2. This causes its temperature to variously
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`changes and not to be kept certain. After it is adhesion-
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`processed by the conventional unit 2, therefore, it must
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`be cooling-processed by the unit 3. The whole of the
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`conventional
`resist-processing system thus becomes
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`large in size. In addition, a forcedly-cooling time is
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`added to the wafer-carrying time in the cooling unit 3 in
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`the case of the conventional system, thereby reducing
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`the throughput of the wafers. Further, when the time
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`during which the wafer is processed through the whole
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`of the system is long, it causes more particles of dust and
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`the like to adhere to the semiconductor wafer. This is
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`not preferable from the viewpoint of quality control.
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`In the case of the conventional baking unit 5, the
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`semiconductor wafer is mounted on a heating plate
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`made of stainless steel or aluminum alloy and heated by
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`2
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`the heating plate. A thick heating element is embedded
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`in this conventional heating plate, the plate has a great
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`thickness of 30 to 50 mm and its heat capacity is large
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`accordingly. This causes the conventional heating plate
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`not to quickly raise and lower the temperature of the
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`wafer-stage in the baking unit 5. Particularly, quick .
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`cooling is theoretically difficult because the heating
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`plate has a limitation in its cooling speed.
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`As apparent from the thermal history curve shown in
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`FIG. 2, the temperature of the wafer-stage can be con-
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`trolled only when it is kept at a baking temperature T;
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`but it cannot be controlled while it is being raised and
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`cooled. The thermal history curve covering the whole
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`of baking temperatures cannot be therefore guaranteed
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`as desired. In addition, the heat capacity of the heating
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`plate is large in this case. The heating and cooling re-
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`sponse of the heating plate is thus made slow and those
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`times D4 and D7 which are needed to raise and lower
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`the temperature of the wafer-stage become long, re-
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`spectively.
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`As the thermal history curve in FIG. 3 indicates, the
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`baking unit heats the semiconductor wafer stepwise in
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`some cases, thereby to enhance the thermal durability of
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`the resist film formed on the wafer by cross linking
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`polymerization. The baking unit is controlled such that
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`the temperature of the wafer-stage remains at baking
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`temperature T2 for a predetermined time and then at
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`baking temperature T3 for a predetermined time. How-
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`ever, neither the time D5 for heating the stage from an
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`initial value to temperature T; nor the time D6 for heat-
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`ing it from temperature T2 to temperature T3 is con-
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`trolled at all. These periods D5 and D6 are relatively
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`long, and the sum of them is thus considerably long,
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`inevitably lengthening the total baking time very much.
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`Consequently, the throughput of the wafers is reduced.
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`To prevent reduction of throughput, it is necessary to
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`use a number of heating plates.
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`As the density of semiconductor devices is made
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`higher and higher, resist patterns of these devices have
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`become finer and finer. The thermal history curve (or
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`temperature changing pattern) of the wafer-stage at the
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`stage-heating and -cooling times which was neglected
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`in the case of the conventional system comes to add
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`large influence to the resolution and light-sensitivity of
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`the photoresist. "This makes it seriously necessary to
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`develop a system capable of controlling the temperature
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`of the wafer-stage to obtain a thermal history curve as
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`desired at the stage-heating and -cooling times.
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`Particularly in the case of the conventional system,
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`the temperature of the wafer-stage was not a controlled
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`predetermined condition at the stage-heating and -cool-
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`ing times. Even when the semiconductor wafers of the
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`same kinds were baking-processed, therefore, the prop-
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`erty of one wafer became different from those of the
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`other ones, thereby damaging the reliability of the semi-
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`conductor wafers thus produced.
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`SUMMARY OF THE INVENTION
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`The object of the present invention is therefore to
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`provide a simpler method of heat-processing semicon-
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`ductor devices whereby temperatures of the semicon-
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`ductor devices can be controlled at devices-heating and
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`-cooling times so as to accurately control their thermal
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`history curve.
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`According to an aspect of the present invention, there
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`can be provided a method for heat-processing object
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`comprising the steps of:
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`Page 10 of 15
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`4
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`uniform temperature in the whole of it when the film is
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`heated.
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`Additional objects and advantages of the invention
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`will be set forth in the description which follows, and in
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`part will be obvious from the description, or may be
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`learned by practice of the invention. The objects and
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`advantages of the invention may be realized and ob-
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`tained by means of the instrumentalities and combina-
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`tions particularly pointed out in the appended claims.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`The accompanying drawings, which are incorpo-
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`rated in and constitute a part of the specification, illus-
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`trate presently preferred embodiments of the invention
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`and, together with the general description given above
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`and the detailed description of the preferred embodi-
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`ments given below, serve to explain the principles of the
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`invention.
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`FIG. 1 is a block diagram showing a layout of the
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`resist processing system in which a conventional heat-
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`processing method is employed;
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`FIGS. 2 and 3 are graphs showing heat curves of a
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`wafer—stage which is heated and cooled according to a
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`conventional method;
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`FIG. 4 is a block diagram showing a layout of a resist
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`processing system in which a heat-processing method is
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`employed according to a present invention;
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`"FIG. 5A is a diagram showing a circuit of an adhe-
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`sion unit which is included in a resist processing system;
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`FIG. 5B is a block diagram showing a circuit of a
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`control system which is included in an adhesion unit;
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`FIGS. 6A to 6C are charts intended to explain PWM
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`(Pulse Wide Modulation) signal SM and cooling control
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`signal SC sent from a control system to a SSR (Solid
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`Stage Relay);
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`FIG. 7 is a chart intended to explain the temperature
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`change (include ripple of temperature) of a heating
`plate at a time when its temperature is being raised,
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`lowered and kept certain;
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`FIG. 8 is a diagram showing one of a recipe relating
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`to a thermal history curve of a wafer-stage;
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`FIG. 9 is a diagram showing another of a recipe relat-
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`ing to a thermal history curve of a wafer-stage;
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`FIG. 10 shows longitudinal sectional view of another
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`heating plate;
`FIG. 11 shows longitudinal sectional view of a heat-
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`processing system of a batch type; and
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`FIG. 12 shows transversal sectional view of a heat-
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`processing system of a batch type.
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`DETAILED DESCRIPTION OF THE
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`PREFERRED EMBODIMENTS
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`Some embodiments of the present invention will be
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`described in detail with reference to the accompanying
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`drawings.
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`As shown in FIG. 4, various kinds of processing units
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`41 to 45 are housed in a resist processing system 40 and
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`semiconductor wafers W are continuously processed by
`these processing units. A sender 41 is located on the
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`inlet side of the system 40 whilea receiver 45 on the
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`outlet side of the system 40. A cassette carrying robot
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`(not shown) can run on a clean track which extends to
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`a cassette stage located adjacent to the sender 41. The
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`sender 41 serves to pick up the semiconductor wafers W
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`one by one and transfer them to the adhesion unit 42
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`where they are heated and coated with HMDS.
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`The coating unit 43 is located next to the adhesion
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`unit 42 and it serves to form resist film of a certain
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`5,151,871
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`35
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`3
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`storing, as a predetermined recipe, information show-
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`ing a time—temperature relationship and applicable
`for either heating the object to a predetermined
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`temperature for a predetermined period of time or
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`cooling the object from a predetermined tempera-
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`ture over a predetermined period of time, or for
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`both;
`reading the information and applying the informa-
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`tion;
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`heating the object by means of a conductive thin film
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`in accordance with the information;
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`detecting the temperature of the object directly or
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`indirectly; and
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`controlling either the heating of the object or the
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`cooling thereof, or both, in accordance with the
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`detected temperature and the information.
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`According to another aspect of the present invention,
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`there can be provided an apparatus for heat-processing
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`object comprising, a stage having a conductive thin film
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`for heating the object; a detecting means for detecting
`temperatures of the object; a storing means for previ-
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`ously storing as a predetermined recipe,
`information
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`showing a time-temperature relationship and applicable
`for either heating the object to a predetermined temper-
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`ature for a predetermined period of time or cooling the
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`object from a predetermined temperature over a prede-
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`termined period of time, or for both, and a control
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`means for reading the information in the storing means,
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`and for receiving signal relating to the temperatures of
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`30
`the object detected by the detecting means, and for
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`controlling a period of heat up and cool down respon-
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`sive to the information and signal while heating the
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`object by said conductive thin film.
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`It is preferable that the apparatus further includes a
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`means for forcedly cooling the object.
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`It is also preferable that any of those heating plates
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`which are formed according to the heating theory of
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`the conductive thin film is used as the heating element.
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`This is because these heating plates are smaller in heat
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`capacity and more excellent in response.
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`It is also preferable that any of those heat-generating
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`resistance materials which are more excellent
`in re-
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`sponse and thermal durability is used as the conductive
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`thin film. These heat-generating resistance materials
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`include metal, alloy, carbon material, polymer compos-
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`ite and composite ceramic (which is conductive).
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`The single metal of which the conductive thin film is
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`chromium, nickel, platinum,
`tantalum,
`tungsten,
`tin,
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`iron, lead, beryllium, antimony, indium, cobalt, stron-
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`tium, rhodium, palladium, magnesium, molybdenum,
`lithium or rubidium. Nichrome, stainless steel, bronze,
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`brass, alumel and chrome] are mentioned as the alloy of
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`which the conductive thin film is made. Carbon black,
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`graphite and the like are mentioned as the carbon mate-
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`rial of which the conductive thin film is made. The
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`polymer composite for the conductive thin film in-
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`cludes polymer graft carbon and the like. Moybdenum
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`silicide is used as the composite ceramic of which the
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`conductive thin film is made. The composite ceramic
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`includes cermet also.
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`It is preferable that the conductive thin film is made
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`of any of those materials whose electric resistances
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`become smaller as temperature becomes higher or
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`lower. This is because a large amount of current can
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`65
`concentrate on those areas in the conductive thin film
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`where temperature is relatively lower so as to increase
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`the speed of raising the temperature of these areas in the
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`conductive thin film and to enable the film to have a
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`45
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`S0
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`60
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`Page 11 of 15
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`5,151,871
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`5
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`thickness on the surface of each of the semiconductor
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`wafers W. The baking unit 44 is located next to the
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`coating unit 43, serving to bake each of the semiconduc-
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`tor wafers W at a certain temperature.
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`The receiver 45 is located next to the baking unit 44
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`and it serves to receive the semiconductor wafers W
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`which have been resist—processed.
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`An exposure unit (not shown) is located exterior of
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`the resist processing system 40. An interface (not
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`shown) is arranged between the receiver 45 and the
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`exposure unit and the semiconductor wafers W are
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`transferred to the exposure unit by the interface.
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`The adhesion unit 42 will be described referring to
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`FIG. 5A. A case where the adhesion unit 42 includes a
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`wafer-stage 12 which can serve to heat and cool the
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`semiconductor wafers W will be described and this
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`wafer-stage ‘12 may also be used in the baking unit 44.
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`The stage 12 on which the semiconductor wafer W is
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`to be mounted is arranged in a chamber of the adhesion
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`unit 42. An HMDS supply tube 33 extends passing
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`through the top of the chamber 11. A diffusion plate 34
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`is attached to the front end of the supply tube 33, oppos-
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`ing to the wafer W on the table 12. The underportion of
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`the diffusion plate 34 is provided with a plurality of
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`25
`apertures which are communicated with the inside of a
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`bottle 31 through the supply tube 33. A bubbler 32 is
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`immersed in HMDS solution in the bottle 31 and con-
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`nected to a nitrogen gassupply source (not shown)
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`through a pipe 32a.
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`A discharge pipe 35 extends from the bottom of the
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`chamber 11 to a vacuum pump (not shown).
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`The semiconductor wafer W which has a size of 8
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`inches is mounted on the stage 12. The diffusion plate 34
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`is shaped to cover the whole area of the stage 12. An
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`35
`upper plate 13 of the stage 12 is made of alumina. It may
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`be instead made of ceramics if they have characters of
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`insulation and thermal conductivity. The upper plate 13
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`has longitudinal side and transversal side each of which
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`is in a range of 160 to 180 mm, and its thickness is in a
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`range of l to 20 mm, more preferably in a range of 5 to
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`10 mm.
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`Conductive thin film 14 is formed on the whole areas
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`of the underside of the upper plate 13 by depositing
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`metal chromium alone on the underside of the upper
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`plate 13. The thickness of this conductive thin film 14 is
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`in a range of 0.1 to 100 pm, more preferably in a range
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`of 0.5 to 2 pm.
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`Pins (not shown) are attached to the stage 12 to pick
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`up the semiconductor wafer W from the upper plate 13.
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`The semiconductor wafer W is unloaded from the stage
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`12 by the pins.
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`Electrodes 15 and 16 each made of copper and
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`shaped like a stripe are attached to the underside of
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`peripheral portion of the conductive thin film 14. These
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`55
`electrodes 15 and 16 are connected to a power supply
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`circuit 19. The power supply circuit 19 includes a com-
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`mercial AC power supply 17 and an SSR (solid state
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`relay) 18. The SSR 18 serves as a switching element. A
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`control system 20 includes a CPU 201 and a PID con-
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`troller 203. The control system 20 serves to apply sig-
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`nals SM and SC to the SSR 18 and a cooling system 23
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`responsive to inputted recipes and temperature detect-
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`ing signal.
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`As shown in FIG. 5B, the PID controller 203 in the
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`control system 20 is connected to the SSR 18. PWM
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`signal SM is inputted from the PID controller 203 to the
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`SSR 18. The PID controller 203 is also connected to a
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`cooling system 23 to apply signal SC to the latter. A
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`6
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`thermometer 24 which has a sensor 25 is connected to a
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`digital adder 202 of the control system 20. The thermal
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`sensor 25 is attached to an appropriate position on the
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`underside of the conductive thin film 14. A keyboard
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`20a is connected to the input section of the CPU 201.
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`Numeral values for creating desired adhesion process-
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`ing condition (or recipe including heating and other
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`conditions) are inputted to the CPU 201 by the key-
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`board 20a. Pulse signals are applied from a pulse genera-
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`tor 204 to each of the CPU 201, digital adder 202 and
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`PID controller 203 at a timing of one second. A address
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`counter 205 is arranged between the CPU 201 and the
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`pulse generator 204.
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`The conductive thin film 14 is coated together with
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`the electrodes 15, 16 and thermal sensor 25 by protec-
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`tion film 21, which is made of tetrafluoroethylene (Te-
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`flon ®) and serves to protect the conductive thin film
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`14 and the like.
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`A cooling jacket 22 is arranged under the stage 12 to
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`exchange heat with the conductive thin film 14 through
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`the protection film 21. An inner passage 22a is formed in
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`the jacket 22, communicating with a coolant supply
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`source in the cooling system 23, which includes a com-
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`pressor and an evaporator to circulate coolant through
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`the jacket 22. The output section of the control system
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`20 is connected to the input section of the cooling sys-
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`tem 23. The control system 20 serves to apply control
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`signal SC to the cooling system 23 responsive to the
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`recipe and temperature detecting signal so as to control
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`the amount of coolant supplied from the cooling system
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`23 to the jacket 22.
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`A case where the surface of the semiconductor wafer
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`W is adhesion-processed will be described with refer-
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`ence to FIGS. 6A through 6C and 7.
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`(I) A predetermined recipe is inputted to the CPU
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`201 by the keyboard 20a. The recipe is a command table
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`including temperature/time point data in which temper-
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`ature raising and lowering'speed is in a range of 50° to
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`200" C. per minute. Heating temperature is in a range of
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`100° to 150° C. and hold time is in a range of 0.1 to 1
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`minute. The CPU 201 interpolates points between any
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`two adjacent point data of the recipe, thereby obtaining
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`a master curve (thermal history curve).
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`(II) The semiconductor wafer W is carried from the
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`sender 41 to the adhesion unit 42 by a handling device
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`(not shown) and placed or mounted on the stage 12. The
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`inlet of the chamber 11 through which the wafer W is
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`carried is closed and gas in the chamber 11 is then dis-
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`charged through the discharge pipe 35.
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`(III) PWM signal SM is applied from the PID con-
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`troller 203 to the SSR 18. A predetermined amount of
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`current is thus added from a power supply 17 of the
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`circuit 19 to the conductive thin film 14 through the
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`electrodes 15 and 16 to heat the conductive thin film 14.
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`The semiconductor wafer W on the upper plate 13 is
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`heated by the conductive thin film 14. When PWM
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`signal SM from the PID controller 203 is changed this
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`time, the amount of current supplied to the conductive
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`thin film 14 is switching-controlled to raise the tempera-
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`ture of the wafer W at a desired heat curve.
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`PWM signal SM and cooling control signal SC will
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`be described referring to FIGS. 6A through 6C.
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`As shown in FIG. 6A, when pulse widths W1 and W2
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`of each of signals SM and SC are §T (T is one cycle) or
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`their duty cycles are 50%, as shown by a line L] in FIG.
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`7, the temperature of the upper plate 13 is substantially
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`constant. The one cycle T is equal to a second, which is
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`Page 12 of 15
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`determined by pulse signal applied from the pulse gen-
`erator 204.
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`As shown in FIG. 6B, when the pulse width W1 of
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`signal SM in one cycle T is larger than §T or its duty
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`cycle exceeds 50%, as shown by a line L2 in FIG. 7, the
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`temperature of the upper plate 13 is raised.
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`As shown in FIG. 6C, when the pulse width W1 of
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`signal SM in one cycle T is smaller than §T or its duty
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`cycle is smaller than 50%, as shown by a line L3 in FIG.
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`7, the temperature of the upper plate 13 is lowered.
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`When the pulse width of signal SM in one cycle T is
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`variously changed in this manner, the extent to which
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`the upper plate 13 is heated by the conductive thin film
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`14 can be freely changed to raise the temperature of the
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`wafer W at a desired heat curve. The other, when the
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`pulse width of signal SC in one cycle T is variously
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`changed in this manner, the upper plate 13 is cooled by
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`the cooling system 23.
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`(IV) The temperature of the thin film 14 is detected
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`by the sensor 25 of the thermometer 24 and this detec-
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`tion signal
`is inputted to the digital adder 202. The
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`temperature measured is determined on the basis of the
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`detection signal in the digital adder 202 and the amount
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`of current supplied to the conductive thin film 14 is
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`feedback-controlled responsive to the temperature mea-
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`sured. When the measured temperature which is deter-
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`mined on the basis of the detection signal coincides with
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`a predetermined temperature to be held, the duty cycle
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`of signal SM is made equal to 50% to hold the tempera-
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`ture of the upper plate 13 in a range of 100° to 150° C.
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`for a time period of 0.5 to 1 minute.
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`(V) I-IMDS solution is sprayed onto the semiconduc-
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`tor wafer W which is held at the predetermined temper-
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`ature, thereby causing HMDS to adhere to the surface
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`of the wafer W.
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`(VI) After the wafer W is held at the predetermined
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`temperature, the duty cycle of signal SM is changed
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`smaller than 50% to lower the temperature of the upper
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`plate 13. Signal SC whose duty cycle is larger than 50%
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`is applied from the PID controller 203 to the cooling
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`system 23 at the same time to supply coolant to the’
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`jacket 22 so as to forcedly cool
`the upper plate 13.
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`Signals SM and SC are determined this time by the PID
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`controller 203 responsive to the temperature of the thin
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`film 14 detected by the sensor 25.
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`(VII) After the semiconductor wafer A is cooled, the
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`pin is projected to pick up the wafer W from the upper
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`plate 13 and carry it out of the chamber.
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`According to the above-described embodiment, heat
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`curve of temperature-raising and lowering periods can
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`be controlled, as a result of the throughput of wafers
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`increase.
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`A case where the semiconductor wafer W is baking-
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`processed after it is coated by resist will be described
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`referring to FIGS. 8 through 10. That portion of de-
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`scription relating to the baking process which overlaps
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`the above description relating to