UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________
`
`SAMSUNG ELECTRONICS CO., LTD.
`Petitioner
`
`v.
`
`DANIEL L. FLAMM
`Patent Owner
`
`____________________
`
`Patent No. RE 40,264 E
`____________________
`
`DECLARATION OF DR. STANLEY SHANFIELD IN SUPPORT OF
`PETITION FOR INTER PARTES REVIEW
`OF U.S. PATENT NO. RE 40,264 E
`
`
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`Page 1 of 114
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`Samsung Exhibit 10(cid:19)(cid:21)
`Samsung Electronics Co., Ltd. v. Daniel L. Flamm
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`

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`
`
`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
`
`
`TABLE OF CONTENTS
`INTRODUCTION ........................................................................................... 3 
`
`BACKGROUND AND QUALIFICATIONS ................................................. 3 
`
`I.
` 
`
`II.
` 
`
`
`
`  MATERIALS REVIEWED ............................................................................ 7 III.
`
`IV.
`
`  PERSON OF ORDINARY SKILL IN THE ART .......................................... 9 
`
`V.
`
`  OVERVIEW OF THE ’264 PATENT .......................................................... 10 
`A. 
`The ’264 Patent ................................................................................... 10 
`B. 
`Priority Date of the ’264 Patent........................................................... 14 
`
`VI.
`
`  CLAIM CONSTRUCTION .......................................................................... 15 
`
`  TECHNICAL BACKGROUND & PRIOR ART CONSIDERED ............... 16 VII.
`
`
`A. 
`Technical Background ......................................................................... 16 
`B. 
`Okada I ................................................................................................ 17 
`C. 
`Incropera .............................................................................................. 20 
`D.  Anderson ............................................................................................. 23 
`E. 
`Thomas ................................................................................................ 23 
`F. 
`Narita ................................................................................................... 24 
`G.  Kadomura ............................................................................................ 27 
`H. 
`Ishikawa ............................................................................................... 28 
`I. 
`Okada II ............................................................................................... 28 
`J.  Mahawili .............................................................................................. 30 
`K.  Matsumura ........................................................................................... 31 
`
`  THE PRIOR ART DISCLOSES OR SUGGESTS ALL OF THE VIII.
`
`
`FEATURES OF THE CHALLENGED CLAIMS ........................................ 35 
`A.  Okada I, Incropera, and Anderson Disclose or Suggest the
`Features of Claims 13, 15, 16, 22, and 64 ........................................... 35 
`1. 
`Claim 13 .................................................................................... 37 
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`B. 
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`C. 
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
`
`Claim 15 .................................................................................... 52 
`2. 
`Claim 16 .................................................................................... 53 
`3. 
`Claim 22 .................................................................................... 53 
`4. 
`Claim 64 .................................................................................... 56 
`5. 
`Okada I, Incropera, Anderson, and Thomas Disclose or Suggest
`the Features of Claim 14 ..................................................................... 57 
`1. 
`Claim 14 .................................................................................... 59 
`Okada I, Incropera, Anderson, and Narita Disclose or Suggest
`the Features of Claim 17 ..................................................................... 62 
`1. 
`Claim 17 .................................................................................... 64 
`D.  Okada I, Incropera, Anderson, and Yin Disclose or Suggest the
`Features of Claim 18 ........................................................................... 68 
`1. 
`Claim 18 .................................................................................... 70 
`Okada I, Incropera, Anderson, and Ishikawa Disclose or
`Suggest the Features of Claims 19 and 20 .......................................... 71 
`1. 
`Claim 19 .................................................................................... 73 
`2. 
`Claim 20 .................................................................................... 76 
`Okada I, Incropera, Anderson, and Kadomura Disclose or
`Suggest the Features of Claims 21 and 23 .......................................... 79 
`1. 
`Claim 21 .................................................................................... 81 
`2. 
`Claim 23 .................................................................................... 85 
`G.  Okada I, Incropera, Anderson, Kadomura, and Okada II
`Disclose or Suggest the Features of Claim 24 .................................... 88 
`1. 
`Claim 24 .................................................................................... 90 
`H.  Okada I, Incropera, Anderson, and Mahawili Disclose or
`Suggest the Features of Claims 25 and 26 .......................................... 93 
`1. 
`Claim 25 .................................................................................... 95 
`2. 
`Claim 26 ..................................................................................100 
`Okada I, Incropera, Anderson, and Matsumura Disclose or
`Suggest the Features of Claim 65 ......................................................101 
`1. 
`Claim 65 ..................................................................................103 
`
`E. 
`
`F. 
`
`I. 
`
`  CONCLUSION ............................................................................................107 
`
`IX.
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`I, Stanley Shanfield, declare as follows:
`
`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
`
`
`
`I.
`
`INTRODUCTION
`1.
`
`I have been retained by Samsung Electronics Co., Ltd. (“Petitioner”)
`
`as an independent expert consultant in this proceeding before the United States
`
`Patent and Trademark Office (“PTO”).
`
`2. My retention is through Rubin/Anders Scientific, Inc. (“Rubin”).
`
`Rubin bills $385 per hour for my services in this matter, which is my regular and
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`customary rate.
`
`3. My compensation is in no way contingent on the nature of my
`
`findings, the presentation of my findings in testimony, or the outcome of this or
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`any other proceeding. I have no other interest in this proceeding.
`
`4.
`
`I have been asked to consider whether certain references disclose or
`
`suggest the features recited in the claims of U.S. Patent No. RE 40,264 E (“the
`
`’264 Patent”) (Ex. 1001)1. My opinions are set forth below.
`
` BACKGROUND AND QUALIFICATIONS
`II.
`5.
`I am an independent consultant. All of my opinions stated in this
`
`declaration are based on my own personal knowledge and professional judgment.
`
`
`1 Where appropriate, I refer to exhibits I understand are attached to the petition for
`
`Inter Partes Review of the ’264 patent.
`
`3
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`In forming my opinions, I have relied on my knowledge and experience in
`
`designing, developing, and researching plasma processing systems.
`
`6.
`
`I am over 18 years of age and, if I am called upon to do so, I would be
`
`competent to testify as to the matters set forth herein. A copy of my current
`
`curriculum vitae, which details my education and professional and academic
`
`experience, is attached as an addendum to this declaration. The following provides
`
`an overview of some of my experience that is relevant to the matters set forth in
`
`this declaration.
`
`7.
`
`I received a B.S. in Physics from the University of California, Irvine
`
`in 1977. I received the University of California Regents Award for Outstanding
`
`Research Project for my experimental and theoretical work on rotating relativistic
`
`electron beams. Under full ERDA (DOE) scholarship, I received a Ph.D. in
`
`Physics from the Massachusetts Institute of Technology in 1981.
`
`8.
`
`After receiving my doctorate degree, I worked at Spire Corporation in
`
`Bedford, Massachusetts from 1981-1984, where I served as a Staff Scientist, and
`
`later, a Senior Staff Scientist. At Spire, I developed new methods for low
`
`temperature deposition of plasma-assisted CVD epitaxial silicon. In addition, I
`
`built, operated, and characterized an ion-assisted deposition system for making
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`coating for semiconductor and machine tool industries.
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`4
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`From 1985-1999, I worked at Raytheon Corporation. As staff and
`
`9.
`
`later as Section manager, I developed reactive ion etching (RIE) processes for
`
`patterning dielectrics (silicon dioxide, silicon nitride, silicon oxynitride, etc.),
`
`conductive layers (aluminum-copper, copper-silicon, W-silicide, TaN, doped
`
`polysilicon, etc.) and organic layers (photoresist, polyimide, etc.). For example, I
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`developed a low damage, high selectivity process as part of the FET gate formation
`
`step. I was responsible for purchasing equipment and developing processes for
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`several plasma systems typical of those used in the semiconductor industry,
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`including load-locked RIE, microwave ECR RIE, barrel etchers, single-wafer
`
`elevated temperature RIE systems, etc.
`
`10.
`
`In 1996, I became the Manager of Semiconductor Operations at
`
`Raytheon. As Manager, I built and led a 300 employee, $60 million revenue-
`
`generating semiconductor development, commercial system design, and electronic
`
`module manufacturing operation. I was responsible for and worked closely with
`
`teams that purchased and process-qualified production dry etching equipment,
`
`including high throughput, elevated temperature RIE (Chlorine and Fluorine-based
`
`chemistry), low temperature RIE, and high rate barrel etchers. I participated in
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`efforts to increase the productivity of dry etching processes, including the
`
`incorporation of gas backside wafer cooling and increased capacity liquid
`
`temperature control systems.
`
`5
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`11. From 1999-2001, I worked at AXSUN Technologies as part of the
`
`founding team, first as the Director of Manufacturing & Wafer Fab Technology,
`
`and later, as the Vice President of Operations. As Director of Manufacturing &
`
`Wafer Fab Technology, I led device and module manufacturing, creating a wafer
`
`fab and circuit board assembly infrastructure; my responsibilities included hiring
`
`over 70 individuals and leading production design efforts. In my role as Vice
`
`President of Operations, I designed, fabricated, and productized AXSUN’s
`
`microelectromechanical (MEM) Fabry-Perot optical filter, and managed a new
`
`generation of electronics module design. In addition, I established a process and
`
`fabrication facility in Belfast, Northern Ireland for producing thick oxide silicon-
`
`on-insulator devices. As a result of my work at AXSUN, I was awarded patents on
`
`semiconductor processing and control electronics.
`
`12.
`
`I have served since 2003 at the Charles Stark Draper Laboratory
`
`(“Draper Laboratory”) in Cambridge, Massachusetts, ultimately becoming a
`
`Distinguished Member of Technical Staff and Technical Director in Advanced
`
`Hardware Development. I led the Advanced Hardware Development Division
`
`(approximately 80 staff) in their work on the laboratory’s multi-chip integrated
`
`circuit module facility. I directly participated in the development of dry etching
`
`processes in this facility for the fabrication of MEM-based gyroscopes, including
`
`an adaptation of the Bosch process, and the implementation of other variable-
`
`6
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`temperature reactive ion etching processes. In addition, I led a team that developed
`
`high-selectivity dry etching processes needed in the fabrication of extremely high
`
`density, multi-layer integrated circuit interconnect designs.
`
`13.
`
`I have authored more than 25 journal and conference papers; my
`
`publications include numerous papers on topics relating to semiconductor
`
`processing, advanced semiconductor devices, electronic circuit design and
`
`packaging. I have been invited to give professional talks at various conferences. I
`
`am also a co-inventor of several U.S. Patents.
`
`14.
`
`I am not an attorney and offer no legal opinions, but in the course of
`
`my work, I have had experience studying and analyzing patents and patent claims
`
`from the perspective of a person skilled in the art.
`
`III.
`
` MATERIALS REVIEWED
`15. The opinions in this Declaration are based on the documents I
`
`reviewed, my knowledge and experience, and professional judgment. In forming
`
`my opinions expressed in this Declaration, I have reviewed the following
`
`materials: U.S. Patent No. RE 40,264 E (Ex. 1001); Prosecution History of U.S.
`
`Patent No. RE 40,264 (Ex. 1003); Prosecution History of U.S. Patent Application
`
`No. 09/151,163 (Ex. 1004); Prosecution History Prosecution History of U.S. Patent
`
`Application No. 08/567,224 (Ex. 1005); Japanese Patent Publication H5–136095
`
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`(“Okada I”) (Ex. 1006)2; Fundamentals of Heat and Mass Transfer (“Incropera”)
`
`(Ex. 1007); U.S. Statutory Invention Registration H1145 (“Anderson”) (Ex. 1008);
`
`U.S. Patent No. 4,680,086 (“Thomas”) (Ex. 1009); U.S. Patent No. 5,876,119
`
`(“Ishikawa”) (Ex. 1010); European Publication No. 0665575 (“Yin”) (Ex. 1011);
`
`U.S. Patent No. 6,063,710 (“Kadomura”) (Ex. 1012); Japanese Patent Publication
`
`No. H5–243191 (“Okada II”) (Ex. 1013)3; U.S. Patent No. 5,059,770 (“Mahawili”)
`
`(Ex. 1014); U.S. Patent No. 5,151,871 (“Matsumura”) (Ex. 1015); European
`
`Publication No. 0601788 (“Collins”) (Ex. 1016); U.S. Patent No. 5,884,778
`
`(Sherstinsky) (Ex. 1017); U.S. Patent No. 5,746,928 (“Yen”) (Ex. 1018); U.S.
`
`Patent No. 4,913,790 (“Narita”) (Ex. 1019); Igarashi et al., “Sub-quarter Micron
`
`Copper Interconnects
`
`through Dry Etching Process and
`
`its Reliability,”
`
`Symposium on VLSI Technology Digest of Technical Papers (1994) (“Igarashi”)
`
`
`2 Ex. 1006 is a compilation containing the English-language translation of
`
`Okada I (id. at 1-4), followed by the Japanese language version of Okada I (id. at
`
`5-6).
`
`3 Ex. 1013 is a compilation containing the English-language translation of
`
`Okada II (id. at 1-10), followed by the Japanese language version of Okada II (id.
`
`at 11-14).
`
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`(Ex. 1020) and any other materials I refer to in this declaration in support of my
`
`opinions.
`
`16. All of the opinions contained in this declaration are based on the
`
`documents I reviewed and my knowledge and professional judgment. My opinions
`
`have also been guided by my appreciation of how a person of ordinary skill in the
`
`art would have understood the claims and the specification of the ’264 patent at the
`
`time of the alleged invention, which I have been asked to initially consider as mid
`
`1997 (September 11, 1997, the filing date of the U.S. Provisional Patent
`
`Application No. 60/058,650 from which the ’264 patent claims priority). My
`
`opinions reflect how one of ordinary skill in the art would have understood the
`
`’264 patent, the prior art to the patent, and the state of the art at the time of the
`
`alleged invention.
`
`17. Based on my experience and expertise, it is my opinion that certain
`
`references disclose all the features recited in claims 13-26, 64, and 65 (“challenged
`
`claims”) of the ’264 patent, as I discuss in detail below.
`
`IV.
`
` PERSON OF ORDINARY SKILL IN THE ART
`18.
`I was asked to provide my opinion on the level of one of ordinary skill
`
`in the art with respect to the invention of the ’264 patent as of the mid-1997 to
`
`September 1997 timeframe. Based on my review of the types of problems
`
`encountered in the art, prior solutions to those problems, the rapidity with which
`
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`innovations were made, the sophistication of the technology, and the educational
`
`level of active workers in the field, I believe a person of ordinary skill in art at that
`
`time would have had at least (i) a Bachelor's degree in engineering, physics,
`
`chemistry, materials science, or a similar field, and three or four years of work
`
`experience in semiconductor manufacturing or related fields, or (ii) a Master's
`
`degree in engineering, physics, chemistry, materials science, or a similar field and
`
`two or three years of work experience in semiconductor manufacturing or related
`
`fields). More education can supplement practical experience and vice versa.
`
`Depending on the engineering background and level of education of a person, it
`
`would have taken a few years for the person to become familiar with the problems
`
`encountered in the art and become familiar with the prior and current solutions to
`
`those problems. All of my opinions in this declaration are from the perspective of
`
`one of ordinary skill in the art as I have defined it here during the relevant
`
`timeframe (mid-1997 to September 1997 timeframe).
`
`V.
`
` OVERVIEW OF THE ’264 PATENT
`A. The ’264 Patent
`19. The ’264 patent, titled “Multi-Temperature Processing,” is directed to
`
`a method “for etching a substrate in the manufacture of a device.” (Ex. 1001 at
`
`Abstract.) The apparatus used in the method is shown in Figure 1, reproduced
`
`below.
`
`10
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`(Ex. 1001 at Fig. 1.)
`
`20. Figure 1 illustrates an etch apparatus including a chamber 12 and a
`
`pedestal 18 (substrate holder). (Id. at 3:24-25, 3:32-33, 3:40-41.) Figure 6
`
`illustrates a “block diagram of a substrate holder 600 . . . .” (Id. at 14:27-28.) The
`
`substrate holder 600 includes “a backside surface 608,” which includes a plurality
`
`of zones 608A, 608B, 608C, and 608D. (Id. at 14:31-44.) Each of the zones,
`
`separated from each other by a baffle 605, has an inlet 613 and outlet 611 for
`
`temperature controlled fluid to enter and exit the zones “to heat or cool the upper
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`surface of the substrate holder” that holds an object (e.g., a wafer). (Id. at 14:31-
`
`44, 14:62-63, 15:39-40.)
`
`(Id. at Fig. 6.) The substrate holder can also include a plurality of heating elements
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`607 that “selectively heat one or more zones . . . .” (Id. at 15:10-15.)
`
`
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`21. Referring to figure 7, the operation of the temperature control system
`
`is described. The substrate holder receives fluid heated by heating unit 705 and the
`
`fluid transfers energy in the form of heat to the substrate holder. (Id. at 16:5-20.)
`
`The fluid can also be cooled using a heat exchanger 723. (Id.)
`
`
`
`(Id. at Figs. 6 and 7.) According to the ’264 patent, “[t]he desired fluid
`
`temperature is determined by comparing the desired wafer or wafer chuck set point
`
`temperature to a measured wafer or wafer chuck temperature . . . . The heat
`
`exchanger, fluid flow rate, coolant-side fluid temperature, heater power, chuck, etc.
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`should be designed using conventional means to permit the heater to bring the fluid
`
`to a setpoint temperature and bring the temperature of the chuck and wafer to
`
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`U.S. Patent No. RE 40,264 E
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`predetermined temperatures within specified time intervals and within specified
`
`uniformity limits. (Id. at 16:36–39, 16:50–67.)
`
`B. Priority Date of the ’264 Patent
`22.
`I understand that the ’264 patent claims priority back to U.S. Patent
`
`Application No. 08/567,224 (“the ’224 application”), filed on December 4, 1995
`
`and also claims the benefit of U.S. Provisional Application No. 06/058,650, filed
`
`on September 11, 1997. I have been asked to evaluate the ’224 application and
`
`provide my opinion on whether the challenged claims are supported by the ’224
`
`application. In my opinion, the challenged claims are not supported by the ’224
`
`application.
`
`23. Each of the challenged claims of the ’264 patent recites the concept of
`
`changing a temperature of the same substrate holder from a first temperature to a
`
`second temperature and etching portions of the same film while the substrate
`
`holder is at different temperatures. (See, e.g., Ex. 1001, claim 13 (“setting the
`
`substrate holder to a selected first substrate holder temperature with a heat transfer
`
`device; etching a first portion of the film while the substrate holder is at the
`
`selected first substrate holder temperature; with the heat transfer device, changing
`
`the substrate holder temperature from
`
`the selected first substrate holder
`
`temperature to a selected second substrate holder temperature; etching a second
`
`portion of the film while the substrate holder is at the selected second substrate
`
`14
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`holder temperature”).) The claims further recite the concept of a “selected thermal
`
`mass.” (Ex. 1001, claim 13 (“the thermal mass of the substrate holder is selected
`
`for a predetermined temperature change within a specific interval of time during
`
`processing”).)
`
`24.
`
`I have reviewed the ’224 application and determined that these
`
`features are not disclosed in the ’224 application. The ’224 application describes
`
`transferring a wafer between two chambers in which the pedestals are maintained
`
`at different temperatures. (Ex. 1005 at 45-46.) But it does not disclose and
`
`support at least the above features recited in the challenged claims of the ’264
`
`patent. In my opinion, nothing in the specification, drawings, or elsewhere of the
`
`’224 application discloses or suggests to one of ordinary skill in the art the above
`
`identified missing features.
`
`VI.
`
` CLAIM CONSTRUCTION
`25.
`I have been asked to give all the claim terms of the challenged claims
`
`for the ’264 patent their ordinary and customary meaning, as would be understood
`
`by a person of ordinary skill in the art, at the time of the alleged invention, which I
`
`understand is mid-1997 to September 1997 timeframe (e.g., September 11, 1997,
`
`the filing date of the ’650 provisional) having taken into consideration the
`
`language of the claims, the specification, and the prosecution history of record. I
`
`applied this understanding in my analysis and in forming my opinions in this
`
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`Declaration. I also understand that in a previous IPR proceeding involving the
`
`’264 patent and the challenged claims (IPR2015-01759), the Board construed the
`
`term “selected thermal mass” as “thermal mass selected by selecting the mass of
`
`the substrate holder, the material of the substrate holder, or both.” I also
`
`considered and applied this interpretation in my analysis and in forming my
`
`opinions in this Declaration, where appropriate.
`
` TECHNICAL BACKGROUND & PRIOR ART CONSIDERED
`VII.
`A. Technical Background
`26. The prior art I considered and discuss in this declaration, and the ’264
`
`patent, generally relates to techniques for the manufacture, fabrication, and/or
`
`production of semiconductor components and devices prior to September 1997.
`
`As I discuss in detail in the sections to follow, the prior art discloses that plasma
`
`techniques for the manufacture, fabrication, and/or production of semiconductor
`
`components and devices around September 1997 had made significant
`
`advancements. Depending on the application of a device, different etching
`
`processes were used. For instance, techniques were known that performed plasma
`
`etching (more particularly, dry etching) such that different layers of a film were
`
`etched at different temperatures. (See generally Ex. 1006.) Sophisticated
`
`mechanisms had already been developed that controlled the temperature of both
`
`the substrate and the substrate holder. (See generally Exs. 1006-1020.)
`
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`Furthermore, the principle that the “thermal mass” of an object affects the rate of
`
`temperature change of the object was known for decades if not longer before the
`
`’264 patent. (See generally Ex. 1007.) The features in the challenged claims recite
`
`these well-known techniques, which are disclosed and suggested in the prior art.
`
`B. Okada I
`27. Okada I discloses a dry etching apparatus that converts a process gas
`
`into plasma, which is then used to etch an oxide film on a semiconductor substrate.
`
`(See, e.g., Ex. 1006 at ¶¶ [0008] - [0011], [0017] - [0021], Figs. 1, 2.) Okada I
`
`discloses a dry etching apparatus in figure 1 that includes a vacuum process
`
`chamber. (Ex. 1006 at ¶¶ [0008], [0010], [0021], Fig. 1, claim 1.)
`
`17
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`(Id. at Fig. 1 (annotated).) Inside the vacuum process chamber is “an electrode 25
`
`on which a semiconductor substrate 29 is placed.” (Ex. 1006 at ¶ [0011].)
`
`Substrate 29 has an oxide film on it that is etched by using the dry etching
`
`apparatus disclosed in Okada I. (Id. at ¶¶ [0008], [0017], [0020], [0021], Fig. 2.)
`
`28. Okada I discloses a plurality of coolant tanks 7, 8, and 9 that have
`
`coolants at temperatures A, B, and C, respectively. (Id. at ¶¶ [0012]–[0014].)
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`“When the electrode 25 needs to be at temperature A, valves 16 and 19 are opened,
`
`so that the coolant within the coolant tank 7, which is maintained at temperature A,
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`is fed into the electrode 25 by the pump 13.” (Id. at ¶ [0015], Fig. 1.) “In this
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`case, valves 17, 18, 20, and 21 are closed, so that the coolants within the coolant
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`tanks 8 and 9 are not fed into the electrode 25.”
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`29.
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`In an example disclosed by Okada I, electrode 25 is set to -50º C by
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`selectively opening valves 16 and 19 for coolant tank 7 and providing coolant from
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`coolant tank 7 which is at -50º C. (Id. at ¶ [0015], [0018].) “Etching is carried out
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`with the electrode 25 maintained at -50°C.” (Id. at ¶ [0018].) Okada I discloses
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`that the etching angle in the first etching step is 60 degrees. (Id. at ¶ [0020].)
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`Figure 2 of Okada I, which illustrates this etching, shows that in the first etching
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`step a first portion of the oxide film 30 is etched.
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`(Id. at Fig. 2 (annotated).) “Similarly, in the second etching step etching is carried
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`out at -30°C . . . .” (Ex. 1006 at ¶ [0019].) That is, electrode 25 is set to a
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`temperature of -30°C by supplying coolant from coolant tank 8 that is set at -30°C.
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`(Id. at ¶¶ [0018], [0016].)
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`C. Incropera
`30.
`Incropera is a textbook that sets forth basic principles of heat transfer
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`in objects. It explains that how fast an object heats or cools down depends on its
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`“thermal mass.” Incropera discloses that if an object is at an initial temperature Ti
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`and is cooled by a source at temperature T∞, the rate of temperature change (i.e.,
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`the change in temperature of the object within a given time) depends on the
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`“thermal capacitance” of the object. (Ex. 1007 at 226–228.) For instance,
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`Incropera explains that “[e]quation 5.6 may be used to compute the temperature
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`reached by the solid at some time t,” where equation 5.6 is:
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`(Id. at 228.)
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`31. Equation 5.6 provides that the time (t) it takes for an object to change
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`from an initial temperature Ti to a temperature T depends on the product of ‘ρ’
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`(density), ‘c’ (specific heat), and ‘V’ (volume). This product is the “thermal mass”
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`Declaration of Dr. Stanley Shanfield
`U.S. Patent No. RE 40,264 E
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`of the object.4 One of ordinary skill in the art would have recognized that if a
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`certain temperature rate of change is desired for an object, equation 5.6 can be used
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`to select the thermal mass by filling in the temperature (T = desired temperature, Ti
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`= initial temperature) and time (t = time to change from Ti to T) values in equation
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`5.6. On the other hand, in this equation As refers to the cross sectional area, and h
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`to the connective coefficient. Incropera’s figure 5.2 shows that for different
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`thermal masses, the rate of temperature change is different. (Id. at 228.)
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`4 Incropera refers to ‘ρVc’ as the “thermal capacitance,” which one of
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`ordinary skill would have understood is the same as “thermal mass.” One of
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`ordinary skill in the art would have known that “thermal mass” is defined as the
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`product of specific heat and mass. Because density x volume = mass, ‘ρVc’ equals
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`the product of specific heat and mass, i.e., “thermal mass.”
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`U.S. Patent No. RE 40,264 E
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`(Id.)
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`32. For example, figure 5.2 illustrates that the time taken by an object for
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`a given amount of temperature change (as captured by the ratio plotted on the y-
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`axis in Fig. 5.2) is different for different thermal masses. (Id. at 228.) Indeed,
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`Incropera discloses that an increase in the thermal mass Ct (which denotes ‘ρVc’ or
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`“thermal mass,” see equation 5.7) will result in an increase in the time it takes for
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`an object to undergo a predetermined temperature change. (Id. at 228, “Any
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`increase in . . . Ct will cause a solid to respond more slowly to changes in its
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`thermal environment and will increase the time required to reach thermal
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`equilibrium . . . .”)
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`D. Anderson
`33. Anderson discloses that the “thermal mass” selection (which is
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`disclosed in Incropera) is a critical feature for a substrate holder or chuck (e.g.,
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`electrode 25 in Okada I) because the thermal mass affects the rate of heating or
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`cooling of the substrate holder. (Ex. 1008 at 6:24–28.) Anderson discloses that in
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`a plasma etching process, a substrate holder or chuck is frequently used to control
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`the temperature of a wafer. (Id. at Abstract, 1:27–36.) “For maximum throughput
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`of the tool in . . . plasma processes, it is imperative that the wafer be brought up to
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`its operating temperature as quickly as possible.” (Id. at 2:60–65.) Anderson
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`discloses that the low thermal mass of the substrate holder makes it possible to
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`quickly change the temperature of the wafer. (Id. at 6:24–28.)
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`E. Thomas
`34. Thomas describes “a method useful for dry etching refractory metal
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`silicide/polysilicon structures in the manufacture of . . . semiconductor integrated
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`circuits.” (Ex. 1009 at 1:5–10.) Thomas discloses that dry etching involves
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`etching using plasma. (Id. at 1:13–32.) Thomas further discloses etching a silicide
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`material at 20°C during the first stage of the etch process and then etching a
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`polysilicon material at 5°C during the second stage of the etching process. (See,
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`e.g., Ex. 1009, 3:33–46, 3:57–3:67.) Even though the first stage of the etching
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`process may etch some of the polysilicon material 42 underlying the silicide layer
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`43, no silicide material is etched during the second stage. (Id. at 4:40–45, 4:48–50,
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`Figs. 2A, 2B, 2C.)
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`F. Narita
`35. Narita discloses a method for treating “a surface of a workpiece while
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`accurately controlling the temperature of the workpiece.” (Ex. 1019 at 2:7–10.)
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`Narita further discloses that the method can be applied to plasma etching and
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`thermal chemical