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`US008611404B2
`
`c12) United States Patent
`Greszczuk et al.
`
`(10) Patent No.:
`(45) Date of Patent:
`
`US 8,611,404 B2
`Dec. 17, 2013
`
`(54) MULTICARRIER TRANSMISSION SYSTEM
`WITH LOW POWER SLEEP MODE AND
`RAPID-ON CAPABILITY
`
`(71) Applicant: TQ Delta, LLC,Austin, TX (US)
`
`(72)
`
`Inventors: John A. Greszczuk, Stow, MA (US);
`Richard W. Gross, Acton, MA (US);
`Halil Padir, N. Andover, MA (US);
`Michael A. Tzannes, Lexington, MA
`(US)
`
`(73) Assignee: TQ Delta, LLC, Austin, TX (US)
`
`( *) Notice:
`
`Subject to any disclaimer, the term ofthis
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(21) Appl. No.: 13/887,889
`
`(22) Filed:
`
`May 6, 2013
`
`(2006.01)
`(2006.01)
`
`(60) Provisional application No. 60/072,447, filed on Jan.
`26, 1998.
`Int. Cl.
`H04L 5116
`H04L 27128
`(52) U.S. Cl.
`USPC ........................................... 375/219; 375/260
`(58) Field of Classification Search
`USPC ......... 375/219, 220, 222, 260, 282, 356, 373,
`375/376; 370/278, 311, 503; 455/500, 551,
`455/560, 574
`See application file for complete search history.
`References Cited
`
`(51)
`
`(56)
`
`U.S. PATENT DOCUMENTS
`
`5,206,886 A
`5,224,152 A
`
`4/1993 Bingham
`611993 Harte
`(Continued)
`
`FOREIGN PATENT DOCUMENTS
`
`3/1992
`0473465
`0840474
`5/1998
`(Continued)
`OTHER PUBLICATIONS
`
`(65)
`
`Prior Publication Data
`
`US 2013/0243051 Al
`
`Sep. 19, 2013
`
`EP
`EP
`
`Related U.S. Application Data
`
`(63) Continuation of application No. 13/152,558, filed on
`Jun. 3, 2011, now Pat. No. 8,437,382, which is a
`continuation of application No. 12/615,946, filed on
`Nov. 10, 2009, now Pat. No. 7,978,753, which is a
`continuation of application No. 11/425,507, filed on
`Jun. 21, 2006, now Pat. No. 7,697,598, which is a
`continuation of application No. 11/289,516, filed on
`Nov. 30, 2005, now abandoned, which
`is a
`continuation of application No. 11/090,183, filed on
`Mar. 28, 2005, now abandoned, which
`is a
`continuation of application No. 10/778,083, filed on
`Feb. 17, 2004, now abandoned, which is a continuation
`of application No. 10/175,815, filed on Jun. 21, 2002,
`now abandoned, which is a continuation of application
`No.
`09/581,400,
`filed
`as
`application No.
`PCT/US99/01539 on Jan. 26, 1999, now Pat. No.
`6,445,730.
`
`Bingham, "Multicarrier Modulation for Data Transmission: An Idea
`Whose Time Has Come," IEEE Communications Magazine, May
`1990, vol. 28(5), pp. 5-8, 11.
`
`(Continued)
`Primary Examiner - Khai Tran
`(74) Attorney, Agent, or Firm -Jason H. Vick; Sheridan
`Ross, PC
`ABSTRACT
`(57)
`A multicarrier transceiver is provided with a sleep mode in
`which it idles with reduced power consumption when it is not
`needed to transmit or receive data. The full transmission and
`reception capabilities of the transceiver are quickly restored
`when needed, without requiring the full (and time-consum(cid:173)
`ing) initialization commonly needed to restore such trans(cid:173)
`ceivers to operation after inactivity.
`20 Claims, 4 Drawing Sheets
`
`CSCO-1001
`Cisco v. TQ Delta
`Page 1 of 13
`
`

`
`US 8,611,404 B2
`Page 2
`
`713/300
`
`(56)
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`JP
`JP
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`WO
`WO
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`
`H04-227348 A
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`H06-l 14196
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`Hl0-327309
`1998-26703
`WO 98/09461
`WO 98/35473
`WO 99/20027
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`
`8/1992
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`1111994
`3/1995
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`12/1998
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`4/1999
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`
`OTHER PUBLICATIONS
`
`Series G: Transmission Systems and Media, Digital Systems and
`Networks, "SpitterlessAsymmetric Digital Subscriber Line (ADSL)
`transceivers," ITU-T G.992,2, International Telecommunication
`Union, Jun. 1999, 179 pages.
`Macq et al., "A CMOS activity detector for ADSL link," ESSCIRC
`1995, 21st European Solid-State Circuits Conference, Sep. 19-21,
`1995, pp. 430-433.
`International Search Report for International (PCT) App. No. PCT/
`US99/01539, mailed Oct. 29, 1999.
`International Preliminary Examination Report for International
`(PCT) App. No. PCT/US99/01539, mailed Dec. 6, 2000.
`Examiner's First Report for Australian Patent Application No.
`23409/99, dated Feb. 7, 2003.
`Notice of Acceptance for Australian Patent Application No. 23409/
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`
`Official Action for Canadian Patent Application No. 23 57 5 51, dated
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`dated Dec. 14, 2007.
`Official Action for Canadian Patent Application No. 2,633,064, dated
`Oct. 31, 2008.
`Official Action for Canadian Patent Application No. 2,633,064, dated
`Aug. 17, 2009.
`Notice of Allowance for Canadian Patent Application No. 2,633,064,
`dated Mar. 5, 2010.
`Official Action for Canadian Patent Application No. 2,633,064, dated
`Oct. 15, 2010.
`Communication under Rule 51( 4) EPC, dated Apr. 22, 2004, granting
`European Patent Application No. 99 909 970.7-2411.
`European Search Report for European Patent Application No. EP
`04022871, dated Jul. 6, 2005.
`Communication under Rule 51(4) EPC, datedMay7, 2007, granting
`European Patent Application No. 04022871.0.
`Extended European Search Report and Opinion for European Patent
`Application No. 07021150, dated Feb. 15, 2008.
`European Examination Report for European Patent Application No.
`07021150, dated Oct. 9, 2008.
`Official Action for European Patent Application No. 07021150, dated
`May6,2010.
`Communication under Rule 71(3) EPC for European Patent Appli(cid:173)
`cation No. 07021150.3, dated May 30, 2011.
`Extended European Search Report for European Patent Application
`No.10011996.5, dated Dec. 21, 2011.
`European Search Report for European Patent Application No. EP
`10012013.8, mailed Dec. 27, 2011.
`Notice of Reasons for Rejection (including translation) for Japanese
`Patent Application No. 2000-596705, mailed Aug. 19, 2008.
`Notice of Allowance for Japanese Patent Application No. 2000-
`596705, mailed Mar. 16, 2009.
`Notification of Reasons for Rejection (including translation) for
`Japanese Patent Application No. 2008-323651, mailed Feb. 8, 2010.
`Notification of Reasons for Refusal (including translation) for Japa(cid:173)
`nese Patent Application No. 2008-323651, mailed Mar. 7, 2011.
`Decision of Final Rejection for Japanese Patent Application No.
`2008-323651, mailed Nov. 28, 2011.
`English Translation of Preliminary Rejection re: Korean Application
`No. 2000-7009402, issued Nov. 15, 2005.
`Official Action for U.S. Appl. No. 09/581,400 mailed Mar. 13, 2002.
`Notice of Allowance for U.S. Appl. No. 09/581,400 mailed Jun. 17,
`2002.
`Official Action for U.S. Appl. No. 10/175,815 mailed Nov. 17, 2003.
`Official Action for U.S. Appl. No. 10/778,083 mailed Nov. 30, 2004.
`Official Action for U.S. Appl. No. 111090,183 mailed Sep. 12, 2005.
`Official Action for U.S. Appl. No. 111289,516 mailed Mar. 27, 2006.
`OfficialActionforU.S.Appl. No. 111425,507, mailed Nov. 28, 2007.
`Official Action for U.S. Appl. No. 111425,507, mailed Aug. 22, 2008.
`Official Action for U.S. Appl. No. 111425,507, mailed Apr. 27, 2009.
`Notice of Allowance for U.S. Appl. No. 111425,507, mailed Sep. 22,
`2009.
`Official Action for U.S. Appl. No. 12/615,946, mailed Aug. 6, 2010.
`Notice of Allowance for U.S. Appl. No. 12/615,946, mailed Apr. 25,
`2011.
`Official Action for U.S. Appl. No. 13/152,558, mailed Jun. 1, 2012.
`Notice of Allowance for U.S. Appl. No. 13/152,558, mailed Feb. 4,
`2013.
`Official Action for European Patent Application No. 10011996.5,
`dated May 29, 2013.
`Communication under Rule 71(3) EPC, dated Jul. 5, 2013 granting
`European Patent Application No. 10012013.8.
`* cited by examiner
`
`CSCO-1001
`Page 2 of 13
`
`

`
`= ~ = N
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`
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`
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`
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`
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`
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`ECC
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`FDQ
`
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`
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`
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`
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`
`30
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`
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`
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`
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`
`12
`
`CSCO-1001
`Page 3 of 13
`
`

`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 2 of 4
`
`US 8,611,404 B2
`
`Subchannel
`
`Bits
`
`50
`51
`52
`
`6
`6
`7
`
`Fig. IA
`
`Fig. lB
`
`CSCO-1001
`Page 4 of 13
`
`

`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 3 of 4
`
`US 8,611,404 B2
`
`CO Transceiver
`
`Notify:
`Acknowledge Sleep
`Mode
`
`84
`
`Detect "Entering Sleep 88
`Mode"
`Notify: "Entering Sleep
`Mode"
`
`Enter Sleep
`Mode Store
`State Continue Sync
`Monitor
`For Exit
`Reduce Power
`
`90
`
`97
`
`Sleep
`
`Dectect "Exiting Sleep
`Mode"
`Exit Sleep Mode
`Restore State
`Restore Power
`Resume Transmission
`
`102
`
`Verify Data
`
`Full Data
`Communication
`
`Fig. 2
`
`CPE Transceiver
`
`Receive Power Down
`Indication
`
`Notify: "Intend To Enter
`Sleep Mode"
`
`Notify "Entering Sleep
`Mode"
`
`Detect CO Entrance
`Into Sleep Mode
`
`Enter Sleep Mode
`Store State Continue
`Frame Counter
`Redirect PLL Input
`
`Sleep
`
`Awaken
`
`Exit Sleep Mode
`Notify
`Restore State Restore
`Power Restore PLL
`Input
`
`92
`
`94
`
`95
`
`98
`
`Send Test Data
`
`Test Data
`Correct?
`
`100
`
`104
`
`108
`
`Reinitialize
`
`106
`
`Resume Full Data
`Communication
`
`CSCO-1001
`Page 5 of 13
`
`

`
`U.S. Patent
`
`Dec. 17, 2013
`
`Sheet 4 of 4
`
`US 8,611,404 B2
`
`200
`
`202
`1/
`CPU
`
`ITU
`
`204
`I
`PCI
`
`210 v
`
`Controller
`
`214
`
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`
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`End
`
`+----+--•
`
`206
`
`208
`
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`
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`
`212
`
`Idle Symbol
`Generator
`
`Fig. 3
`
`CSCO-1001
`Page 6 of 13
`
`

`
`US 8,611,404 B2
`
`1
`MULTICARRIER TRANSMISSION SYSTEM
`WITH LOW POWER SLEEP MODE AND
`RAPID-ON CAPABILITY
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`2
`purpose, and the group of bits is mapped into a vector defined
`by one of the points of a "constellation" which specifies the
`allowable data points for transmission over that subcharmel at
`a particular time. Each vector or data point thus comprises a
`unique symbol representing a specific bit configuration for
`transmission as a group over its associated subcharmel. Dur(cid:173)
`ing the time period allocated for transmission of a symbol
`(commonly referred to as a "symbol period" or "frame"),
`each subchannel transmits its symbol in parallel with all other
`10 subchannels so that large amounts of data can be transmitted
`during each frame.
`The number of bits carried by a symbol is dependent on the
`characteristics of the subchannel over which it is to be trans(cid:173)
`mitted. This may vary from one subchannel to another. The
`principal determinant is the signal-to-noise ratio of the sub(cid:173)
`channel. Accordingly, this parameter is measured from time
`to time in order to ascertain its value for each subchannel, and
`thus determine the number of bits to be transmitted on the
`particular subchannel at a given time.
`The telephone charmel is subject to a number of impair(cid:173)
`ments which must be compensated for in order to ensure
`reliable transmission. Phase (delay) distortion of the trans(cid:173)
`mitted signal is typically the most limiting of these impair(cid:173)
`ments. This distortion is frequency-dependent, and thus com(cid:173)
`ponents of a signal at different frequencies are shifted by
`varying amounts, thereby distorting the signal and increasing
`the likelihood of erroneous detection unless provision is made
`to combat it. To this end, frequency domain equalizers (FDQ)
`and time domain equalizers (TDQ) are commonly incorpo-
`30 rated into the transmission channel in order to equalize the
`phase (time) delay across the channel frequency band. Other
`impairments also exist. For example, frequency-dependent
`signal attenuation adversely affects signal transmission on
`the telephone line. This is compensated by the use of gain
`35 equalizers on the line, while echo on the line is handled by the
`use of echo cancellers.
`The problem of signal impairment is especially serious in
`those xDSL configurations which carry the DSL communi(cid:173)
`cations on a common line with ordinary voice communica-
`40 tions but which omit the use of a "splitter" at either the
`subscriber premises the central office or both. A "splitter" is
`basically a filter which separates the low-frequency voice
`communications (e.g., from zero to four kilohertz) from the
`higher frequency data communications (which may extend
`45 up into the megahertz band) and provides a strong degree of
`isolation between the two. In the absence of a splitter, unique
`provisions must be made to accommodate voice and data
`communications on the same line. For a more detailed
`description of the problem and its solution, see the co-pend-
`50 ing application of Richard Gross et al. entitled "Splitterless
`Multicarrier Modem", Serial No. PCT/US98 21442, filed
`Oct. 9, 1998, and assigned to the assignee of the present
`invention, the disclosure of which is incorporated herein by
`reference.
`Because of their extensive use in Internet communications
`as well as in other applications, DSL transceivers are com(cid:173)
`monly maintained in the "on" state, ready to transmit or
`receive once they have been installed and initialized. Thus,
`such modems consume a significant amount of power, even
`60 when they are not actively transmitting or receiving data. It is
`generally desirable to limit this power consumption, both for
`environmental reasons as well as to prolong the life of the
`equipment. Further, such modems may be implemented or
`incorporated in part or in whole in computer equipment such
`65 as in personal computers for home and business use, and such
`computers increasingly incorporate power conservation pro(cid:173)
`cedures. See, for example, U.S. Pat. No. 5,428,790, "Com-
`
`This application is a continuation of U.S. application Ser.
`No. 13/152,558, filed Jun. 3, 2011, now U.S. Pat. No. 8,437,
`382, which is a continuation of U.S. application Ser. No.
`12/615,946, filed Nov. 10, 2009, now U.S. Pat. No. 7,978,
`753, which is a continuation of U.S. application Ser. No.
`11/425,507, filed Jun. 21, 2006, now U.S. Pat. No. 7,697,598,
`which is a continuation of U.S. application Ser. No. 11/289,
`516, filed Nov. 30, 2005, which is a continuation of U.S. 15
`application Ser. No. 11/090,183, filed Mar. 28, 2005, which is
`a continuation of U.S. application Ser. No. 10/778,083, filed
`Feb. 17, 2004, which is a continuationofU.S. application Ser.
`No. 10/175,815, filed Jun. 21, 2002, which is a continuation
`of U.S. application Ser. No. 09/581,400, filed Jun. 13, 2000, 20
`now U.S. Pat. No. 6,445,730, which is a 371 oflnternational
`Application No. PCT/US99/01539, filed Jan. 26, 1999, which
`claims the benefit of and priority to U.S. Application No.
`60/072,447, filed Jan. 26, 1998 entitled "Multicarrier Trans(cid:173)
`mission System with a Low Power Sleep Mode and with 25
`Instant-On Capability" each of which are incorporated herein
`by reference in their entirety.
`
`BACKGROUND OF THE INVENTION
`
`The invention relates to multicarrier transmission systems,
`and comprises method and apparatus for establishing a power
`management sleep state in a multicarrier system.
`
`SUMMARY OF THE INVENTION
`
`Multi carrier transmission systems provide high speed data
`links between communication points. Such systems have
`recently been introduced for communications over the local
`subscriber loop that connects a telephone service subscriber
`to a central telephone office; in this important application they
`are commonly referred to as "xDSL" systems, where the "x"
`specifies a particular variant of DSL (digital subscriber loop)
`communications, e.g., ADSL (asynchronous digital sub(cid:173)
`scriber loop), HDSL (High-Speed Digital Subscriber Loop),
`etc. These will be referred to generically herein simply as
`"DSL" systems.
`In such systems, a pair of transceivers communicate with
`other by dividing the overall bandwidth of the channel inter(cid:173)
`connecting the subscriber and the central office into a large
`number of separate subchannels, each of limited bandwidth,
`operating in parallel with each other. For example, one com(cid:173)
`mon system divides the subscriber line charmel into two
`hundred and fifty six subchannels, each of 4.3 kilohertz band(cid:173)
`width. A first group of these (e.g., one hundred ninety six) is 55
`allocated to communications from the central office to the
`subscriber (this is known as the "downstream" direction); a
`second group (e.g., thirty-two) is allocated to communica(cid:173)
`tions from the subscriber to the central office (this is known as
`the "upstream" direction). The remaining subchannels are
`allocated to administrative, overhead and control (AOC)
`functions.
`Data to be communicated over the link is divided into
`groups of bits, one group for each subchannel. The group of
`bits allocated to a given subcharmel is modulated onto a
`carrier whose frequency is specific to that charmel. Typically,
`quadrature amplitude modulation (QAM) is used for this
`
`CSCO-1001
`Page 7 of 13
`
`

`
`US 8,611,404 B2
`
`3
`puter Power Management System", issued Jun. 27, 1995 on
`the application ofL. D. Harper. Thus, it is desirable to provide
`anADSL modem which can accommodate power conserva(cid:173)
`tion procedures in equipment with which it is associated, as
`well as independently of such equipment as may be appro(cid:173)
`priate.
`Because of the complexity of DSL transceivers, and the
`conditions under which they must operate, it is necessary to
`initialize them prior to the transmission and reception of data.
`This initialization includes, inter alia, channel corrections 10
`such as "training" the frequency-domain and time-domain
`equalizers and the echo cancellers; setting the channel gains;
`negotiating the transmission and reception data rates; adjust(cid:173)
`ing the fine gains on the subchannels over which communi(cid:173)
`cation is to take place; setting the coding parameters; and the 15
`like. Additionally, it includes measuring the signal-to-noise
`ratio of each of the subcharmels, calculating the bit-allocation
`tables characteristic of each under given conditions of trans(cid:173)
`mission, and exchanging these tables with other modems with
`which a given modem communicates. For more detailed dis- 20
`cussion of these procedures, refer to the application of Rich(cid:173)
`ard Gross et al., cited above and incorporated herein by ref(cid:173)
`erence. These procedures can require from seconds to tens of
`seconds. In a new installation, the time required is inconse(cid:173)
`quential. However, in an already-operating installation, the 25
`time required to initialize or re-initialize the system after a
`suspension of operation in connection with power conserva(cid:173)
`tion is generally unacceptable, since it is typically desired to
`have the modem respond to request for service nearly instan(cid:173)
`taneously.
`Accordingly, it is an object of the invention to provide a
`multicarrier transmission system having a low power sleep
`mode and a rapid-on capability.
`Further, it is an object of the invention to provide a multi(cid:173)
`carrier transmission system for use in digital subscriber line 35
`communications that can rapidly switch from a sleep mode to
`a full-on condition.
`Still another object of the invention is to provide a DSL
`system that can readily be integrated into a computer having
`a low power sleep mode and which is capable of rapid return 40
`to full operation.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`The invention description below refers to the accompany(cid:173)
`ing drawings, of which:
`FIG. 1 is a block and line diagram of a multicarrier trans(cid:173)
`mission system in accordance with a preferred embodiment
`of the present invention;
`FIG. lA is a portion of an exemplary chart showing a
`possible bit distribution among subcharmels;
`FIG. lB illustrates a timing signal used in accordance with
`the invention;
`FIG. 2 is a flow diagram of the operation of the present
`invention; and
`FIG. 3 is a block and line diagram of still another aspect of
`the present invention.
`
`DETAILED DESCRIPTION OF AN
`ILLUSTRATIVE EMBODIMENT
`
`For purposes of explanation, the present invention will be
`described in the context of an ADSL system having a first
`transceiver located at the site of a customer's premises (re(cid:173)
`ferred to hereinafter as the "CPE transceiver") and a second
`transceiver located at a local central telephone office (herein(cid:173)
`after referred to as the "CO transceiver"). The two are inter-
`
`4
`connected for communication by means of a common tele(cid:173)
`phone line over which voice and data are to be transmitted,
`and the CO transceiver is commonly connected into a broader
`network such as the Internet to and from which data is to be
`communicated. The system will be described as using Fourier
`transform technology for modulation and demodulation of
`the data to be transmitted. It will be understood, however, that
`the invention is not limited to this environment, and is appli-
`cable to point-to-point communications is other environ(cid:173)
`ments, and with other forms of modulation/demodulation.
`Further, since the CPE transceiver and CO transceiver are
`very similar, the invention will be explained in connection
`with a detailed illustration of the CPE transceiver only.
`In FIG. 1, a DSL transceiver 10 in accordance with the
`present invention has a transmitter section 12 for transmitting
`data over a digital subscriber line 14 and a receiver section 16
`for receiving data from the line. The transmitter section 12 is
`formed from an input buffer and converter (IBC) 18 that
`receives a serial string of data (e.g., binary digits) b, to be
`transmitted and converts the data into a plurality of pairs of
`complex-valued symbols X, and their conjugates XN_,=X*,,
`i=O, 1, ... N. Typically, the buffer 18 holds at least a frame of
`data (a frame comprising the amount of data to be transmitted
`during one symbol period). The pairs of symbols X, and X*,
`are applied to an Inverse Fast Fourier Transform (IFFT) 20 to
`provide real time output signals X1, j=O, 1, ... N/2-1. The
`latter in turn are converted to serial form in a parallel-to-serial
`convener (PSC) 22 and then applied to a digital-to-analog
`converter (DAC) 24 for application to a line driver 26. The
`30 converter 24 may apply a cyclic prefix to the signals X1 to
`combat intersymbol interference caused by the transmission
`medium. The driver 26 may incorporate a gain control section
`(GC) 26a for controlling the signal amplitude (and thus
`power) as it is applied to a communication charmel such as the
`digital subscriber line 14.
`IFFT 20 may be viewed as a data modulator. The symbols
`X,, and their conjugates XN_,, correspond to data points defin(cid:173)
`ing signal vectors in a quadrature amplitude modulation
`(QAM) constellation set. The converter 18 forms the respec(cid:173)
`tive symbols from the input data with the aid of a bit allocation
`table (BAT) 28 which specifies, for each subchannel, the
`number of bits to be carried by the symbol transmitted over
`that subchannel, and thus defines the data point to be associ(cid:173)
`ated with the symbol. This table is typically calculated at the
`45 transceiver and is transmitted to other transceivers with which
`the instant transceiver communicates, to thereby enable them
`to decode the symbols received by them from the instant
`transceiver.
`The number of bits which each symbol carries is deter-
`50 mined by the characteristics of the subcharmel over which the
`symbol is to be transmitted, and particularly by the signal-to(cid:173)
`noise ratio of the subcharmel. Procedures for this calculation
`are known. FIG. lA shows an example of such a table as
`formed and stored at transceiver 10. Thus, the symbol to be
`55 transmitted over subcharmel 50 may be determined to have an
`allocation of six bits; that of subchannel 51, six bits; that of
`subchannel 52, seven bits, etc.
`A Clock 30 controls the timing of the operation of the
`transmitter 12. It supplies input to a Controller 32 which
`60 controls the individual units of the transmitter. In the case of
`the CO transceiver, the clock 30 typically is a master clock to
`which a remote transceiver, such as at a subscriber premises,
`will be synchronized. In the case of a transceiver at the sub(cid:173)
`scriber premises, such as is shown here for purposes of illus-
`65 tration, the clock is derived from the master clock at the
`central office as described more fully below in connection
`with the receiver portion of the transceiver.
`
`CSCO-1001
`Page 8 of 13
`
`

`
`US 8,611,404 B2
`
`5
`A Frame Counter (FC) 24 connected to the controller 32
`maintains a count of the number of frames of data transmitted
`from or received by the transceiver 10. The clock 30 main(cid:173)
`tains the count in counter 34 synchronous with that of a
`corresponding counter (not shown) in the CO transceiver. In
`DSL systems, typically, data is communicated in the form of
`a sequence of data frames (e.g., sixty-eight frames for ADSL
`as specified in ITU Document G.992.2), followed by a syn(cid:173)
`chronization frame, each frame having a duration of one
`symbol period of approximately two hundred and fifty micro(cid:173)
`seconds. Together, the sixty-nine frames comprise a "super(cid:173)
`frame". Thus, the counter 34 typically maintains a count
`modulo sixty-nine. Finally, a State Memory (SM) 36 con(cid:173)
`nected to the controller 32 records the state of the transceiver
`for reasons discussed more fully below.
`Turning now to the receiver section 16, it is formed from a
`line conditioner (LC) 50; an analog-to-digital converter
`(ADC) 52; a serial-to-parallel converter 54; a Fast Fourier
`Transform (FFT) section 56; a decoder 58; and a parallel-to(cid:173)
`serial converter 60. The conditioner50 compensates for trans(cid:173)
`mission distortions introduced by the line 14, and commonly
`includes a frequency-domain equalizer (FDQ) 50a; a time(cid:173)
`domain equalizer (TDQ) 50b; and an echo canceller (EC)
`50c, among other elements. The ADC 52 converts the
`received signal to digital form and applies it to the serial-to(cid:173)
`parallel converter 54. The converter 54 removes any cyclic
`prefix that may have been appended to the signal before it was
`transmitted, and applies the resultant signal to the FFT 56
`which effectively "demodulates" the received signal. The
`output of the FFT is applied to decoder 58 which, in conjunc- 30
`tion with a bit-allocation-table 64, recovers the symbols X,
`and X*, and the bits associated with them. The output of
`detector 58 is applied to the parallel-to-serial converter 60
`which restores the data stream, b,, that was originally applied
`to the transmitter. The controller 32 also controls the opera- 35
`tion of the receiver portion 16 of the transceiver 10.
`During normal (non-sleep mode) operation, a phase-lock
`loop (PLL) 62 receives from the FFT 56 a timing reference
`signal 62a (see FIG. lA) via a line 62b. The timing reference
`signal 62a is transmitted from the transmitter with which the 40
`receiver 16 communicates (e.g., the CO transmitter). This
`signal is advantageously a pure tone of fixed frequency and
`phase which is synchronized with the Master Clock in the
`transmitter; its frequency defines the frame rate of the trans(cid:173)
`ceivers. Other forms of timing signal may, of course, be used, 45
`but use of a pure tone has the advantage of simplicity and
`reliability even when portions of the transceiver are powered
`down in accordance with the invention. The PLL 62 locks
`itself to this signal and drives clock 30 in synchronism with
`the Master Clock in the driving transmitter. This also syn- 50
`chronizes frame counter 34 of the CPE transceiver to the
`corresponding frame counter of the CO transceiver. Control
`of the receiver section is provided by the controller 32.
`In the sleep mode, the FFT 56 is preferably dormant.
`Accordingly, the timing reference signal for PLL 62 is pro(cid:173)
`vided from the output of the analog to digital convener 52 via
`a detector 64 which extracts the timing signal from the signal
`appearing on line 14 during sleep mode, by calculating the
`DFT of the synchronizing pilot tone. Controller 32 controls
`the switching of the input to PLL 62 between these two
`sources so that the PLL 62 remains locked to the CO trans(cid:173)
`ceiver timing reference.
`As noted earlier, the transceiver of the present invention
`will commonly be incorporated in a computer such as a per(cid:173)
`sonal computer; indeed, it may be implemented as an integral
`part of such a computer, which may have a power conserva(cid:173)
`tion capability for activation when the computer is not in
`
`6
`active operation. It is thus desirable that the transceiver be
`able to suspend operations and enter a "sleep" mode in which
`it consumes reduced power when it is not needed for data
`transmission or reception, but nonetheless be able to resume
`transmission or reception almost instantaneously, e.g., within
`a few frames.
`Further, when the ADSL transceiver is implemented as an
`integral part of a computer, it may often be the case that the
`processing power of the computer is, at a given moment,
`10 devoted to another task such as graphics, word processing,
`and the like, and is thus unable to service the transceiver. In
`such circumstances, it is possible that a frame that is
`assembled for transmission to the CO transceiver, and thence
`to some network connected to it, is incomplete, and thus
`15 would generate errors if transmitted. Accordingly, the trans(cid:173)
`ceiver of the present invention is responsive to such condi(cid:173)
`tions by entering an "idle" state in which it ceases active
`transmission of data while the computer is elsewhere occu(cid:173)
`pied. This state is similar in many ways to the sleep mode state
`20 although, of course, its purpose is not power conservation,
`and thus in the idle state the power to selected portions of the
`transceiver may, but need not, be reduced. The idle state
`maintains synchronous signaling between the CPE and CO
`transceivers but no data is transmitted. On receipt of the idle
`25 indicator from the CPE, the CO transceiver transmits idle
`cells to the network to maintain connection with the network.
`Referring now more particularly to FIG. 2, the power down
`operation of the CPE transceiver begins on receipt of a power
`down indication (step 80) by the CPE transceiver controller
`32. The power down indication may be applied to the con(cid:173)
`troller 32 from an external source such as a personal computer
`in which the transceiver is included; it may be generated
`within the transceiver itself as a result of monitoring the input
`buffer 18 and determining that no data has been applied to it
`for a given time interval or that the buffer has not been filled
`despite passage of a symbol time; it may be responsive to a
`power down command from the CO transceiver; or it may be
`generated in response to other conditions.
`Considering for the moment the first two cases, the CPE
`transceiver responds to the indication by transmitting to the
`CO transceiver an "Intend To Enter Sleep Mode" notification
`(step 82). This notification indicates that the transceiver is
`about to undergo a change of state, and may take any of a
`variety of forms; pref