`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,
`Petitioner,
`
`v.
`
`GODO KAISHA IP BRIDGE 1,
`Patent Owner.
`
`
`Case IPR2016-01379
`Patent 6,197,696 B1
`
`
`DECLARATION OF DR. BRUCE W. SMITH, PH.D.
`IN SUPPORT OF PETITIONER’S REPLY
`
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`Page 1 of 59
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`TSMC Exhibit 1050
`TSMC v. IP Bridge
`IPR2016-01379
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`
`
`TABLE OF CONTENTS
`
`Introduction ...................................................................................................... 1
`
`
`I.
`
`II. Materials Reviewed ......................................................................................... 1
`
`III. Legal Standards for Obviousness .................................................................... 5
`
`IV. Application of the Board’s Claim Construction .............................................. 6
`
`A.
`
`B.
`
`The plain meaning of “using the [designated layer] as a mask” ........... 6
`
`The specification of the ’696 patent is internally inconsistent ........... 14
`
`V.
`
`Japanese patent application No. 10-079371 does not disclose all
`elements of claim 10 ...................................................................................... 23
`
`VI. U.S. Patent Application No. 60/071,628 discloses all elements of
`Grill’s claim 28 .............................................................................................. 28
`
`VII. Grill’s Dual-Relief Pattern ............................................................................ 45
`
`VIII. The Use of Aoyama’s Via Pattern With Grill ............................................... 47
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`IX. Aoyama’s Via Pattern Does Not Depend on a Carbon Etch-Stop Layer ...... 51
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`X.
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`Aoyama’s Contact Pattern Would Not Have Reduced Critical
`Dimension Control When Used With Grill ................................................... 54
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`XI. Certification ................................................................................................... 57
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`Page 2 of 59
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`I, Dr. Bruce W. Smith, Ph.D., declare as follows:
`
`I.
`
`Introduction
`
`1. My name is Dr. Bruce W. Smith. I previously signed a declaration in
`
`relation to these proceedings on July 11, 2016, which I understand is Exhibit 1002.
`
`My qualifications, a summary of my opinions, a list of materials reviewed, and an
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`explanation of the relevant legal standards I was asked to apply appear at
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`paragraphs 1 through 31 of Exhibit 1002, which I incorporate herein by reference
`
`for brevity.
`
`II. Materials Reviewed
`
`2.
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`In addition to the references listed in Exhibit 1002, I have reviewed
`
`the following references in forming the opinions expressed in this declaration:
`
` Declaration of Dr. Bruce W. Smith, Ph.D. dated July 11, 2016 (which I
`understand is Exhibit 1002);
`
` U.S. Provisional Patent Application No. 60/071,628 with line numbers
`appended (which I have been told is Exhibit 1049);
`
`
`
` IPB’s Translation of Japanese Patent Application No. 10-079371 to
`Aoi (which I have been told is Exhibit 2012);
`
` Excerpts from James D. Plummer et al., “Silicon VLSI Technology:
`Fundamentals, Practice, and Modeling” (2000) (“Plummer,” which I
`have been told are Exhibits 1031 and 2016);
`
`
`
`
`1
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`Page 3 of 59
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`
`
` Excerpts from C.Y. Chang & S. M. Sze, “ULSI Technology” (1996)
`(“Chang & Sze,” which I have been told is Exhibit 1032);
`
` Excerpts from S. Wolf & R.N. Tauber, “Silicon Processing for the
`VLSI Era: Volume 1: Process Technology” (1986) (“Wolf & Tauber,”
`which I have been are Exhibits 1033 and 2020);
`
` U.S. Patent No. 5,091,047 to Cleeves et al. (“Cleeves,” which I have
`been told is Exhibit 1034);
`
` U.S. Patent No. 6,287,973 to Aoi et al. (“the ’973 patent,” which I have
`been told is Exhibit 1035);
`
` U.S. Patent No. 4,560,436 to Bukhman et al. (“Bukhman,” which I
`have been told is Exhibit 1036);
`
` U.S. Patent No. 6,091,081 to Matsubara et al. (“Matsubara,” which I
`have been told is Exhibit 1037);
`
` U.S. Patent No. 4,473,437 to Higashikawa et al. (“Higashikawa,”
`which I have been told is Exhibit 1038);
`
` U.S. Patent No. 5,880,018 to Boeck et al. (“Boeck,” which I have been
`told is Exhibit 1039);
`
` U.S. Patent No. 4,832,789 to Cochran et al. (“Cochran,” which I have
`been told is Exhibit 1040);
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`2
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`Page 4 of 59
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` U.S. Patent No. 4,855,252 to Peterman et al. (“Peterman,” which I
`have been told is Exhibit 1041);
`
` U.S. Patent No. 5,786,276 to Brooks et al. (“Brooks,” which I have
`been told is Exhibit 1042);
`
` U.S. Patent No. 5,756,216 to Becker et al. (“Becker,” which I have
`been told is Exhibit 1043);
`
` U.S. Patent No. 5,821,168 to Jain (“Jain 168,” which I have been told
`is Exhibit 1044);
`
` J.M. Moran & D. Maydan, “High Resolution, Steep Profile Resist
`Patterns,” J. Vac. Sci. & Tech., vol. 16, no. 6 (Nov./Dec. 1979)
`(“Moran & Maydan,” which I have been told is Exhibit 1045);
`
` M.M. O’Toole et al., “Linewidth Control in Projection Lithography
`Using a Multilayer Resist Process,” IEEE Transactions on Electron
`Devices, vol. ED-28, no. 11 (Nov. 1981) (“O’Toole,” which I have
`been told is Exhibit 1046);
`
` E. Bassous et al., “A Three-Layer Resist System for Deep U.V. and
`RIE Microlithography on Nonplanar Surfaces,” J. Electrochem. Soc.:
`Solid-State Sci. & Tech. (Feb. 1983) (“Bassous,” which I have been
`told is Exhibit 1047);
`
` Transcript of the Deposition of Dr. A. Glew (June 30, 2017) (“Glew
`Deposition,” which I have been told is Exhibit 1048);
`
`
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`3
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`Page 5 of 59
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` Transcript of the Deposition of Dr. B. Smith (March 23, 2017) (“Smith
`Deposition,” which I have been told is Exhibit 2010);
`
` J.R. Sheats & B.W. Smith, “Microlithography: Science and
`Technology,” Chapters 9 & 10 (1998) (which I have been told is
`Exhibit 2017);
`
` K. Suzuki & B.W. Smith, “Microlithography: Science and
`Technology,” Chapter 12 (2d ed., 2007) (which I have been told is
`Exhibit 2018);
`
` K. Suzuki & B.W. Smith, “Microlithography: Science and
`Technology,” Chapter 11 (2d ed., 2007) (which I have been told is
`Exhibit 2019);
`
` M. Schaepkens et al., “Influence of Reactor Wall Conditions on Etch
`Processes in Inductively Coupled Fluorocarbon Plasmas,” J. Vac. Sci.
`& Technol. A, vol. 16, no. 4, pp. 2099–2107 (July–Aug. 1998)
`(“Schaepkens” which I have been told is Exhibit 2014);
`
` Declaration of Alexander Glew, Ph.D. (which I have been told is
`Exhibit 2009);
`
` Patent Owner’s Preliminary Response Under 37 C.F.R. § 42.107
`(March 23, 2017) (“Paper 6”);
`
` Decision on Institution (January 18, 2017) (“Paper 11”); and
`
`
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`4
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`Page 6 of 59
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` Patent Owner’s Response Under 37 C.F.R. § 42.120 (April 14, 2017)
`(“Paper 19”).
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`III. Legal Standards for Obviousness
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`3.
`
`I am not an attorney and have not been asked to offer my opinion on
`
`the law. As an expert offering an opinion on whether the claims in the ’696 patent
`
`are patentable, however, I have been told I am obliged to follow existing law. In
`
`addition to the legal standards expressed at paragraphs 15 through 31 of Exhibit
`
`1002, I have been told the following legal principles apply to analysis of
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`patentability pursuant to 35 U.S.C. §§ 102 and 103.
`
`4.
`
`I have been told a determination of obviousness based on teachings
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`from multiple references does not require an actual, physical substitution of
`
`elements. I have been told the proper test for obviousness is what the combined
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`teachings of the references would have suggested to those having ordinary skill in
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`the art. I have been told a reference must be considered for everything that it
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`teaches, not simply the described invention or a preferred embodiment.
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`5.
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`I have been told a reference “teaches away” from the claimed
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`invention when a person of ordinary skill in the art, upon reading the reference,
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`would be discouraged from following the path set out in the reference. I have also
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`been told the existence of better alternatives in the prior art does not mean that an
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`inferior alternative is inapt for obviousness purposes.
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`5
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`Page 7 of 59
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`6.
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`I have been told a person of ordinary skill in the art is a person of
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`ordinary creativity, not an automaton, and knows how to combine familiar prior art
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`elements to achieve the same functions. I have been told it is improper to ignore
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`modifications that one skilled in the art would make to a device borrowed from the
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`prior art.
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`7.
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`I have been told it is improper to rely on drawings that are neither
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`expressly to scale nor linked to quantitative values in the text.
`
`IV. Application of the Board’s Claim Construction
`A. The plain meaning of “using the [designated layer] as a mask”
`8.
`I have been told the Board adopted a preliminary claim construction
`
`in this matter. I understand that the Board has construed “using the [designated
`
`layer] as a mask” to mean “using the [designated layer] to define areas for
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`etching.”
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`9.
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`I have been told the designated layer “must actually be used to define
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`areas for etching.” For example, I have been told the Board determined a mask
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`pattern that is entirely within a surrounding resist layer is not a mask. In addition, I
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`have been told the Board found a buried layer (i.e., a layer without any portion of
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`its top surface exposed to the etchant during a particular etch process) is not a mask
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`simply because it has a lateral edge “in line and flush with [a lateral] edge of” the
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`overlying layer.
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`6
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`Page 8 of 59
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`10.
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`In my opinion, the Board’s claim construction and its application of
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`the claim construction matches the plain and ordinary meaning of the term “mask”
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`as used by those of ordinary skill in the art.
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`11.
`
`I disagree with IPB and Dr. Glew when they speculate that a buried
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`layer might be mask because of particles traveling laterally. One of the
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`fundamental requirements for a successful dual damascene technology is the
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`ability to perform highly anisotropic etches that faithfully reproduce specified
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`patterns. The etches at issue here are highly directional, with minimal lateral
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`deviation. This is not due to any “masks” preventing lateral etching, but due to the
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`reactive ion etch (“RIE”) processes which are highly directional. Plummer at 611
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`(“[M]odern fabrication methods tend to employ directional etching and vertical
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`steps with little undercutting.”); Plummer at 619 (“[D]irectional etching is due to
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`the presence of ionic species in the plasma and the electric fields that direct them
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`normal to the wafer surface.”); Plummer at 625 (“[I]t is usually assumed that all
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`the ions arrive normal to the wafer surface, as shown in Figure 10-11(b).”);
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`Plummer at 627 (“[D]irectional etching occurs [in RIE] because of the
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`directionality of the ions. . . . Since the ions are striking normal to the wafer
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`surface, the enhancement will occur normal to the wafer surface.”); Chang & Sze
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`at 329 (“Integrated circuit fabrication processes that use reactive plasmas are
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`commonplace in today’s semiconductor production lines because of their potential
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`7
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`Page 9 of 59
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`for very-high-accuracy transfer of resist patterns, i.e., anisotropic etching, as shown
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`in Fig. 1.”); Chang & Sze at 338 (“[I]on transport must be perpendicular to the
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`surface so that only the etch rate of the bottom surface is enhanced.”). A mask,
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`therefore, shields etchant particles traveling normal to the surface being etched.
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`The vertical sidewalls in the opening that defines the pattern being etched do not
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`“mask” the etch and are not relevant to the masking function.
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`12.
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`If lateral particles were a problem as IPB suggests, those particles
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`would cause significant undercutting in the layer being etched. IPB and Dr. Glew
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`cite as evidence the figure on the left below, but that is not an accurate
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`representation of what occurs during reactive ion etching. Even if it were, IPB and
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`Dr. Glew ignore the resulting undercutting (shown to the right below). IPB’s figure
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`is inaccurate because such undercutting does not occur in these RIE processes,
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`which produce nearly vertical sidewalls. If such undercutting did occur, it would
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`lead to problems like void formation and electromigration, increased contact
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`resistivity, and possibly contact failure. IPB’s misleading figure does not provide
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`evidence that the internal sidewall plays any role in defining areas for etching.
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`What matters instead are sizes and shapes of the openings as seen from above in
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`the plan view, not the internal sidewalls of a buried layer.
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`8
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`Page 10 of 59
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`13.
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`IPB cited Plummer but does not address the chapter devoted to
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`etching (Chapter 10) or Section 10.2.2.1 (“Plasma Etching Mechanisms”), which
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`explain RIE is highly directional. Plummer at 621–28. In RIE (the most common
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`dry etch process, usually synonymous with dry etching), both neutral and ionic
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`species are present. The ionic species are highly directional (i.e., anisotropic),
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`traveling normal to the substrate. The neutral species are essentially isotropic,
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`traveling in all directions. The plasma contains both chemically reactive species
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`and chemically neutral species. Chemically reactive species remove material by
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`reacting with it to form volatile species that come off the surface of the material
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`being etched. Chemically neutral species remove material from a surface by
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`physically bombarding it.
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`14.
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`In RIE, all of these particles and processes work together
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`synergistically, resulting in a highly directional etch, as Plummer explains:
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`In ion-enhanced etching, both chemical and physical components are
`acting, but the profiles are not just a linear combination of isotropic
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`9
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`Page 11 of 59
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`chemical etching and anisotropic physical etching as illustrated in
`Figure 10-3(b). Instead, the profile for ion-enhanced etching is much
`more like the case for physical etching acting alone, as in Figure 10-
`3(c). If the chemical component in the etch system is increased, the
`vertical etching is increased but not the lateral etching, which is not
`what would be expected from chemical etching. . . .
`
`So not only can one achieve very anisotropic etch profiles, but also a
`high degree of selectivity as well. This is something that is very
`difficult to achieve when the two components work independently. In
`addition, high etch rates can be achieved. Thus gas chemistries and
`etch conditions are usually chosen to promote ion-enhanced etching
`and to suppress independent chemical and physical etching. . . .
`
`ion-enhanced etching, . . .
`the exact mechanism for
`Whatever
`directional etching occurs because of the directionality of the ions.
`The enhancement of the process . . . occurs only where the ions strike
`the surface. Since the ions are striking normal to the wafer surface, the
`enhancement will occur normal to the wafer surface. This directional
`enhancement will result in directional, anisotropic etching.
`
`Plummer at 626–27.
`
`
`Plummer, Figure 10-3(c)
`10
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`Page 12 of 59
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`15. As a matter of physics, the interior surfaces of the layers above the
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`layer being etched do not play the masking role IPB and Dr. Glew suggest. Such
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`usage of the term “mask” is therefore improper even in the hyper-technical sense
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`IPB and Dr. Glew suggest.
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`16.
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`I disagree with IPB and Dr. Glew when they mistakenly suggest that
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`multi-layer resist processes (e.g., tri-layer resists) are examples of buried layers
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`acting as masks because they have flush interior sidewalls. IPB erroneously cites
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`portions of my textbook to suggest I “admitted in prior publications that a ‘multiple
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`layer resist’ having flush edges can be used to define a ‘substrate film material’ to
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`be etched—i.e., can be used as a mask.” Paper 19, at 17.
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`17. As I explained in my deposition, a tri-layer resist includes “two etch
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`processes and a develop process.” Smith Deposition at 64:9–10; see also 59:2–
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`65:8. In this way, [m]ultilayer resist techniques . . . ease requirements for resist
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`performance . . . by using physically distinct layers to separate the imaging
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`function from the etch resistance, planarization, and reflection suppression
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`functions.” EX2017 at 79; EX2018 at 33.
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`18. The basic multi-layer resist process was developed in the late 1970s at
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`Bell Labs and, to my knowledge, was first published in a paper by Moran &
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`Maydan. As I explained in my deposition, first, a planarizing polymer layer (e.g., a
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`photoresist) is formed on the wafer, followed by an etch-stop layer (e.g., SiO2) that
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`11
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`Page 13 of 59
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`provides oxygen etch resistance. Then, an imaging photoresist layer is deposited
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`and developed to form the etch pattern. This is shown in the top image of Moran &
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`Maydan’s Figure 4 (see below). RIE is used to transfer the pattern of the imaging
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`layer into the etch-stop layer using the imaging layer as a mask. This is shown in
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`the middle image of Moran & Maydan’s Figure 4 (see below). Finally, the pattern
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`is transferred by RIE into the planarizing layer. Because the imaging layer and
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`planarizing layer are both organic materials, the imaging layer (which is much
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`thinner than the planarizing layer) is completely removed during this process. This
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`is shown in the bottom image of Moran & Maydan’s Figure 4 (see below). Other
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`texts similarly describe the multi-layer resist process. Moran & Maydan at 1622–
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`24, Figure 4; Chang & Sze at 294–95, 361, FIGURE 17; Wolf & Tauber at 424,
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`Fig. 11; Cleeves at 3:29-41, FIGS. 1–4; Bassous at 479–80, Fig. 1; O’Toole at
`
`1407, Fig. 6. The intermediate layer does not act as a mask until it is no longer
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`buried (see figures below). In my textbook, I also provide a figure (Figure 12.3(c)
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`on page 18 of EX2018) that combines into a single figure the independent tri-layer
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`resist process steps depicted in each of the figures below. This figure in my
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`textbook does not depict a physical structure as IPB and Dr. Glew appear to
`
`suggest.
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`12
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`Page 14 of 59
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` Moran & Maydan, Figure 4 Wolf & Tauber, Fig. 11 (chapter 12)
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`
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`Chang & Sze, FIGURE 17 (chapter 6) Cleeves, FIGS. 1–4
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`
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`19. Likewise, in the final structures above, the planarizing layer does not
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`act as a mask for etching the layer immediately below the planarizing layer. The
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`purpose of the etch-stop layer is to act as a mask by providing etch resistance when
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`layers below are etched. The etch-stop layer is chosen not only to resist the etch of
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`the planarizing layer, but typically to also resist the etch used to transfer the pattern
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`into the layer immediately below the planarizing layer. The purpose of the
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`13
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`Page 15 of 59
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`planarizing layer, on the other hand, is to prevent problems associated with optical
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`lithography used to expose and develop the top imaging layer. In some instances,
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`the planarizing layer could be used as a mask during subsequent etching (e.g.,
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`etching a SiO2 film below the planarizing layer when the etch-stop layer is made of
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`SiO2), but only once the etch-stop layer is completely removed, not while the etch-
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`stop layer is still intact. In other words, the planarizing layer does not act as a mask
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`because of its interior sidewalls. My textbook does not suggest otherwise.
`
`B.
`
`20.
`
`The specification of the ’696 patent is internally inconsistent
`
`I do not agree with IPB’s suggestion that a buried layer acts as a mask
`
`simply because it has a lateral edge “in line and flush with [a lateral] edge of” the
`
`overlying layer. I have never heard anyone suggest such a layer would be a mask.
`
`21.
`
`IPB appears to base its suggestion on three inconsistencies in the ’696
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`patent, detailed immediately below, which in my opinion are errors:
`
`(1) Buried Layer 305A as a “Mask”—“Next, as shown in
`FIG. 13(c), the second resist pattern 309 is removed and
`the patterned second organic-containing silicon dioxide
`film 305A is dry-etched using the mask pattern 308 as a
`mask, thereby forming openings for forming wiring
`grooves in the patterned second organic-containing silicon
`dioxide film 305A. Thereafter,
`the patterned
`low-
`dielectric-constant SOG film 304A is dry-etched using the
`mask pattern 308 and the patterned second organic-
`containing silicon dioxide film 305A having the openings
`for wiring grooves as a mask, thereby forming the wiring
`grooves 311.” ’696 patent at 17:30–40 (underlining
`added).
`
`14
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`Page 16 of 59
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`(2) Buried Layer 355A as a “Mask”—“Thereafter, as shown
`in FIG. 16(d), the patterned organic film 354A is dry-
`etched using the mask pattern 358 and the patterned
`second silicon dioxide film 355A having the openings for
`forming wiring grooves as a mask, thereby forming the
`wiring grooves 362.” ’696 patent at 19:50–54 (underlining
`added).
`
`
`(3) Buried Layer 556B as a “Mask”—“Then, the patterned
`second organic film 555A is dry-etched using the mask
`pattern 559 and the patterned second silicon dioxide film
`556B as a mask, and the first organic film 553 is dry-
`etched using the patterned first silicon dioxide film 554A
`
`15
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`
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`Page 17 of 59
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`as a mask, thereby forming a patterned second organic film
`555B having wiring grooves 561 and a patterned first
`organic film 553A having contact holes 562 as shown in
`FIGS. 26(c) and 29(a).” ’696 patent at 26:30–40
`(underlining added).
`
`
`
`
`22. During my deposition, I explained the second example is “not
`
`
`
`consistent with what is described in the rest of the process flow nor is it consistent
`
`with the diagrams.” Smith Deposition at 45:1–47:18. The same is true of the other
`
`two examples.
`
`23.
`
`I understand that Dr. Glew also found incorrect teachings in the ’696
`
`patent, such as when the ’696 patent mistakenly identifies layer 509 as a mask in
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`Figures 22(b) and 22(c) (see figures below). Glew Deposition at 97:12–99:21; ’696
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`patent at 23:40–46.
`
`24. The statement in IPB’s Preliminary Response that “there are other
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`cross-sections in which the second resist pattern and the mask pattern, shown in
`
`
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`16
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`Page 18 of 59
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`one cross-section in Figures 22(b) and 22(c), either have edges lined up and flush
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`with one another that are used to etch the second silicon dioxide film (EX1001 at
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`17:50-62, 19:63-20:8), or are ‘offset’ such that the second resist pattern and the
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`mask pattern are both used to define areas for etching” (Paper 6 at 44) is untrue, as
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`even Dr. Glew admits. Glew Deposition at 97:12–99:21.
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`25. The opening in layer 510 of the figures above defines the contact hole.
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`’696 patent at 23:40–42. The pattern in layer 509 of the figures above defines the
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`wiring pattern. ’696 patent at 23:25–32. As a person of skill in the art would have
`
`understood, and as Figures 27(a) through 29(a) of the ’696 patent illustrate, the
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`wiring grooves extend into and out of the cross-sections shown in Figures 22(b)
`
`and 22(c). That is because wiring grooves define the circuit layout of the integrated
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`circuit, connecting many individual device structures. Each contact hole, on the
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`other hand, is restricted to an individual device structure. The contact hole extends
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`only minimally into and out of the cross-sections in Figures 22(b) and 22(c). The
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`figures below explain how a person of ordinary skill in the art would have
`
`understood Figures 22(b) and 22(c). Just as Figure 27(b) represents the cross-
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`section in Figure 25(c), the top figures below depict Figures 22(b) and 22(c). The
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`bottom figures below illustrate the plan view of Figures 22(b) and 22(c). As shown
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`in both sets of images, layer 509 is completely buried by the resist layer 510. There
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`17
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`Page 19 of 59
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`are no “edges lined up and flush with” layer 510 or “offset[s]” that expose layer
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`509. Paper 6, at 44.
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`
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`
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`26. As these images illustrate and Dr. Glew’s testimony confirms, a
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`person of ordinary skill in the art would have understood the draftsperson made an
`
`error in the ’696 specification by identifying layer 509 as a mask in Figures 22(b)
`
`and 22(c). The rationale proposed by IPB (Paper 6, at 44) makes no sense, because
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`it would limit the example above to obscure, restrictive, and difficult-to-imagine
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`circuit layouts with complex and unnecessary shapes. This would run contrary to
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`the general nature of this processing technology and other examples in the ’696
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`18
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`Page 20 of 59
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`patent. In fact, the ’696 patent does not discuss circuit layouts at all, nor is there
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`any technical reason for such restrictive and incomprehensible circuit layouts. To
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`deem layer 509 a “mask” in this etch step would, in my view, would be contrary to
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`the way a person of ordinary skill would have viewed the disclosure.
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`27.
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`In my opinion, a person of ordinary skill in the art would have
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`disregarded the misstatements made in the three examples IPB identified where a
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`buried layer is called a “mask” in the specification. Not only do these examples
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`contradict the common and ordinary meaning of what it means to act as a mask,
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`they also contradict at least seven examples in the specification where a buried
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`layer is not called a “mask”:
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`(1) Buried Layer 103A not a “Mask”—“Subsequently, the
`silicon nitride film 102 is dry-etched using the patterned
`organic-containing silicon dioxide film 104A as a mask,
`thereby forming a patterned silicon nitride film 102A and
`exposing the first metal interconnects 101 within the
`contact holes 110 as shown in FIG. 3(a).” ’696 patent at
`11:51–55 (underlining added).
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`
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`(2) Buried Layer 103A not a “Mask”—“[T]he silicon nitride
`film 102 is dry-etched using the patterned organic-
`containing silicon dioxide film 104A as a mask, thereby
`forming a patterned silicon nitride film 102A and exposing
`the first metal interconnects 101 within the contact holes
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`19
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`Page 21 of 59
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`110 as shown in FIG. 6(b).” ’696 patent at 13:37–41
`(underlining added).
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`(3) Buried Layer 103A not a “Mask”—“[T]he silicon nitride
`film 102 is dry-etched using the patterned organic-
`containing silicon dioxide film 104A as a mask, thereby
`forming a patterned silicon nitride film 102A and exposing
`the first metal interconnects 101 withinthe contact holes
`110 as shown in FIG. 8(b).” ’696 patent at 14:41–45
`(underlining added).
`
`
`
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`(4) Buried Layer 203A not a “Mask”—“[T]he silicon nitride
`film 202 is dry-etched using the patterned organic-
`containing silicon dioxide film 204A as a mask, thereby
`forming a patterned silicon nitride film 202A and exposing
`the first metal interconnects 201 within the contact holes
`210 as shown in FIG. 11(a).” ’696 patent at 16:7–11
`(underlining added).
`
`
`(5) Buried Layers 304A and 305A not “Masks”—“[T]he
`second organic-containing silicon dioxide film 305, the
`low-dielectric-constant SOG film 304 and the first organic-
`containing silicon dioxide film 303 are sequentially dry-
`20
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`Page 22 of 59
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`etched using the second resist pattern 309 as a mask. As a
`result, a patterned second organic-containing silicon
`dioxide film 305A, a patterned low-dielectric-constant
`SOG film 304A and a patterned first organic-containing
`silicon dioxide film 303A having contact holes 310 are
`formed as shown in FIG. 13(b).” ’696 patent at 17:20–29
`(underlining added).
`
`
`
`
`(6) Buried Layer 355A not a “Mask”—“[T]he second
`silicon dioxide film 355 and the organic film 354 are
`sequentially dry-etched using the second resist pattern 359
`as a mask, thereby forming a patterned second silicon
`dioxide film 355A and a patterned organic film 354A
`having openings 360 for forming contact holes as shown in
`FIG. 16(b). In this case, the second resist pattern 359 is
`removed during the step of etching the organic film 354.”
`’696 patent at 19:33–40 (underlining added).
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`21
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`Page 23 of 59
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`(7) Buried Layer 405A not a “Mask”—“[T]he second low-
`dielectric-constant SOG film 405 and
`the organic-
`containing silicon dioxide film 404 are sequentially dry-
`etched using the second resist pattern 409 as a mask,
`thereby forming a patterned second low-dielectric-constant
`SOG film 405A and a patterned organic-containing silicon
`dioxide film 404A as shown in FIG. 19(a).” ’696 patent at
`21:33–39 (underlining added).
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`
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`28. The discussion in this section demonstrates the specification of the
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`’696 patent is inconsistent regarding buried layers acting as “masks.”
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`Page 24 of 59
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`V.
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`Japanese patent application No. 10-079371 does not disclose all elements
`of claim 10
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`29.
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`IPB suggests that a buried layer acts as a mask even when it has
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`nothing to do with the etch. Consider the illustrations below. The top layer (striped
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`layer) contains the via (i.e., contact hole) pattern, and the buried layer (blue)
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`contains the wiring pattern. The etch I am describing is used to transfer the via
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`pattern into the green layer. In IPB’s view, the blue layer in this example acts as a
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`mask even though it does not define the via pattern. This would make the term
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`“mask” meaningless and confusing to a person of ordinary skill in the art.
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`
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`30.
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`IPB’s argument that the Japanese ’371 application supports step i) of
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`claim 10 hinges on the description of a contingent process used to compensate for
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`unwanted misalignment errors. The Japanese ’371 application explains the process:
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`If the second resist pattern 359 may have been misaligned with the
`first resist pattern 357, then the mask pattern 358 should be dry-
`etched using the second resist pattern 359 as a mask before the second
`silicon dioxide film 355 is dry-etched using the second resist pattern
`359 as a mask. That is to say, if the mask pattern 358 is partially
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`23
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`Page 25 of 59
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`exposed inside the openings of the second resist pattern 359 for
`forming contact holes because of the misalignment of the second
`resist pattern 359 with the first resist pattern 357, then the mask
`pattern 358 is dry-etched using the second resist pattern 359 as a
`mask.
`
`
`EX2012 at 39:12–21; Japanese ’371 application at ¶ 96. The figures IPB
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`uses in support of its position are reproduced below.
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`
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`31. The description IPB relies on states, “[T]he second silicon dioxide
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`film 355 is dry-etched using the second resist pattern 359 as a mask.” The Japanese
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`’371 application makes no mention of using layer 358 as a “mask” in this process,
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`which is appropriate because layer 358 is not a mask in this process. The sole
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`purpose of this process is to eliminate exposed portions of layer 358 so it does not
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`act as a mask. The Japanese ’371 application requires removing the exposed
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`portions of layer 358, otherwise layer 358 would define a narrower contact hole
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`pattern than designed, causing increased contact resistance, void formation during
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`metallization, reduced reliability, and/or failed contacts. Japanese ’371 application
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`at ¶ 54, Fig. 6(c); EX2012, 26:20-24, Fig. 6(c). In other words, a person of
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`24
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`Page 26 of 59
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`ordinary skill in the art would have understood the Japanese ’371 application
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`teaches how to avoid layer 358 inadvertently becoming a mask.
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`32. The top view of this process illustrates why IPB’s suggestion that
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`layer 358 acts as a mask is wrong. The images in the first column below show the
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`cross-section; the images in the second column illustrate the composite top view;
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`the images in the third column illustrate the top view of layer 359 only (the contact
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`hole, i.e., via); the images in the fourth column illustrate the top view of layer 358
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`only (the wiring groove); and the images in the fifth column illustrate the top view
`
`of layer 355 only. The top row illustrates the misalignment of resist layer 359; the
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`second row illustrates the etching of the exposed portion of layer 358; and the third
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`row illustrates the etching of layer 355. The goal of this process, like the goal of
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`the process without misalignment, is to transfer the via pattern of layer 359 into
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`layer 355 faithfully. Layer 358, which contains the wiring pattern, does not “define
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`areas for etching” a via in layer 355. As these images show—and the text of the
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`Japanese ’371 application explains—layer 359 is the sole mask used to define the
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`square-shaped areas for etching in layer 355. Japanese ’371 application at ¶ 93, 96.
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`33. Even accepting the ’696 patent’s incorrect descriptions of certain
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`buried layers with flush edges acting as “mask,” layer 358 in the example above is
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`different. Each example of a buried “mask” IPB identifies in the ’696 patent is a
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`buried layer that shares the same pattern as